ROHM BU16027KV

HDMI Switch ICs
3 for input 1 output switch with
Termination sense
non correspondence
(Unsync with HPD_SINK)
BU16027KV
No.09063EDT04
●Description
BU16027KV is 3 for input 1 output HDMI/DVI switch LSI. Each port supports 2.25Gbps. (HDMI 1.3a)
This device control is simple. It requires only 3.3V source and a few GPIO controls.
Terminated resistors(50Ω) are integrated at input port. When channel is not selected, termination resistors are turned off.
TMDS inputs are high impedance.
This device is integrated equalization function and DDC buffer function, so It can adapt long cable.
●Features
1) Supports 2.25 Gbps signaling rate for 480i/p, 720i/p, and 1080i/p resolution to 12-bit color depth
2) Compatible with HDMI 1.3a
3) 5V tolerance to all DDC and HPD_SINK inputs
4) Integrated DDC buffer
5) Integrated switchable 50Ωreceiver termination
6) Integrated equalizer circuit to adapt long cable
7) HBM ESD protection exceeds 10kV
8) 3.3V fixed supply to TMDS I/Os
9) 64Pin VQFP package
10) ROHS compatible
●Applications
Digital TV, DVD Player, Set-Top-Box, Audio Video Receiver, Digital Projector, DVI or HDMI Switch Box
●Line up matrix
Part No.
Power
Supply
(V)
ESD
(KV)
BU16020KV
3 to 3.6
10
BU16018KV
3 to 3.6
10
BU16027KV
3 to 3.6
10
BU16006KV
3 to 3.6
10
BU16024KV
3 to 3.6
10
Input
(ch)
HDMI
4ch
HDMI
3ch
HDMI
3ch
HDMI
2ch
HDMI
1ch
Output
(ch)
Data rate
(Gbps)
Hot
Plug
Control
Termination
Sense
Correspondence
Switching
Method
DDC
Buffer
Equalizer
De emphasis
Package
RoHS
2
Yes
VQFP100
Yes
Yes
VQFP80
Yes
VQFP64
Yes
VQFP64
Yes
VQFP48C
Yes
HDMI 1ch
2.7
Yes
Yes
GPIO/I C
Yes
Yes
(adaptive)
HDMI 1ch
2.25
Yes
Yes
GPIO
Yes
Yes
HDMI 1ch
2.25
Yes
Yes
GPIO
Yes
Yes
HDMI 1ch
2.25
Yes
Yes
GPIO
Yes
Yes
HDMI 1ch
2.25
Yes
Yes
-
Yes
Yes
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© 2009 ROHM Co., Ltd. All rights reserved.
1/19
Yes
(Always ON)
Yes
(Always ON)
Yes
2009.05 - Rev.D
Technical Note
BU16027KV
●OUTSIDE DIMENSION CHART
BU16027KV
1PIN MARK
Lot No.
Figure 1-1 Outside dimension chart
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© 2009 ROHM Co., Ltd. All rights reserved.
2/19
2009.05 - Rev.D
Technical Note
BU16027KV
●BLOCK DIAGRAM
A14
B14
A13
B13
A12
B12
A11
B11
VCC
RINT
VCC
RINT
VCC
RINT
VCC
RINT
RINT
TMDS
RX
RINT
TMDS
RX
RINT
TMDS
RX
RINT
TMDS
RX
VCC
RINT
RINT
Y4
A24
TMDS
RX
B24
TMDS
Drive
Z4
VCC
RINT
RINT
A23
Y3
TMDS
RX
B23
TMDS
Drive
VCC
RINT
A22
Y2
TMDS
RX
B22
TMDS
Drive
VCC
A21
Z3
RINT
RINT
Y1
TMDS
RX
B21
TMDS
Drive
Z1
VSADJ
VCC
RINT
Z2
RINT
RINT
A34
TMDS
RX
B34
VCC
RINT
RINT
A33
TMDS
RX
B33
VCC
RINT
RINT
A32
TMDS
RX
B32
VCC
RINT
RINT
A31
B31
TMDS
RX
HPD1
S1
HPD2
S2
HPD3
HPD_SINK
SCL1
SDA1
SCL_SINK
Control Logic
SCL2
SDA_SINK
SDA2
SCL3
SDA3
Figure 2-1 Block Diagram
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© 2009 ROHM Co., Ltd. All rights reserved.
3/19
2009.05 - Rev.D
Technical Note
BU16027KV
●PIN EXPLANATION
1). PIN ASSIGNMENT
33
34
35
36
37
38
39
40
41
42
43
44
45
32
50
31
51
30
52
29
53
28
54
27
55
26
57
BU16027KV
BU16028KV
58
(64-pin VQFP)
56
25
24
23
Vcc
Z2
Y2
GND
Z3
Y3
Vcc
Z4
Y4
16
15
14
13
12
11
17
10
18
64
9
63
8
19
7
62
6
20
5
21
61
4
60
3
22
2
59
S1
HPD_SINK
SDA_SINK
SCL_SINK
GND
Z1
Y1
SDA3
SCL3
GND
B31
A31
Vcc
B32
A32
GND
B33
A33
Vcc
B34
A34
GND
VSADJ
1PIN
MARK
46
49
1
Reserve2
HPD2
SDA2
SCL2
B21
A21
Vcc
B22
A22
GND
B23
A23
Vcc
B24
A24
HPD3
47
48
A14
B14
Vcc
A13
B13
GND
A12
B12
Vcc
A11
B11
SCL1
SDA1
HPD1
Reserve1
S2
(TOP VIEW)
Figure 3-1 Pin Location
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© 2009 ROHM Co., Ltd. All rights reserved.
4/19
2009.05 - Rev.D
Technical Note
BU16027KV
2). PIN LIST
TERMINAL
NAME
A11, A12, A13, A14
A21, A22, A23, A24
A31, A32, A33, A34
B11, B12, B13, B14
B21, B22, B23, B24
B31, B32, B33, B34
GND
HPD1
HPD2
HPD3
HPD_SINK
Reserve1
Reserve2
SCL1
SCL2
SCL3
SCL_SINK
SDA1
SDA2
SDA3
SDA_SINK
S1, S2
VCC
No.
39, 42, 45, 48
54, 57, 60, 63
5, 8, 11, 14
38, 41, 44, 47
53, 56, 59, 62
4, 7, 10, 13
3, 9, 15, 22,
28, 43, 58
35
50
64
31
34
49
37
52
2
29
36
51
1
30
32, 33
6, 12, 19, 25,
40, 46, 55, 61
I/O
I
I
I
I
I
I
Source port 1 TMDS positive inputs
Source port 2 TMDS positive inputs
Source port 3 TMDS positive inputs
Source port 1 TMDS negative inputs
Source port 2 TMDS negative inputs
Source port 3 TMDS negative inputs
-
Ground
O
O
O
I
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
16
I
Y1, Y2, Y3, Y4
Z1, Z2, Z3, Z4
26, 23, 20, 17
27, 24, 21, 18
O
O
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Source port 1 hot plug detector output (status pin)
Source port 2 hot plug detector output (status pin)
Source port 3 hot plug detector output (status pin)
Sink port hot plug detector input (status pin)
In High, Low, and Open, any setting is OK.
Non Connect Pin
Source port 1 DDC I2C clock line
Source port 2 DDC I2C clock line
Source port 3 DDC I2C clock line
Sink port DDC I2C clock line
Source port 1 DDC I2C data line
Source port 2 DDC I2C data line
Source port 3 DDC I2C data line
Sink port DDC I2C data line
Source selector
-
VSADJ
© 2009 ROHM Co., Ltd. All rights reserved.
DESCRIPTION
Power supply
TMDS compliant voltage swing control
(via 4.64kΩto GND)
Sink port TMDS positive outputs
Sink port TMDS negative outputs
5/19
2009.05 - Rev.D
Technical Note
BU16027KV
●EQUIVALENT INPUT AND OUTPUT SCHEMATIC DIAGRAMS
TMDS Input Stage
TMDS Output Stage
VDD
HPD Output Stage
VDD
VDD
VDD
50Ω
50Ω
Anm
Ym
Bnm
Zm
HPDn
10mA
R-Side I2 C Input/Output Stage
T-Side I2 C Input/Output Stage
VDD
SCL_SINK
SDA_SINK
SCL
SDA
VDD
HPD_SINK
VDD
※n=1,2,3 m=1,2,3,4
Figure 4-1 I/O pin schematic diagram
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© 2009 ROHM Co., Ltd. All rights reserved.
6/19
2009.05 - Rev.D
Technical Note
BU16027KV
●SOURCE SELECTION LOOKUP TABLE
CONTROL PINS
I/O SELECTED
HPD_SINK
S1
S2
H/L
H
H
H/L
L
H
H/L
L
L
H/L
H
HOT PLUG DETECT STATUS
SCL_SINK
HPD1
HPD2
SDA_SINK
Y/Z
A1/B1
Terminations of A2/B2
and A3/B3 are
disconnected
A2/B2
Terminations of A1/B1
and A3/B3 are
disconnected
A3/B3
Terminations of A1/B1
and A2/B2 are
disconnected
L
None (Z)
All terminations are
disconnected
HPD3
SCL1
SDA1
HPD
_SINK
L
L
SCL2
SDA2
L
HPD
_SINK
L
SCL3
SDA3
L
L
HPD
_SINK
None (Z)
Are pulled HIGH by
external pull-up
termination
HPD
_SINK
HPD
_SINK
HPD
_SINK
(1)H: Logic high; L: Logic low; X: Don't care; Z: High impedance
Figure 4-2 Supply voltage(Vcc) vs. Supply current(Icc) [S1=H,S2=L]
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© 2009 ROHM Co., Ltd. All rights reserved.
7/19
2009.05 - Rev.D
Technical Note
BU16027KV
●ERECTRICAL SPECIFICATIONS
1.) ABSOLUTE MAXIMUM RATINGS
Over operating free-air temperature range (unless otherwise noted)(1)
ITEM
MIN.
TYP.
MAX.
Power supply voltage(Vcc)
-0.3
4.0
DDC, HPD_SINK input voltage
-0.3
6.0
Differential input voltage
2.5
4.0
S1, S2 input voltage
-0.3
4.0
Power dissipation
1250
Strage temperture range
-55
125
※70mm×70mm×1.6mm glass epoxy board mount.(Reverse Cu occupation rate:15mm×15mm)
When it’s used by than Ta=25℃, it’s reduced by 12.5mW/℃.
2.) RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
VCC
Supply voltage
TA
Operating free-air temperature
TMDS DIFFERENTIAL PINS
VIC
Input common mode voltage
VID
Receiver peak-to-peak differential input voltage
RVSADJ
Resistor for TMDS compliant voltage swing range
AVCC
TMDS Output termination voltage, see Figure 5-1.
RT
Termination resistance, see Figure 5-1.
Signaling rate
CONTROL PINS (S1,S2)
VIH
LVTTL High-level input voltage
VIL
LVTTL Low-level input voltage
STATUS(HPD_SINK)
VIH
LVTTL High-level input voltage
VIL
LVTTL Low-level input voltage
DDC PINS (SCL_SINK, SDA_SINK,SDA[2:1],SCL[2:1])
VI(DDC)
Input voltage
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© 2009 ROHM Co., Ltd. All rights reserved.
8/19
UNIT
V
V
V
V
mW
℃
MIN.
3
0
TYP.
3.3
-
MAX.
3.6
70
UNIT
V
℃
VCC–0.6
150
4.60
3
45
0
4.64
3.3
50
-
VCC+0.01
1560
4.68
3.6
55
2.25
V
mVp-p
kΩ
V
Ω
Gbps
2
GND
-
VCC
0.8
V
V
2.4
GND
-
5.5
0.8
V
V
GND
-
5.5
V
2009.05 - Rev.D
Technical Note
BU16027KV
3.) ELECTRICAL CHARACTERISTICS
Over recommended operating conditions (unless otherwise noted)
PARAMETER
SYMBOL
Icc
Supply current
PD
Power dissipation
TMDS DIFFERENTIAL PINS (A/B;Y/Z)
Single-ended high-level output
VOH
voltage
Single-ended low-level output
VOL
voltage
Single-ended low-level swing
VSWING
voltage
Overshoot of output differential
Vod(O)
voltage
Undershoot of output
Vod(U)
differential voltage
VOD(pp)
RINT
⊿VOC(SS)
Steady state output differential
voltage
Input termination resistance
Change in steady-state
common-mode output voltage
between logic states
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© 2009 ROHM Co., Ltd. All rights reserved.
TEST CONDITIONS
VIH- = Vcc,VIL = Vcc-0.4V,RVSADJ =
4.64kΩ
RT = 50Ω,AVcc = 3.3V
Am/Bm = 2.25 Gbps HDMI data
pattern,
m = 2,3,4
A1,/B1 = 225 MHz clock
VIH = Vcc,VIL = Vcc-0.4V,RVSADJ =
4.64kΩ
RT = 50Ω,AVcc = 3.3V
Am/Bm = 2.25Gbps HDMI data
pattern,
m = 2,3,4
A1/B1 =255 MHZ clock
MIN.
LIMITS
TYP.(1)
MAX.
-
120
150
mA
-
450
600
mW
-
Avcc-50
mV
-
Avcc-400
mV
300
-
460
mV
-
6%
15%
2xVswing
-
12%
25%
2xVswing
600
-
920
mVp-p
45
50
55
Ω
-
5
-
mV
AVcc200
AVcc600
See Figure 5-2, AVcc = 3.3V,
RT = 50Ω
See Figure 5-2,
Am/Bm = 250 Mbps HDMI data
pattern ,
m = 2,3,4
A1/B1 = 25 MHz clock
VIN = 2.9V
9/19
UNIT
2009.05 - Rev.D
Technical Note
BU16027KV
LIMITS
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.(1)
MAX.
UNIT
DDC Input and output
Tx
VIH
High-level input voltage
2.1
-
5.5
V
VIL
Low-level input voltage
-0.3
-
0.35
V
-10
-10
-10
-10
0.43
0.5
10
10
10
10
0.57
uA
uA
uA
uA
V
20
100
190
mV
IlKT
IlKT
IOHT
IILT
VOLT
VOLT-VIL
Input leak current,
Input leak current,
High-level output current
Low-level input current
Low-level output voltage
Low-level input voltage below
output low-level voltage
VI=5.5V
VI=Vcc
VO=3.6V
VIL=GND
RL=4.7kΩ
Rx
VIH
High-level input voltage
2.4
-
5.5
V
VIL
IlKR
Low-level input voltage
Input leak current
VI=5.5V
-0.3
-10
-
0.8
10
V
uA
IlKR
IOHR
Input leak current
High-level output current
VI=Vcc
VO=3.6V
-10
-10
-
10
10
uA
uA
IILR
Low-level input current
VIL=GND
-10
-
10
uA
-
-
0.2
V
2.4
0
-
Vcc
0.4
V
V
-10
-10
-
10
10
uA
uA
10
5
-10
50
30
-
100
80
10
uA
uA
uA
VOLR
Low-level output voltage
Iout = 4mA
DDC Input and output
STATUS PINS (HPD 1, HPD 2, HPD 3)
VOH(TTL)
TTL High –level output voltage IOH = -8mA
VOL(TTL)
TTL Low –level output voltage
IOL = 8mA
CONTROL PINS (S1, S2 )
IIH
High –level digital input current VIH = Vcc
IIL
Low –level digital input current
VIL = GND
STATUS PINS (HPD_SINK)
VIH = 5.5V
IIH
High –level digital input current
VIH = Vcc
IIL
Low –level digital input current
VIL = GND
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© 2009 ROHM Co., Ltd. All rights reserved.
10/19
2009.05 - Rev.D
Technical Note
BU16027KV
SYMBOL
PARAMETER
TEST CONDITIONS
MIN.
LIMITS
TYP.(1)
MAX.
UNIT
DDC Input and output
Tx
VIH
High-level input voltage
2.1
-
5.5
V
VIL
Low-level input voltage
-0.3
-
0.35
V
-10
-10
-10
-10
0.43
0.5
10
10
10
10
0.57
uA
uA
uA
uA
V
20
100
190
mV
-
5.5
0.8
10
V
V
uA
IlKT
IlKT
IOHT
IILT
VOLT
VOLT-VIL
Input leak current,
Input leak current,
High-level output current
Low-level input current
Low-level output voltage
Low-level input voltage below
output low-level voltage
VI=5.5V
VI=Vcc
VO=3.6V
VIL=GND
RL=4.7kΩ
Rx
VIH
VIL
IlKR
High-level input voltage
Low-level input voltage
Input leak current
VI=5.5V
2.4
-0.3
-10
IlKR
IOHR
Input leak current
High-level output current
VI=Vcc
VO=3.6V
-10
-10
-
10
10
uA
uA
IILR
Low-level input current
VIL=GND
-10
-
10
uA
-
-
0.2
V
2.4
0
-
Vcc
0.4
V
V
-10
-10
-
10
10
uA
uA
10
5
-10
50
30
-
100
80
10
uA
uA
uA
VOLR
Low-level output voltage
Iout = 4mA
DDC Input and output
STATUS PINS (HPD 1, HPD 2, HPD 3)
VOH(TTL)
TTL High –level output voltage IOH = -8mA
VOL(TTL)
TTL Low –level output voltage
IOL = 8mA
CONTROL PINS (S1, S2 )
IIH
High –level digital input current VIH = Vcc
IIL
Low –level digital input current
VIL = GND
STATUS PINS (HPD_SINK)
VIH = 5.5V
IIH
High –level digital input current
VIH = Vcc
IIL
Low –level digital input current
VIL = GND
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© 2009 ROHM Co., Ltd. All rights reserved.
11/19
2009.05 - Rev.D
Technical Note
BU16027KV
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
MIN.
TYP.(1)
MAX.
UNIT
TMDS DIFFERENTIAL PINS (Y/Z)
Propagation delay time
480
ps
tPLH
low-high-level output
Propagation delay time
tPHL
500
ps
low-high-level output
Differential output signal rise
tr
150
ps
time (20%-80%)
Differential output signal fall
See Figure 5-2, AVCC = 3.3V,
tf
150
ps
time (20%-80%)
RT = 50Ω
tsk(p)
Pulse skew (|tPHL - tPLH |)
20
ps
Intra-pair differential skew,
tsk(D)
50
ps
see Figure 5-3.
Inter-pair channel-to-channel
tsk(o)
50
ps
output skew(2)
3
tsk(pp)
Part to part skew( )
400
ps
DDC I/O PINS (SCL, SCL_SINK, SDA, SDA_SINK)
Propagation delay time,
tpdLHTR
low-to-high-level output
650
ns
(DDC)
Tx to Rx
RL = 4.7kΩ CL = 100pF
Propagation delay time,
tpdHLTR
high-to-low-level output
200
ns
(DDC)
Tx to Rx
Propagation delay time,
tpdLHRT
low-to-high-level output
500
ns
(DDC)
Rx to Tx
RL = 1.67kΩ CL = 400pF
Propagation delay time,
tpdHLRT
high-to-low-level output
350
ns
(DDC)
Rx to Tx
tr Tx(DDC) Tx output Rise time
800
ns
RL = 4.7kΩ CL = 100pF
tf Tx(DDC) Tx output Fall time
150
ns
tr Rx(DDC) Rx output Rise time
950
ns
RL = 1.67kΩ CL = 400pF
tf Rx(DDC) Rx output Fall time
50
ns
tsx
Select to switch output
8
ns
tdis
Disable time
5
ns
ten
Enable time
7
ns
Switch time from SCLn to
tsx(DDC)
CL=10pF
800
ns
SCL_SINK
CIO
Input/output capacitance
VI=0V
15
pF
STATUS PINS (HPD1,HPD2,HPD3)
Propagation delay time,
tpdLH(HPD) low-to-high-level output from CL=10pF
5
ns
HPD_SINK to HPDn(n=1,2,3)
Propagation delay time,
tpdHL(HPD) high-to-low-level output from CL=10pF
5
ns
HPD_SINK to HPDn(n=1,2,3)
Switch time from port select to
tsx(HPD)
CL=10pF
8
ns
the latest valid status of HPD
Note:
1. All typical values are at 25℃ and with a 3.3V supply.
2. tsk(o) is the magnitude of the difference in propagation delay times between any specified terminals of channel 2 to 4 of a
devices when inputs are tied together.
3. tsk(pp) is the magnitude of the difference in propagation delay times between any specified terminals of channel 2 to 4 of two
devices, or between channel 1 of two devices, when both devices operate with the same source, the same supply voltages,
at the same temperature, and have identical packages and test circuits.
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© 2009 ROHM Co., Ltd. All rights reserved.
12/19
2009.05 - Rev.D
Technical Note
BU16027KV
●
MEASUREMENT SYMBOL AND CIRCUIT
AVCC
RT
RT
Zo = RT
TMDS
Receiver
Zo = RT
TMDS
Driver
Figure 5-1 Termination for TMDS Output Driver
Vcc
R INT
A
V ID
VA
R INT
TMDS
Driver
TMDS
Receiver
B
VB
RT
Y
CL
0.5pF
Z
AV CC
RT
VY
VZ
V ID = V A - V B
V swing = V Y - V Z
DC Coupled
AC Coupled
VA
Vcc V
Vcc+0.2 V
VB
Vcc-0.4 V
Vcc-0.2 V
VID
VID(pp)
0.4 V
VIC
0V
-0.4 V
tPLH
tPLH
80%
Vswing
VOD(O)
VOD(pp)
20%
tf
100%
0V Differential
0%
tr
VOD(U)
VOC
△VOC(SS)
Figure 5-2 Timing Test Circuit and Definitions
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© 2009 ROHM Co., Ltd. All rights reserved.
13/19
2009.05 - Rev.D
Technical Note
BU16027KV
VY
V OH
50%
VZ
V OL
tsk(D)
Figure 5-3 Definition of Intra-Pair Differential Skew
Vcc V
Vcc-0.4 V
Vcc-0.4 V
Vcc V
Vcc-0.4 V
Vcc V
A
B
A
Port 2
B
Port 3 A
B
Port 1
VDD
2
VDD
0V
S1
Clocking
S2
tsx
tsx
Y
Output
Z
75mV
75mV
-75mV
HI-Z
tdis
-75mV
ten
Figure 5-4 TMDS Outputs Control Timing Definitions
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© 2009 ROHM Co., Ltd. All rights reserved.
14/19
2009.05 - Rev.D
Technical Note
BU16027KV
VDD
2
HPD_SINK
VDD
2
HPD1
tpdHL(HPD)
tpdLH(HPD)
tsx(HPD)
2.4V
HPD2
HPD3
0V
S1
Vcc
2
S2
SDA_SINK
tpdHLRT(DDC) tpdLHRT(DDC)
80%
20%
tpdHLTR(DDC)
tpdLHTR(DDC)
1.5V
V IL
SDA1
80%
20%
1.5V
SDA2
SDA3
VDD
tSX(DDC)
0V
tfTX(DDC)
trTX(DDC)
tfRX(DDC)
RX to TX
trRX(DDC)
VDD
TX to RX
Figure 5-5 DDC and HPD Timing Definitions
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© 2009 ROHM Co., Ltd. All rights reserved.
15/19
2009.05 - Rev.D
Technical Note
BU16027KV
1). HPD_SINK Pull down resistance.
HPD_SINK is a 5V tolerant structure shown in Figure 6-1.
It needs some drive current to pull down HPD_SINK "H" to "L"([email protected]_SINK=2V).
So to pull down HPD_SINK, please use 10kΩ(or under 10kΩ) resistor.
VCC
B U 1 6 0 2 7 KV
HPD_SINK
10kΩ
Figure 6-1 HPD_SINK I/O schematic
2). About don’t use terminal.
Unused TMDS input channel can be opened.
B U 1 6 0 2 7 KV
Vcc
R INT
R INT
RT
A
TMDS
Receiver
TMDS
Driver
Y
Z
B
AVcc
RT
Figure 6-2 TMDS Input Fail-Safe Recommendation
Unused DDC Buffers of R side polled up to Vdd.
VCC
4.7k
T
RSCL
RSDA
TSCL
TSDA
R
Figure 6-3 DDC Buffers in BU16027KV
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© 2009 ROHM Co., Ltd. All rights reserved.
16/19
2009.05 - Rev.D
Technical Note
BU16027KV
Open unused HPDn.
Figure 6-4 Open unused HPDn
3). About serial connect notice.
When HDMI sw output connect to other HDMI sw input like following application.
There is possibility that. 1080p(12bit) image isn’t displayed. It’s depend on receiver IC characteristic.
When system is required 1080p (12bit) Rohm doesn’t recommend serial connect application. .
Vcc
RINT
Vcc
RINT
RINT
RINT
RT
A
TMDS
Receiver
TMDS
Driver
B
Y
A
Z
B
TMDS
Receiver
TMDS
Driver
Y
Z
AVCC
RT
Figure 6-5 serial connect notice
4). Offset voltage appearance.
If differential input is opened, offset voltage appear at differential output OE is set to low to avoid it.
Figure 6-6 Offset voltage avoid
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© 2009 ROHM Co., Ltd. All rights reserved.
17/19
2009.05 - Rev.D
Technical Note
BU16027KV
5). Limitation of Master and slave direction.
Figure 6-7 Limitation of Master and slave direction
6). Attention in use as repeater.
Figure 6-8 Ioff specification not meet to HDMI CTS
Depend on HDMI CTS, Voff must be less than VDD-10mV, but this IC not meet to CTS cause of Ioff.
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© 2009 ROHM Co., Ltd. All rights reserved.
18/19
2009.05 - Rev.D
Technical Note
BU16027KV
Ordering part number
B U 1 6 0 2 7
K V
Package type
VQFP64
ROHM model name
Package specification
VQFP64
<Tape and Reel information>
12.0±0.2
10.0±0.1
48
32
Tray (with dry pack)
Quantity
1000pcs
17
64
1
1.0±0.2
1.25
0.5±0.15
Direction of feed Direction of product is fixed in a tray
10.0±0.1
12.0±0.2
49
1pin
16
1PIN MARK
+0.05
0.145 -0.03
1.6MAX
1.25
Container
33
0.1±0.05
1.4±0.05
4 +6
–4
0.08 S
+0.05
0.2 -0.04
0.08
M
0.5±0.1
∗ Order quantity needs to be multiple of the minimum quantity.
(Unit : mm)
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© 2009 ROHM Co., Ltd. All rights reserved.
19/19
2009.05 - Rev.D
Notice
Notes
No copying or reproduction of this document, in part or in whole, is permitted without the
consent of ROHM Co.,Ltd.
The content specified herein is subject to change for improvement without notice.
The content specified herein is for the purpose of introducing ROHM's products (hereinafter
"Products"). If you wish to use any such Product, please be sure to refer to the specifications,
which can be obtained from ROHM upon request.
Examples of application circuits, circuit constants and any other information contained herein
illustrate the standard usage and operations of the Products. The peripheral conditions must
be taken into account when designing circuits for mass production.
Great care was taken in ensuring the accuracy of the information specified in this document.
However, should you incur any damage arising from any inaccuracy or misprint of such
information, ROHM shall bear no responsibility for such damage.
The technical information specified herein is intended only to show the typical functions of and
examples of application circuits for the Products. ROHM does not grant you, explicitly or
implicitly, any license to use or exercise intellectual property or other rights held by ROHM and
other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the
use of such technical information.
The Products specified in this document are intended to be used with general-use electronic
equipment or devices (such as audio visual equipment, office-automation equipment, communication devices, electronic appliances and amusement devices).
The Products specified in this document are not designed to be radiation tolerant.
While ROHM always makes efforts to enhance the quality and reliability of its Products, a
Product may fail or malfunction for a variety of reasons.
Please be sure to implement in your equipment using the Products safety measures to guard
against the possibility of physical injury, fire or any other damage caused in the event of the
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More detail product informations and catalogs are available, please contact us.
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R0039A