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MIC2193
Micrel
MIC2193
400kHz SO-8 Synchronous Buck Control IC
General Description
Features
Micrel’s MIC2193 is a high efficiency, PWM synchronous
buck control IC housed in the SO-8 package. Its 2.9V to 14V
input voltage range allows it to efficiently step down voltages
in 3.3V, 5V, and 12V systems as well as 1- or 2-cell Li Ion
battery powered applications.
The MIC2193 solution saves valuable board space. The
device is housed in the space-saving SO-8 package, whose
low pin-count minimizes external components. Its 400kHz
PWM operation allows a small inductor and small output
capacitors to be used. The MIC2193 can implement allceramic capacitor solutions.
The MIC2193 drives a high-side P-channel MOSFET, eliminating the need for high-side boot-strap circuitry. This feature
allows the MIC2193 to achieve maximum duty cycles of
100%, which can be useful in low headroom applications. A
low output driver impedance of 4Ω allows the MIC2193 to
drive large external MOSFETs to generate a wide range of
output currents.
The MIC2193 is available in an 8 pin SOIC package with a
junction temperature range of –40°C to +125°C.
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•
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•
2.9V to 14V input voltage range
400kHz oscillator frequency
PWM current mode control
100% maximum duty cycle
Front edge blanking
4Ω output drivers
Cycle-by-cycle current limiting
Frequency foldback short circuit protection
8 lead SOIC package
Applications
•
•
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•
•
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•
Point of load power supplies
Distributed power systems
Wireless Modems
ADSL line cards
Servers
Step down conversion in 3.3V, 5V, and 12V systems
1-and 2-cell Li Ion battery operated equipment
Typical Application
VIN
3.3V
0.012Ω
120µF
6.3V
(×2)
MIC2193BM
VIN
VDD
2k
1µF
CS
OUTP
COMP OUTN
GND
FB
Si9803
(×2)
VOUT
1.8V, 5A
3.8µH
Si9804
(×2)
10k
22.6k
2.2nF
220µF
6.3V
(×2)
Adjustable Output Synchronous Buck Converter
Micrel, Inc. • 1849 Fortune Drive • San Jose, CA 95131 • USA • tel + 1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
April 2004
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M9999-042704
MIC2193
Micrel
Ordering Information
Part Number
Voltage
Frequency
Temperature Range
Package
Lead Finish
MIC2193BM
Adjustable
400KHz
–40°C to +125°C
8-lead SOP
Standard
MIC2193YM
Adjustable
400KHz
–40°C to +125°C
8-lead SOP
Pb-Free
Pin Configuration
VIN 1
8 OUTP
COMP 2
7 OUTN
FB 3
6 GND
CS 4
5 VDD
8 Lead SOIC (M)
Pin Description
Pin Number
Pin Name
1
VIN
2
COMP
3
FB
Feedback Input: The circuit regulates this pin to 1.245V.
4
CS
The (–) input to the current limit comparator. A built in offset of 110mV
between VIN and CSL in conjunction with the current sense resistor sets the
current limit threshold level. This is also the (–) input to the current amplifier.
5
VDD
3V internal linear-regulator output. VDD is also the supply voltage bus for the
chip. Bypass to GND with 1µF.
6
GND
Ground.
7
OUTN
High current drive for the synchronous N-channel MOSFET. Voltage swing
is from ground to VIN. On-resistance is typically 6Ω at 5VIN.
8
OUTP
High current drive for the high side P-channel MOSFET. Voltage swing is
from ground to VIN. On-resistance is typically 6Ω at 5VIN.
M9999-042704
Pin Function
Controller supply voltage. Also the (+) input to the current sense amp.
Compensation (Output): Internal error amplifier output. Connect to a
capacitor or series RC network to compensate the regulator’s control loop.
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Absolute Maximum Ratings (Note 1)
Operating Ratings (Note 2)
Supply Voltage (VIN) ..................................................... 15V
Digital Supply Voltage (VDD) ........................................... 7V
Comp Pin Voltage (VCOMP) ............................ –0.3V to +3V
Feedback Pin Voltage (VFB) .......................... –0.3V to +3V
Current Sense Voltage (VIN – VCS) ................ –0.3V to +1V
Power Dissipation (PD) ..................... 285mW @ TA = 85°C
Ambient Storage Temp ............................ –65°C to +150°C
ESD Rating Note 3 ....................................................... 2kV
Supply Voltage (VIN) .................................... +2.9V to +14V
Junction Temperature ....................... –40°C ≤ TJ ≤ +125°C
Package Thermal Resistance
θJA 8-lead SOP ................................................. 140°C/W
Electrical Characteristics
VIN = 5V, VOUT = 3.3V, TJ = 25°C, unless otherwise specified. Bold values indicate –40°C<TJ<+125°C.
Parameter
Condition
Min
Typ
Max
Units
1.233
1.22
1.245
1.245
1.257
1.27
V
V
Regulation
Feedback Voltage Reference
(1%)
(2%)
Feedback Bias Current
50
nA
Output Voltage Line Regulation
5V ≤ VIN ≤12V
0.09
%/V
Output Voltage Load Regulation
0mV < (VIN – VCS) < 75mV
0.9
%
Output Voltage Total Regulation
5V ≤VIN ≤12V, 0mV < (VIN – VCS) < 75mV (±3%)
1.208
1.282
V
1
2
mA
3.0
3.18
V
Input & VDD Supply
VIN Input Current (IQ)
(excluding external MOSFET gate current)
Digital Supply Voltage (VDD)
IL = 0
Digital Supply Load Regulation
IL = 0 to 1mA
0.1
V
Undervoltage Lockout
VDD upper threshold (turn on threshold)
2.65
V
100
mV
2.82
UVLO Hysteresis
Current Limit
Current Limit Threshold Voltage
VIN – VCS voltage to trip current limit
90
110
130
mV
Error Amplifier
Error Amplifier Gain
20
V/V
3.0
V/V
Current Amplifier
Current Amplifier Gain
Oscillator Section
Oscillator Frequency (fO)
360
400
100
440
kHz
Maximum Duty Cycle
VFB = 1.0V
Minimum On Time
VFB = 1.5V
165
ns
Frequency Foldback Threshold
Measured on FB
0.3
V
90
kHz
Frequency Foldback Frequency
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3
%
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MIC2193
Parameter
Micrel
Condition
Min
Typ
Max
Units
Gate Drivers
Rise/Fall Time
CL = 3300pF
50
Output Driver Impedance
Source, VIN = 12V
Sink, VIN = 12V
Source, VIN = 5V
Sink, VIN = 5V
4
4
6
6
Driver Non-overlap Time
VIN = 12V
VIN = 5V
VIN = 3.3V
ns
Ω
Ω
Ω
Ω
10
10
12
12
50
80
160
ns
ns
ns
Note 1.
Absolute maximum ratings indicate limits beyond which damage to the component may occur. Electrical specifications do not apply when
operating the device outside of its operating ratings. The maximum allowable power dissipation is a function of the maximum junction
temperature, TJ(Max), the junction-to-ambient thermal resistance, θJA, and the ambient temperature, TA.
Note 2.
The device is not guaranteed to function outside its operating rating.
Note 3.
Devices are ESD sensitive, handling precautions required. Human body model, 1.5kΩ in series with 100pF.
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Typical Characteristics
Quiescent Current
vs. Supply Voltage
Quiescent Current
vs. Temperature
2
1
3.10
3.08
3.06
3.04
3.02
3.00
2.98
2.96
2.94
2.92
2.90
0
5
10
SUPPLY VOLTAGE (V)
VDD vs. Load
VIN = 5V
VIN = 3.3V
3.10
3.00
2.90
2.80
VIN = 5V
2.50
-40 -20 0 20 40 60 80 100 120
TEMPERATURE (°C)
5
1.5
1.0
0.5
0
-0.5
-1.0
-1.5
5
10
INPUT VOLTAGE (V)
15
0
-5
-10
-15
VIN = 5V
-20
-40 -20 0 20 40 60 80 100 120
TEMPERATURE (°C)
Current Limit Threshold
vs. Temperature
2.80
0
5
10
INPUT VOLTAGE (V)
15
Reference Voltage
vs. Temperature
VDD vs. Temperature
Switching Frequency
vs. Temperature
2.0
2.95
2.85
VIN = 5V
2.70
2.60
0.2 0.4 0.6 0.8
1
1.2
VDD LOAD CURRENT (mA)
3.00
2.90
0.4
0.2
3.30
3.20
VIN = 12V
FREQUENCY VARIATION (%)
1.300
1.290
VIN = 5V
1.280
1.270
1.260
1.250
1.240
1.230
1.220
1.210
1.200
-40 -20 0 20 40 60 80 100 120
TEMPERATURE (°C)
Overcurrent Threshold
vs. Input Voltage
130
125
120
115
110
105
100
95
90
0
OUTN Drive Impedance
vs. Input Voltage
2 4 6 8 10 12 14
INPUT VOLTAGE (V)
OUTN Drive Impedance vs.
Input Voltage
120
VIN = 5V
110
105
100
95
90
IMPEDANCE (Ω)
115
14.0
14
12.0
12
10.0
8.0
6.0
4.0
Sink (Ω)
10
8
6
4
Source (Ω)
85
2.0
80
-40 -20 0 20 40 60 80 100 120
TEMPERATURE (°C)
0.0
0
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Source (Ω)
IMPEDANCE (Ω)
FREQUENCY VARIATION (%)
VDD (V)
0.8
0.6
3.50
3.40
2.5
CURRENT LIMIT THREHOLD (mV)
3.05
1.2
1.0
Switching Frequency
vs. Input Voltage
-2.0
0
3.10
1.6
1.4
0
-40 -20 0 20 40 60 80 100 120
TEMPERATURE (°C)
15
VDD vs. Input Voltage
3.15
REFERENCE VOLTAGE (V)
3
2.0
1.8
CURRENT LIMIT THRESHOLD (mV)
4
0
0
VDD (V)
QUIESCENT CURRENT (mA)
5
VDD (V)
QUIESCENT CURRENT (mA)
6
Sink (Ω)
2
4 6 8 10 12 14
INPUT VOLTAGE (V)
5
2
0
0
5
10
INPUT VOLTAGE (V)
15
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MIC2193
Micrel
Functional Diagram
VIN
CIN
CDECOUP
VIN
1
OVERCURRENT
COMPARATOR
VREF
1.245V
RSENSE
VDD
BIAS
5
GAIN
3
VDD
CURRENT
SENSE
AMP
ON
4
CSL
8
OUTP
VIN
fs/4
CONTROL
Q1
L1
VOUT
7
OSC
OUTN
Q2
D1
COUT
RESET
SLOPE
COMPENSATION
∑
PWM
COMPARATOR
gm = 0.0002 VREF
gain = 20
COMP
2
ERROR
AMP
3
FB
6
GND
100k
0.3V
fs/4
FREQUENCY
FOLDBACK
Figure 1. MIC2193 Block Diagram
ing cycle, the OUTP pin pulls low and turns on the high-side
P-Channel MOSFET, Q1. Current flows from the input to the
output through the current sense resistor, MOSFET, and
inductor. The current amplitude increases, controlled by the
inductor. The voltage developed across the current sense
resistor, RSENSE, is amplified inside the MIC2193 and combined with an internal ramp for stability. This signal is compared to the output of the error amplifier. When the current
signal equals the error voltage signal, the P-channel MOSFET
is turned off. The inductor current flows through the diode, D1,
until the synchronous, N-channel MOSFET turns on. The
voltage drop across the MOSFET is less than the forward
voltage drop of the diode, which improves the converter
efficiency. At the end of the switching period, the synchronous MOSFET is turned off and the switching cycle repeats.
Functional Characteristics
Controller Overview and Functional Description
The MIC2193 is a BiCMOS, switched mode, synchronous
step down (buck) converter controller. It uses both N- and Pchannel MOSFETs, which allows the controller to operate at
100% duty cycle and eliminates the need for a high-side drive
boot-strap circuit. Current mode control is used to achieve
superior transient line and load regulation. An internal corrective ramp provides slope compensation for stable operation
above a 50% duty cycle. The controller is optimized for high
efficiency, high performance DC-DC converter applications.
Figure 1 is a block diagram of the MIC2193 configured as a
synchronous buck converter. At the beginning of the switch-
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The MIC2193 controller is broken down into five functions.
• Control loop
- PWM operation
- Current mode control
• Current limit
• Reference and VDD
• MOSFET gate drive
• Oscillator
Control Loop
Current Limit
The output current is detected by the voltage drop across the
external current sense resistor (RSENSE in Figure 1.). The
current sense resistor must be sized using the minimum
current limit threshold. The external components must be
designed to withstand the maximum current limit. The current
sense resistor value is calculated by the equation below:
RSENSE =
PWM Control Loop
The maximum output current is:
The MIC2193 uses current mode control to regulate the
output voltage. This dual control loop method (illustrated in
Figure 2) senses the output voltage (outer loop) and the
inductor current (inner loop). It uses inductor current and
output voltage to determine the duty cycle of the buck
converter. Sampling the inductor current effectively removes
the inductor from the control loop, which simplifies compensation.
IOUT _ MAX =
VOUT
Voltage
Divider
IINDUCTOR
Switch
Driver
VERROR
VREF
IINDUCTOR
The output drivers are enabled when the VDD voltage (pin 5)
is greater than its undervoltage threshold.
The internal bias circuit generates an internal 1.245V bandgap reference voltage for the voltage error amplifier and a 3V
VDD voltage for the internal control circuitry. The VDD pin
must be decoupled with a 1µF ceramic capacitor. The capacitor must be placed close to the VDD pin. The other end of the
capacitor must be connected directly to the ground plane.
MOSFET Gate Drive
The MIC2193 is designed to drive a high-side, P-Channel
MOSFET and a low side, N-Channel MOSFET. The source
pin of the P-channel MOSFET is connected to the input of the
power supply. It is turned on when OUTP pulls the gate of the
MOSFET low. The advantage of using a P-channel MOSFET
is that it does not required a bootstrap circuit to boost the gate
voltage higher than the input, as would be required for an Nchannel MOSFET.
The VIN pin (pin 1) supplies the drive voltage to both gate
drive pins, OUTN and OUTP. The VIN pin must be well
decoupled to prevent noise from affecting the current sense
circuit, which uses VIN as one of the sense pins.
A non-overlap time is built into the MOSFET driver circuitry.
This dead time prevents the high-side and low-side MOSFET
drivers from being on at the same time. Either an external
diode or the low-side MOSFET internal parasitic diode conducts the inductor current during the dead time.
VERROR
tON
tPER
D = tON/tPER
Figure 2. Current Mode Control Example
As shown in Figure 1, the inductor current is sensed by
measuring the voltage across the resistor, RSENSE. A ramp is
added to the amplified current sense signal to provide slope
compensation, which is required to prevent unstable operation at duty cycles greater than 50%.
A transconductance amplifier is used for the error amplifier,
which compares an attenuated sample of the output voltage
with a reference voltage. The output of the error amplifier is
the compensation pin (COMP), which is compared to the
current sense waveform in the PWM block. When the current
signal becomes greater than the error signal, the comparator
turns off the high-side drive. The COMP pin provides access
to the output of the error amplifier and allows the use of
external components to stabilize the voltage loop.
April 2004
MAX _ CURRENT _ SENSE _ THRESHOLD
RSENSE
The current sense pins VIN (pin 1) and CSL (pin 4) are noise
sensitive due to the low signal level and high input impedance
and switching noise on the VIN pin. The PCB traces should
be short and routed close to each other. A 10nF capacitor
across the pins will attenuate high frequency switching noise.
When the peak inductor current exceeds the current limit
threshold, the overcurrent comparator turns off the high side
MOSFET for the remainder of the switching cycle, effectively
decreasing the duty cycle. The output voltage drops as
additional load current is pulled from the converter. When the
voltage at the feedback pin (FB) reaches approximately 0.3V,
the circuit enters frequency foldback mode and the oscillator
frequency will drop to approximately 1/4 of the switching
frequency. This limits the maximum output power delivered to
the load under a short circuit condition.
Reference and VDD Circuits
VIN
Switching
Converter
MIN _ CURRENT _ SENSE _ THRESHOLD
IOUT _ MAX
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Micrel
MOSFET Selection
The P-channel MOSFET must have a VGS threshold voltage
equal to or lower than the input voltage when used in a buck
converter topology. There is a limit to the maximum gate
charge the MIC2193 will drive. MOSFETs with higher gate
charge will have slower turn-on and turn-off times. Slower
transition times will cause higher power dissipation in the
MOSFETs due to higher switching transition losses. The
MOSFETs must be able to completely turn on and off within
the driver non-overlap time If both MOSFETs are conducting
at the same time, shoot-through will occur, which greatly
increases power dissipation in the MOSFETs and reduces
converter efficiency.
The MOSFET gate charge is also limited by power dissipation
in the MIC2193. The power dissipated by the gate drive
circuitry is calculated below:
PGATE_DRIVE = QGATE × VIN × fS
where:
QGATE is the total gate charge of both the N and Pchannel MOSFETs.
fS is the switching frequency
VIN is the gate drive voltage
The graph in Figure 3 shows the total gate charge that can be
driven by the MIC2193 over the input voltage range, for
different values of switching frequency.
Voltage
Amplifier
R2
VREF
1.245V
Figure 4
The output voltage is determined by the equation below.
R1
R2
Where: VREF for the MIC2193 is typically 1.245V.
Lower values of R1 are preferred to prevent noise from
appearing on the FB pin. A typically recommended value is
10kΩ. If R1 is too small in value it will decrease the efficiency
of the power supply, especially at low output loads.
Once R1 is selected, R2 can be calculated with the following
formula.
VOUT = VREF × 1 +
R2=
MAXIMUM GATE CHARGE (nC)
80
70
60
50
40
30
20
10
4 6 8 10 12 14
INPUT VOLTAGE (V)
Figure 3. MIC2193 Frequency vs Max. Gate Charge
Oscillator
The internal oscillator is free running and requires no external
components. The maximum duty cycle is 100%. This is
another advantage of using a P-channel MOSFET for the
high-side drive: it can continuously turned on.
A frequency foldback mode is enabled if the voltage on the
feedback pin (pin 3) is less than 0.3V. In frequency foldback,
the oscillator frequency is reduced by approximately a factor
of 4. Frequency foldback is used to limit the energy delivered
to the output during a short circuit fault condition.
Voltage Setting Components
The MIC2193 requires two resistors to set the output voltage
as shown in Figure 4.
M9999-042704
VREF × R1
VOUT – VREF
Efficiency Considerations
Efficiency is the ratio of output power to input power. The
difference is dissipated as heat in the buck converter. Under
light output load, the significant contributors are:
• The VIN supply current
To maximize efficiency at light loads:
• Use a low gate charge MOSFET or use the smallest
MOSFET, which is still adequate for maximum output
current.
• Use a ferrite material for the inductor core, which has
less core loss than an MPP or iron power core.
Under heavy output loads the significant contributors to
power loss are (in approximate order of magnitude):
• Resistive on time losses in the MOSFETs
• Switching transition losses in the high side MOSFET
• Inductor resistive losses
• Current sense resistor losses
• Input capacitor resistive losses (due to the capacitors
ESR)
To minimize power loss under heavy loads:
• Use low on resistance MOSFETs. Use low threshold
logic level MOSFETs when the input voltage is below
5V. Multiplying the gate charge by the on resistance
gives a figure of merit, providing a good balance
between low load and high load efficiency.
• Slow transition times and oscillations on the voltage
and current waveforms dissipate more power during
the turn on and turn off of the MOSFETs. A clean
layout will minimize parasitic inductance and capacitance in the gate drive and high current paths. This
will allow the fastest transition times and waveforms
without oscillations. Low gate charge MOSFETs will
100
90
2
R1
Pin 3
Max. Gate Charge
0
0
VOUT
MIC2193
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April 2004
MIC2193
Micrel
transition faster than those with higher gate charge
requirements.
• For the same size inductor, a lower value will have
fewer turns and therefore, lower winding resistance.
However, using too small of a value will require more
output capacitors to filter the output ripple, which will
force a smaller bandwidth, slower transient response
and possible instability under certain conditions.
• Lowering the current sense resistor value will de
crease the power dissipated in the resistor. However,
it will also increase the overcurrent limit and will
require larger MOSFETs and inductor components.
• Use low ESR input capacitors to minimize the power
dissipated in the capacitors ESR.
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Package Information
0.026 (0.65)
MAX)
PIN 1
0.157 (3.99)
0.150 (3.81)
DIMENSIONS:
INCHES (MM)
0.020 (0.51)
0.013 (0.33)
0.050 (1.27)
TYP
0.064 (1.63)
0.045 (1.14)
45°
0.0098 (0.249)
0.0040 (0.102)
0.197 (5.0)
0.189 (4.8)
0°–8°
SEATING
PLANE
0.010 (0.25)
0.007 (0.18)
0.050 (1.27)
0.016 (0.40)
0.244 (6.20)
0.228 (5.79)
8-Pin SOIC (M)
MICREL, INC. 1849 FORTUNE DRIVE SAN JOSE, CA 95131
TEL
+ 1 (408) 944-0800
FAX
+ 1 (408) 474-1000
WEB
USA
http://www.micrel.com
The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use.
Micrel reserves the right to change circuitry and specifications at any time without notification to the customer.
Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can
reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into
the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s
use or sale of Micrel Products for use in life support appliances, devices or systems is at Purchaser’s own risk and Purchaser agrees to fully indemnify
Micrel for any damages resulting from such use or sale.
© 2004 Micrel, Incorporated.
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