UESD6V8V4X Quad Channel Low Capacitance ESD Protection Array UESD6V8V4A SC70-6/SC88/SOT363 UESD6V8V4B SC89-6/SOT563/SOT666 UESD6V8V4C TSOP-6/SOT23-6 General Description UESD6V8V4X are surge rated diode arrays designed to protect high speed data interfaces. This series has been specifically designed to protect sensitive components which are connected to data and transmission lines from over-voltage caused by ESD (electrostatic discharge). The unique design incorporates surge rated, low capacitance steering diodes and a TVS diode in a single package. During transient conditions, the steering diodes direct the transient to either the positive side of the power supply line or to ground. The internal TVS diode prevents over-voltage on the power line, protecting any downstream components. The low capacitance array configuration allows the user to protect four high-speed data or transmission lines. The low inductance construction minimizes voltage overshoot during high current surges. This device is optimized for ESD protection of portable electronics. They may be used to meet the ESD immunity requirements of IEC 61000-4-2, Level 4 (±15kV air, ±8kV contact discharge). Applications Features USB 2.0 USB OTG Monitors and Flat Panel Displays Digital Visual Interface (DVI) High-Definition Multimedia Interface (HDMI) SIM Ports IEEE 1394 Firewire Ports Pin Configurations Transient Protection for High-Speed Data Lines to IEC 61000-4-2 (ESD) ± 15kV (Air), ± 8kV (Contact) Array of Surge Rated Diodes with Internal TVS Diode Protects up to Four I/O Lines & Power Lines Low Capacitance for High-Speed Interfaces Low Leakage Current and Clamping Voltage Low Operating Voltage: 5.0V Solid-State Silicon-Avalanche Technology Top View M: Month Code UESD6V8V4A SC70-6/SC88/SOT363 M: Month Code UESD6V8V4B SC89-6/SOT563/SOT666 XX: Week Code UESD6V8V4C TSOP-6/SOT23-6 ___________________________________________________________________________ http://www.union-ic.com Rev.03 Nov.2014 1/8 UESD6V8V4X Ordering Information Part Number Working Voltage Packaging Type Channel UESD6V8V4A UESD6V8V4B UESD6V8V4C 5.0V SC70-6/ SC88/ SOT363 SC89-6/SOT563/SOT666 TSOP-6/SOT23-6 4 Marking Code UAF UBF UCE Shipping Qty 3000pcs/7Inch Tape & Reel Absolute Maximum Ratings RATING SYMBOL VALUE UNITS Ppk 150 Watts IPP A kV °C Peak Pulse Power (tp = 8/20µs) Peak Pulse Current (tp = 8/20µs ) ESD per IEC 61000-4-2 (Air) ESD per IEC 61000-4-2 (Contact) Operating Temperature VESD TJ 6 15 8 -55 to +125 Storage Temperature TSTG -55 to +150 °C Electrical Characteristics PARAMETER Reverse Stand-Off Voltage Reverse Breakdown Voltage Reverse Leakage Current SYMBOL TEST CONDITIONS MIN TYP MAX UNIT VRWM VBR IR Clamping Voltage VC Clamping Voltage VC Junction Capacitance Cj 5.0 It = 1mA, Pin 5 to 2 VRWM = 5V, T=25°C Pin 5 to 2 IPP = 1A, 8/20µs Any pin to pin 2 IPP = 6A, 8/20µs Any pin to pin 2 VR = 0V, f = 1MHz Any I/O pin to pin 2 VR = 0V, f = 1MHz Between I/O pins 6.0 V V 2 µA 15 V 25 V 5 pF 3 pF Note 1: I/O pins are pin 1, 3, 4, and 6 ___________________________________________________________________________ http://www.union-ic.com Rev.03 Nov.2014 2/8 UESD6V8V4X Typical Operating Characteristics Forward Voltage vs. Forward Current Clamping Voltage vs. Peak Pulse Current 28 Waveform Parameters: tr=8μs td=20μs 6 Clamping Voltage – Vc (V) Forward Voltage – VF (V) 8 4 2 Waveform Parameters: tr=8μs td=20μs 24 Pin 1, 3, 4, 6 to Pin 2 20 16 12 Pin 5 to Pin 2 0 0 1 2 3 4 5 8 6 0 1 Forward Current – IF (A) 3 5 6 Pulse Waveform 110 110 100 100 90 90 Waveform Parameters: tr=8μs td=20μs 80 Percent of Ipp 80 70 60 50 40 70 60 e-t 50 40 30 30 20 20 10 10 td=IPP/2 0 0 0 25 50 75 100 125 0 150 5 10 15 20 25 30 Time (µs) Ambient Temperature - TA(℃) Junction Capacitance vs. Reverse Voltage Non-Repetitive Peak Pulse Power vs. Pulse Time 6.0 10 f=1MHz 5.5 Capacitance – Cj (pF) Peak Pulse Power – PPK (kW) 4 Peak Pulse Current – Ipp (A) Power Derating Curve % of Rated Power or Ipp 2 1 0.1 0.01 0.1 5.0 Any I/O Pin to Pin2 4.5 4.0 3.5 3.0 1 10 100 1000 0 1 2 3 4 Reverse Voltage – VR (V) Pulse Duration – tp (µs) ___________________________________________________________________________ http://www.union-ic.com Rev.03 Nov.2014 3/8 5 UESD6V8V4X Application Information Device Connection Options for Protection of Four High-Speed Data Lines This device is designed to protect data lines by clamping them to a fixed reference. When the voltage on the protected line exceeds the reference voltage the steering diodes are forward biased, conducting the transient current away from the sensitive circuitry. Data lines are connected at pins 1, 3, 4 and 6. Pin 2 should be connected directly to a ground plane. The path length is kept as short as possible to minimize parasitic inductance. The positive reference is connected at pin 5. The options for connecting the positive reference are as follows: 1. To protect data lines and the power line, connect pin 5 directly to the positive supply rail (VCC). In this configuration the data lines are referenced to the supply voltage. The internal TVS diode prevents over-voltage on the supply rail. 2. In applications where the supply rail does not exit the system, the internal TVS may be used as the reference. In this case, pin 5 is not connected. The steering diodes will begin to conduct when the voltage on the protected line exceeds the working voltage of the TVS (plus one diode drop). 3. In applications where complete supply isolation is desired, the internal TVS is again used as the reference and VCC is connected to one of the I/O inputs. An example of this configuration is the protection of a SIM port. The Clock, Reset, I/O, and VCC lines are connected at pins 1, 3, 4, and 6. Pin 2 is connected to ground and pin 5 is not connected. Matte Tin Lead Finish Matte tin has become the industry standard lead-free replacement for SnPb lead finishes. A matte tin finish is composed of 100% tin solder with large grains. Since the solder volume on the leads is small compared to the solder paste volume that is placed on the land pattern of the PCB, the reflow profile will be determined by the requirements of the solder paste. Therefore, these devices are compatible with both lead-free and SnPb assembly techniques. In addition, unlike other lead-free compositions, matte tin does not have any added alloys that can cause degradation of the solder joint. ___________________________________________________________________________ http://www.union-ic.com Rev.03 Nov.2014 4/8 UESD6V8V4X Package Information UESD6V8V4A SC70-6/SC88/SOT363 Outline Drawing D θ e1 Symbol L e 5 4 1 2 3 L1 E E1 6 20 c b A End View A1 A2 Top View Side View A A1 A2 b c D E E1 e e1 L L1 θ DIMENSIONS MILLIMETERS Min Max 0.900 1.100 0.000 0.100 0.900 1.000 0.150 0.350 0.080 0.150 2.000 2.200 1.150 1.350 2.150 2.450 0.650REF 1.200 1.400 0.525REF 0.260 0.460 0° 8° INCHES Min Max 0.035 0.043 0.000 0.004 0.035 0.039 0.006 0.014 0.003 0.006 0.079 0.087 0.045 0.053 0.085 0.096 0.026REF 0.047 0.055 0.021REF 0.010 0.018 0° 8° Land Pattern 1.94 1.30 0.80 NOTES: 1. Compound dimension: 2.10×1.25; 2. Unit: mm; 3.General tolerance ±0.05mm unless otherwise specified; 4. The layout is just for reference. 0.35 UAF M Tape and Reel Orientation ___________________________________________________________________________ http://www.union-ic.com Rev.03 Nov.2014 5/8 UESD6V8V4X UESD6V8V4B SC89-6/SOT563/SOT666 Outline Drawing Symbol A A1 b c D E E1 e L θ DIMENSIONS MILLIMETERS INCHES Min Max Min Max 0.525 0.600 0.021 0.024 0.000 0.050 0.000 0.002 0.150 0.300 0.006 0.012 0.090 0.180 0.004 0.007 1.500 1.700 0.059 0.067 1.100 1.300 0.043 0.051 1.500 1.700 0.059 0.067 0.450 0.550 0.018 0.022 0.100 0.300 0.004 0.012 7°REF 7°REF Land Pattern NOTES: 1. Compound dimension: 1.60×1.20; 2. Unit: mm; 3.General tolerance ±0.05mm unless otherwise specified; 4. The layout is just for reference. Tape and Reel Orientation ___________________________________________________________________________ http://www.union-ic.com Rev.03 Nov.2014 6/8 UESD6V8V4X UESD6V8V4C TSOP-6/SOT23-6 Outline Drawing D θ b 5 4 1 2 3 L L1 E E1 6 e c 20 e1 Top View A A2 A1 End View Side View DIMENSIONS MILLIMETERS Symbol Min Max A 1.050 1.250 A1 0.000 0.100 A2 1.050 1.150 b 0.300 0.500 c 0.100 0.200 D 2.820 3.020 E 1.500 1.700 E1 2.650 2.950 e 0.950REF e1 1.800 2.000 L 0.600REF L1 0.300 0.600 θ 0° 8° INCHES Min Max 0.041 0.049 0.000 0.004 0.041 0.045 0.012 0.020 0.004 0.008 0.111 0.119 0.059 0.067 0.104 0.116 0.037REF 0.071 0.079 0.023REF 0.012 0.024 0° 8° Land Pattern 2.4 0.9 0.7 0.95 0.95 NOTES: 1. Compound dimension: 2.92×1.60； 2. Unit: mm; 3. General tolerance ±0.05mm unless otherwise specified; 4. The layout is just for reference. UCE XX Tape and Reel Orientation ___________________________________________________________________________ http://www.union-ic.com Rev.03 Nov.2014 7/8 UESD6V8V4X IMPORTANT NOTICE The information in this document has been carefully reviewed and is believed to be accurate. Nonetheless, this document is subject to change without notice. Union assumes no responsibility for any inaccuracies that may be contained in this document, and makes no commitment to update or to keep current the contained information, or to notify a person or organization of any update. Union reserves the right to make changes, at any time, in order to improve reliability, function or design and to attempt to supply the best product possible. Union Semiconductor, Inc Add: Unit 606, No.570 Shengxia Road, Shanghai 201210 Tel: 021-51093966 Fax: 021-51026018 Website: www.union-ic.com ___________________________________________________________________________ http://www.union-ic.com Rev.03 Nov.2014 8/8