ROHM BH6176GU

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Structure
Product
Silicon Monolithic Integrated Circuit
Power Management LSI for MultiMedia LSI on Cellular
Type
BH6176GU
Functions
・1ch 500mA, high efficiency Step-down Converter. (16 steps adjustable VO by I2C)
・6-channel CMOS-type LDOs. (16 steps adjustable VO by I2C, 150mA×3, 300mA×3)
・LDO and Stepdown converter Power ON/OFF control enabled by I2C interface or external pin
・I2C compatible Interface. (Device address is “1001111”)
・Wafer Level CSP package(2.6mm×2.6mm) for space-constrained applications.
Absolute Maximum Ratings(Ta=25C)
Parameter
Symbol
Rating
Unit
Maximum Supply Voltage (VBAT, PBAT)
Maximum Supply Voltage (VUSB)
VBATMAX
VUSBMAX
6.0
6.0
V
V
Maximum Supply Voltage (DVDD)
Maximum Input Voltage 1
(LX, FB, OUT1, OUT2, OUT3, OUT4, OUT5, OUT6,
EN_LD1, EN_LD2, EN_LD3, EN_LD4)
Maximum Input Voltage 2
(NRST, CLK, DATA)
Power Dissipation
DVDDMAX
4.5
V
VINMAX1
VBAT + 0.3
V
VINMAX2
DVDD + 0.3
V
1
Pd
900*
mW
Operating Temperature Range
Topr
-35 ~ +85
Storage Temperature Range
Tstg
-55 ~ +125
*1 This is the allowable loss of when it is mounted on a ROHM specification board 60mm×60mm.
To use at temperature higher than 25C , derate 1% per 1C.
Recommended Operating Conditions (Ta=25C)
Parameter
VBAT, PBAT Voltage
VUSB Voltage
DVDD Voltage
Symbol
VBAT
VUSB
VDVDD
Range
2.20 ~ 5.50
V
2
2.20 ~ 5.50
V
3
1.70 ~ 4.20
V
*
*
*
Unit
2
*2 Whenever the VBAT or PBAT or VUSB voltage is under the LDO, SWREG output voltage,
the LDO and SWREG output is not guaranteed to meet its published specifications.
*3 The DVDD Voltage must be under the Battery Voltage VBAT, PBAT at any times.
*This product is not especially designed to be protected from radioactivity.
REV. A
℃
℃
2/4
●
Overview Dimensions (VCSP85H2)
●
Ball Descriptions
Ball No.
B4
BH6176
LOT
V B G A 0 8 0 V 0 5 0 ( U N I T: m m )
●
Block Diagram
LDO1
DVDD
1.00-3.30V
16 step
init 1.00V OUT1
150mA
DATA
EN_LD1
I2C IF
CLK
LDO2
1.00-3.30V
16 step
NRST
init 2.60V OUT2
150mA
EN_LD2
LDO3
PBAT
LX
PGND
1.20-3.30V
16 step
init 2.80V OUT3
300mA
EN_LD3
SWREG
0.8-2.40V
500mA
init 1.00V
LDO4
1.20-3.30V
16 step
FB
init 1.80V OUT4
300mA
EN_LD4
VUSB
REFC
REF
LDO5
1.20-3.30V
16 step
TEST
LDO6
1.20-3.30V
16 step
TSD
REV. A
init 3.30V OUT5
150mA
init 2.85V OUT6
300mA
PIN Name
DATA
C4
CLK
E1
VBAT1
E4
VBAT2
A5
PBAT
A4
LX
A3
PGND
B5
FB
D4
NRST
D5
OUT1
D1
OUT2
E5
OUT3
E3
OUT4
A1
OUT5
B1
REFC
C2
EN_LD1
D2
EN_LD2
D3
EN_LD3
C3
EN_LD4
A2
VUSB
C5
DVDD
C1
GND
B3
TEST
E2
OUT6
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Electrical Characteristics (Unless otherwise specified, Ta=25C, VBAT, PBAT=3.6V, VUSB=5.0V)
Parameter
Symbol
Min.
Typ.
Max.
Unit
Condition
Circuit Current 1 (OFF)
IQ1
-
0.4
1
μA
Circuit Current 2 (Standby)
IQ2
-
0.7
1.4
μA
Circuit Current 3 (Active)
IQ3
-
220
380
μA
LDO1~6=OFF, SWREG1=OFF,
NRST=L, DVDD=0V
LDO1~6=OFF, SWREG1=OFF,
NRST=H, DVDD=2.6V
LDO1~6=ON (no load, initial voltage)
SWREG1=ON (no load, initial voltage)
NRST=H, DVDD=2.6V
VUSB=VBAT external connection
●Circuit Current
Electrical Characteristics (Unless otherwise specified, Ta=25C, VBAT, PBAT=3.6V, VUSB=5.0V)
Parameter
Symbol
Min.
Typ.
Input high level
VIH1
DVDD*
0.7
-
Input low level
VIL1
-0.3
-
Max.
Unit
Condition
V
Pin voltage: DVDD
V
Pin voltage: 0 V
●Logic pin character
Logic input current
IIC1
0
0.3
DVDD+
0.3
DVDD*
0.3
1
Input high level
VIH2
1.44
-
-
Input low level
VIL2
-
-
0.4
V
Logic input current
IIC2
0
VIH3
Input low level
VIL3
-0.3
-
1
DVDD+
0.3
DVDD*
0.2
μA
Input high level
-1
DVDD*
0.8
Logic input
current
IIC3
-1
0
1
μA
Output low level
VOL
-
-
0.4
V
IOL=6mA
SWREG
Output Voltage
VOSW
0.94
1.00
1.06
V
initial value, Io=100mA
LDO1
Output voltage
VOM1
0.97
1.000
1.030
V
LDO2
Output voltage
VOM2
2.522
2.600
2.678
V
LDO3
Output voltage
VOM3
2.716
2.800
2.884
V
LDO4
Output voltage
VOM4
1.746
1.800
1.854
V
LDO5
Output voltage
VOM5
3.201
3.300
3.399
V
LDO6
Output voltage
VOM6
2.765
2.85
2.936
V
NRST
(CMOS input)
EN_LD1, EN_LD2,
EN_LD3, EN_LD4
(NMOS input)
CLK, DATA
(CMOS input)
DATA
(CMOS input)
-
μA
V
V
V
●SWREG
●LDOs
REV. A
initial value
[email protected]=4.5V
[email protected]=3.4V
initial value
[email protected]=4.5V
[email protected]=3.4V
initial value
[email protected]=4.5V
[email protected]=3.4V
initial value
[email protected]=4.5V
[email protected]=3.4V
initial value
[email protected]=5.5V
[email protected]=4.4V
initial value
[email protected]=4.5V
[email protected]=3.4V
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●Use-related Cautions
(1) Absolute maximum ratings
If applied voltage (VBAT, VADP, VUSB), operating temperature range (Topr), or other absolute maximum ratings are exceeded, there is a
risk of damage. Since it is not possible to identify short, open, or other damage modes, if special modes in which absolute maximum ratings
are exceeded are assumed, consider applying fuses or other physical safety measures.
(2) Recommended operating range
This is the range within which it is possible to obtain roughly the expected characteristics. For electrical characteristics, it is those that are
guaranteed under the conditions for each parameter. Even when these are within the recommended operating range, voltage and
temperature characteristics are indicated.
(3) Reverse connection of power supply connector
There is a risk of damaging the LSI by reverse connection of the power supply connector. For protection from reverse connection, take
measures such as externally placing a diode between the power supply and the power supply pin of the LSI.
(4) Power supply lines
In the design of the board pattern, make power supply and GND line wiring low impedance.
When doing so, although the digital power supply and analog power supply are the same potential, separate the digital power supply
pattern and analog power supply pattern to deter digital noise from entering the analog power supply due to the common impedance of the
wiring patterns. Similarly take pattern design into account for GND lines as well.
Furthermore, for all power supply pins of the LSI, in conjunction with inserting capacitors between power supply and GND pins, when using
electrolytic capacitors, determine constants upon adequately confirming that capacitance loss occurring at low temperatures is not a problem
for various characteristics of the capacitors used.
(5) GND voltage
Make the potential of a GND pin such that it will be the lowest potential even if operating below that. In addition, confirm that there are no
pins for which the potential becomes less than a GND by actually including transition phenomena.
(6) Shorts between pins and misinstallation
When installing in the set board, pay adequate attention to orientation and placement discrepancies of the LSI.
If it is installed erroneously, there is a risk of LSI damage. There also is a risk of damage if it is shorted by a foreign substance getting
between pins or between a pin and a power supply or GND.
(7) Operation in strong magnetic fields
Be careful when using the LSI in a strong magnetic field, since it may malfunction.
(8) Inspection in set board
When inspecting the LSI in the set board, since there is a risk of stress to the LSI when capacitors are connected to low impedance LSI
pins, be sure to discharge for each process. Moreover, when getting it on and off of a jig in the inspection process, always connect it after
turning off the power supply, perform the inspection, and remove it after turning off the power supply. Furthermore, as countermeasures
against static electricity, use grounding in the assembly process and take appropriate care in transport and storage.
(9) Input pins
Parasitic elements inevitably are formed on an LSI structure due to potential relationships. Because parasitic elements operate, they
give rise to interference with circuit operation and may be the cause of malfunctions as well as damage. Accordingly, take care not to apply
a lower voltage than GND to an input pin or use the LSI in other ways such that parasitic elements operate. Moreover, do not apply a voltage
to an input pin when the power supply voltage is not being applied to the LSI. Furthermore, when the power supply voltage is being applied,
make each input pin a voltage less than the power supply voltage as well as within the guaranteed values of electrical characteristics.
(10) Ground wiring pattern
When there is a small signal GND and a large current GND, it is recommended that you separate the large current GND pattern and small
signal GND pattern and provide single point grounding at the reference point of the set so that voltage variation due to resistance components
of the pattern wiring and large currents do not cause the small signal GND voltage to change. Take care that the GND wiring pattern of
externally attached components also does not change.
(11) Externally attached capacitors
When using ceramic capacitors for externally attached capacitors, determine constants upon taking into account a lowering of the
rated capacitance due to DC bias and capacitance change due to factors such as temperature.
(12) Thermal shutdown circuit (TSD)
When the junction temperature becomes 160°C (typ) or higher, the thermal shutdown circuit operates and turns the switch OFF.
The thermal shutdown circuit, which is aimed at isolating the LSI from thermal runaway as much as possible, is not aimed at the protection
or guarantee of the LSI. Therefore, do not continuously use the LSI with this circuit operating or use the LSI assuming its operation.
(13) Thermal design
Perform thermal design in which there are adequate margins by taking into account the permissible dissipation (Pd) in actual states of use.
(14) Rush Current
Extra care must be taken on power coupling, power, ground line impedance, and PCB design while excess amount of rush current might
instantly flow through the power line when powering-up a LSI which is equipped with several power supplies, depending on on/off sequence
and ramp delays.
REV. A
Notice
Notes
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The content specified herein is for the purpose of introducing ROHM's products (hereinafter
"Products"). If you wish to use any such Product, please be sure to refer to the specifications,
which can be obtained from ROHM upon request.
Examples of application circuits, circuit constants and any other information contained herein
illustrate the standard usage and operations of the Products. The peripheral conditions must
be taken into account when designing circuits for mass production.
Great care was taken in ensuring the accuracy of the information specified in this document.
However, should you incur any damage arising from any inaccuracy or misprint of such
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The technical information specified herein is intended only to show the typical functions of and
examples of application circuits for the Products. ROHM does not grant you, explicitly or
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The Products specified in this document are intended to be used with general-use electronic
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Please be sure to implement in your equipment using the Products safety measures to guard
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R1010A