AN2859 Application note Multiplexed diagnostics of AC switches using two STCC08 Introduction The aim of this application note is to present opportunities to reduce the number of input pins used on a microcontroller unit (MCU) to diagnose failures of several AC switches with the STCC08. This document deals with the multiplexed diagnostics of two STCC08 and gives technical recommendations on the implementation of this solution. STCC08 overview The STCC08 has been designed to improve home appliance safety. This new device can drive an AC switch (Triac, ACST and ACS) with a gate current IGT up to 10 mA and to send back to the microcontroller unit a signal image of the voltage across the controlled AC switch (this signal defines the AC switch state). The STCC08 has three functional blocks (see Figure 1). • A "gate driver" block used to drive an AC switch and to interface directly the STCC08 with the MCU (CMOS compatible) • A "power switch signal shaping" block used to measure the AC switch voltage in both AC line cycles • An "AVF driver" block used to give an image of the AC switch voltage to the MCU (digital information) Figure 1. STCC08 block diagram Gate driver G IN + - VCC R IG STCC08 AVF driver 1 8 GND AVF 2 7 R IG N/C 3 6 G AC 4 5 VCC AVF AC Power switch signal shaping IN GND SO -8 For more information about the STCC08, please refer to the ST Application note AN2716. July 2014 DocID15255 Rev 2 1/29 www.st.com 29 Contents AN2859 Contents 1 Multiplexed diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 Principle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.2 Failure mode detection of two AC switches . . . . . . . . . . . . . . . . . . . . . . . . 4 1.3 VAVF signal reading synchronization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2 VSTATE level definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 3 Resistance settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 4 Detection windows digital value setting . . . . . . . . . . . . . . . . . . . . . . . . 15 5 Application example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 6 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Appendix A AC switch state deduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Appendix B VSTATE signal voltage definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Appendix C Resistor settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 C.1 First case: V1_Min > V0_Max . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 C.2 Second case: V2_Min > V1_Max . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 C.3 Third case: V2_Max < V3_Min . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 2/29 DocID15255 Rev 2 AN2859 Multiplexed diagnostics 1 Multiplexed diagnostics 1.1 Principle The multiplexed diagnostic allows the detection of the state of several AC switches independently using only one MCU input. In this case, an analog/digital converter input (ADC) of the MCU should be used and must be configured with no pull-up resistor. In this document, only the multiplexed diagnostic of two STCC08 (STCC081 and STCC082) is described (see Figure 2). Note that two output pins of an MCU should be used to control each STCC08 (IN1 and IN2). Figure 2. Multiplexed diagnostic schematic of two STCC08 Neutral ACS2 G IN2 RIG VCC RShunt RAC Load2 VCC STCC082 AVF R1 AC MCU VCC R2 VAVF2 Line Neutral ACS1 G IN1 RIG VCC VCC RShunt STCC081 RAC Load1 R3 AVF AC R4 GND VAVF1 VSTATE Line To distinguish the state of each AC switch (ACS1 and ACS2) a divider bridge is used. Resistors R1, R2, R3 and R4 are designed to convert the VAVF digital signal given by each STCC08 (VAVF1 and VAVF2) into an analog signal (VSTATE). Knowing the control state of each STCC08 (IN1 and IN2), the MCU is able to identify the state of each AC switch by analyzing the VSTATE signal (see Section 1.2). Note: The STCC08 AVF output is an open collector output. Resistors R1 and R3 bias the STCC08 AVF output and limit the collector current to 5 mA. For further information, and in particular, resistor values for RAC, Rshunt, and RIG, refer to the ST Application note AN2716. DocID15255 Rev 2 3/29 29 Multiplexed diagnostics 1.2 AN2859 Failure mode detection of two AC switches Figure 3 to Figure 12 give the VSTATE signal level according to the state of each AC switch. V0, V1, V2 and V3 are levels reached by the parameter VSTATE and depends on R1, R2, R3, and R4 resitor values.Table 1 shows that we only need four different levels to define the state of each AC switch. Figure 3. Case 1: VSTATE = V3 (except at each zero crossing of the AC line) VCC VAC ILoad_2 R1 VCC/COM STCC082 ILoad_2 R2 AVF VAC Line ACS2 Load2 RAC VAC G ILoad_1 V AVF2 VCC AC IN2 RShunt VSTATE R3 VCC/COM V3 STCC081 ILoad_1 R4 AVF VAC Line ACS1 Load1 RAC V2 G V STATE V AVF1 V1 AC IN1 RShunt V0 ACS1 and ACS2 are not in conducting state Figure 4. Case 2: VSTATE = V0 VCC VAC I Load_2 R1 VCC/COM STCC08 2 I Load_2 R2 AVF V AC Line ACS2 Load2 RAC VAC G I Load_1 V AVF2 VCC AC IN2 RShunt VSTATE R3 VCC/COM STCC081 I Load_1 V3 R4 AVF V AC ACS1 V2 G V AVF1 Line Load1 RShunt RAC V1 AC IN1 ACS1 and ACS2 are in conducting state 4/29 V STATE DocID15255 Rev 2 V0 AN2859 Multiplexed diagnostics Figure 5. Case 3: VSTATE = V1 (except at each zero crossing of the AC line) VCC VAC ILoad_2 R1 VCC/COM STCC082 ILoad_2 R2 AVF VAC Line Load2 ACS2 G RAC AC VAC ILoad_1 VAVF2 IN2 RShunt VCC VSTATE R3 VCC/COM STCC081 ILoad_1 V3 R4 V2 AVF VAC Line ACS1 Load1 RAC G VSTATE VAVF1 V1 AC V0 IN1 RShunt ACS1 is in conducting state and ACS2 is not in conducting state Figure 6. Case 4: VSTATE = V2 (except at each zero crossing of the AC line) VCC R1 VCC/COM ILoad_2 VAC Line ACS2 Load2 RAC STCC082 AVF G AC IN2 STCC081 AVF ILoad_1 ACS1 Load1 RShunt R2 VAC ILoad_1 VCC VSTATE R3 VCC/COM Line ILoad_2 VAVF2 RShunt VAC VAC RAC G V3 R4 V2 VAVF1 VSTATE V1 AC IN1 V0 ACS1 is not in conducting state and ACS2 is in conducting state DocID15255 Rev 2 5/29 29 Multiplexed diagnostics AN2859 Figure 7. Case 5: VSTATE toggles between V1 and V3 at each AC line cycle (except at each zero crossing of the AC line) VCC VAC ILoad_2 R1 VCC/COM STCC082 ILoad_2 R2 AVF VAC ACS2 Line Load2 RAC G AC IN2 VSTATE V3 R4 STCC081 ILoad_1 V2 AVF ACS1 Load1 VCC R3 VCC/COM Line ILoad_1 VAVF2 RShunt V AC VAC RAC G VSTATE VAVF1 V1 AC IN1 RShunt V0 ACS1 is failed in diode mode and ACS2 is not in conducting state Figure 8. Case 6: VSTATE toggles between V2 and V3 at each AC line cycle (except at each zero crossing of the AC line) VCC VAC R1 VCC/COM ACS2 STCC082 AVF G RAC AC ILoad_2 VAC Line Load2 RShunt RShunt ILoad_1 VAVF2 VCC VSTATE STCC081 AVF ACS1 Load1 VAC R3 ILoad_1 Line R2 IN2 VCC/COM VAC ILoad_2 RAC G V3 R4 V2 VAVF1 VSTATE V1 AC IN1 V0 ACS1 is not in conducting state and ACS2 is failed in diode mode 6/29 DocID15255 Rev 2 AN2859 Multiplexed diagnostics Figure 9. Case 7: VSTATE toggles between V1 and V2 at each AC line cycle (except at each zero crossing of the AC line) VCC VAC R1 VCC/COM STCC082 ILoad_2 VAC Line Load2 ACS2 G RAC AC ILoad_1 IN2 VCC VSTATE R3 V3 R4 STCC081 ILoad_1 V2 AVF ACS1 Load1 VAC VAVF2 VCC/COM Line R2 AVF RShunt V AC ILoad_2 RAC G VSTATE VAVF1 V1 AC IN1 RShunt V0 ACS1 and ACS2 are failed in diode mode not on the same AC line polarities Figure 10. Case 8: VSTATE toggles between V0 and V3 at each AC line cycle (except at each zero crossing of the AC line) VCC VAC R1 VCC/COM ILoad_2 VAC Line ACS2 Load2 RAC STCC082 AVF G AC VCC R3 ACS1 RShunt VSTATE STCC081 AVF ILoad_1 Load1 ILoad_1 IN2 VCC/COM Line VAC VAVF2 RShunt VAC ILoad_2 R2 RAC G V3 R4 V2 VAVF1 VSTATE V1 AC IN1 V0 ACS1 and ACS2 are failed in diode mode on the same AC line polarities DocID15255 Rev 2 7/29 29 Multiplexed diagnostics AN2859 Figure 11. Case 9: VSTATE toggles between V2 and V0 at each AC line cycle VCC VAC R1 VCC/COM STCC082 ILoad_2 VAC Line Load2 ACS2 RAC AC IN2 VCC VSTATE R3 V3 R4 STCC081 ILoad_1 V2 AVF ACS1 Load1 ILoad_1 VAVF2 VCC/COM Line VAC AVF G RShunt V AC ILoad_2 R2 RAC G VSTATE VAVF1 V1 AC IN1 RShunt V0 ACS1 is failed in diode mode and ACS2 is failed in short circuit Figure 12. Case 10: VSTATE toggles between V1 and V0 at each AC line cycle VCC VAC R1 VCC/COM ILoad_2 VAC Line ACS2 Load2 RAC STCC082 AVF G AC VSTATE R3 ACS1 RShunt ILoad_1 VCC STCC081 AVF ILoad_1 Load1 VAC IN2 VCC/COM Line R2 VAVF2 RShunt VAC ILoad_2 RAC G V3 R4 V2 VAVF1 VSTATE V1 AC IN1 V0 ACS1 is failed in shot circuit and ACS2 is failed in diode mode 8/29 DocID15255 Rev 2 AN2859 Multiplexed diagnostics Table 1. Variation of the VSTATE signal according to the AC switch states ACS1 state ACS2 state VSTATE status ON ON VSTATE = V0 ON OFF VSTATE = V1 OFF ON VSTATE = V2 OFF OFF VSTATE = V3 Knowing the control state of each STCC08 (IN1 and IN2) and according to Table 1, the MCU is able to detect the AC switch state by analyzing VSTATE signal. Appendix A defines the states of each ACS according to the VSTATE signal level (V0, V1, V2 and V3) and the control state of each STCC08. In the case of failure of one of the AC switches, the MCU can place the application in a safe configuration by switching off an appliance front-end relay. 1.3 VAVF signal reading synchronization The STCC08 AVF output signal is an image of the AC switch voltage. This signal toggles between VCC and zero level (GND) according to whether the STCC08 AC input current (IAC) is higher or not than IACT (see AN2716). In case of multiplexed diagnostics the slight IACT electrical variation between ICs may result in the state of the AVF signal of each STCC08 (either VCC or zero level) not changing at exactly the same time. This has an impact on the VSTATE signal and on the AC switches state detection (see Figure 13). Note that IACT1 and IACT2 define respectively the STTCO8 IAC input current for STCC081 and STCC082 to allow VAVF signal to toggle between VCC and GND. For example, if the two STCC08 are not controlled (IN1 = IN2 = 0) and AC1 and AC2 are not in conducting state the AC1 and AC2 can be interpreted (see Table 1) as failed in short circuit if VSTATE is read between t0 and t1 (VSTATE = V0). DocID15255 Rev 2 9/29 29 Multiplexed diagnostics AN2859 Figure 13. VSTATE signal variation due to the IACT parameter dispersion VLine IAC1 = IAC2 IACT2 IACT1 -IACT1 -IACT2 t (s) AVF1 (STCC08_1) VCC t (s) AVF2 (STCC08_2) VCC t (s) VSTATE V3 ΔtDetection V1 t (s) ϕ t0 = 0 Note: t1 t2 ΔtAVF_READ t3 t4 t5 = 1 2xf It is recommended that the AVF signal be read during several AC line cycles around the AC line peak voltage. The STCC08 AVF signal must be read after the AC line peak voltage (ΔtAVF_READ) and before the t3 (see AN2716). 10/29 DocID15255 Rev 2 AN2859 2 VSTATE level definition VSTATE level definition According to the state of each AC switch, V0, V1, V2 and V3 levels are defined by equations 1, 2, 3 and 4 (see also Appendix B). In this document VAVF1_L and VAVF2_L are respectively the STCCO81 and STCCO82 AVF output at the low level. The minimum and maximum values of AVF at low level are respectively 0 V and 1 V. Equation 1 ACS1 and ACS2 are on V0 = ( VAVF1_L ·R2 + VAVF2_L ·R4 ) R2 + R4 Equation 2 ACS1 is on and ACS2 is off V1 = VCC ·R4 + VAVF1_L ·(R1 + R2 ) R1 + R2 + R4 Equation 3 ACS2 is on and ACS1 is off V2 = VCC ·R2 + VAVF2_L ·(R3 + R4 ) R2 + R3 + R4 Equation 4 ACS1 and ACS2 are off V3 = VCC The tolerance of the resistors (R1, R2, R3 and R4), the STCC08 output AVF signal electrical dispersion and the DC power supply characteristics induce a dispersion on V0, V1, V2 and V3 levels (see Table 2). Table 2. Variation of the VSTATE signal according to the AC switch states ACS1 state ACS2 state VSTATE status ON ON V0_Min < VSTATE < V0_Max ON OFF V1_Min < VSTATE < V1_Max OFF ON V2_Min < VSTATE < V2_Max OFF OFF V3_Max > VSTATE > V3_Min Knowing the previous equations 1, 2, 3 and 4, the resistors standard value and the tolerance of the resistors, Vx_Max and Vx_Min (x = 0, 1, 2, or 3) values are defined respectively by equations 5, 6, 7, 8, 9, 10, 11 and 12. DocID15255 Rev 2 11/29 29 VSTATE level definition AN2859 VCC_Min and VCC_Max are respectively the minimum and maximum power supply voltage of the application. XR_Max and XR_Min are the tolerances of the resistors. For example, with 5% resistor tolerance XR_Max and XR_Min are respectively 1.05 and 0.95. VAVF_L_Max and VAVF_L_Min values are fixed by the STCC08 AVF output electrical dispersion at low level with: VAVF_L_Max = VAVF1_L_Max = VAVF2_L_Max = 1 V and VAVF_L_Min = VAVF1_L_Min = VAVF2_L_Min = 0 V Equation 5 ASC1 is on and ACS2 is on. V0_Max = VAVF_L_Max ⎛R + R ⎞ · X ⎜ 2 4⎟ R_Max X ⎠ · ⎝ = VAVF_L_Max · R_Max ⎛R + R ⎞ · X XR_Min ⎜ 2 4⎟ R_Min ⎝ ⎠ Equation 6 ASC1 is on and ACS2 is on. V0_Min ⎛R + R ⎞ · X ⎜ 2 4⎟ R_Min ⎠ = VAVF_L_Min · ⎝ =0 V ⎛R + R ⎞ · X ⎜ 2 4⎟ R_Max ⎝ ⎠ Equation 7 ASC1 is on and ACS2 is off. V1_Max VCC_Max · R4 · XR_Max + VAVF_L_Max · ⎛⎜ R1 + R2 ⎞⎟ · XR_Max ⎝ ⎠ = ⎛R + R + R ⎞ · X ⎜ 1 2 4⎟ R_Min ⎝ ⎠ Equation 8 ASC1 is on and ACS2 is off. V1_Min VCC_Min · R4 · XR_Min + VAVF_L_Min · ⎛⎜ R1 + R2 ⎞⎟ · XR_Min ⎝ ⎠ = ⎛R + R + R ⎞ · X ⎜ 1 2 4⎟ R_Max ⎝ ⎠ Equation 9 ASC1 is off and ACS2 is on. V2_Max 12/29 VCC_Max · R2 .XR_Max + VAVF_L_Max · ⎛⎜ R3 + R4 ⎞⎟ · XR_Max ⎝ ⎠ = ⎛R + R + R ⎞ · X ⎜ 2 3 4⎟ R_Min ⎝ ⎠ DocID15255 Rev 2 AN2859 VSTATE level definition Equation 10 ASC1 is off and ACS2 is on. V2_Min VCC_Min · R2 · XR_Min + VAVF_L_Min · ⎛⎜ R3 + R4 ⎞⎟ · XR_Min ⎝ ⎠ = ⎛R + R + R ⎞ · X ⎜ 2 3 4⎟ R_Max ⎝ ⎠ Equation 11 ASC1 is off and ACS2 is off. V3_Max = VCC_Max Equation 12 ASC1 is off and ACS2 is off. V3_Min = VCC_Min DocID15255 Rev 2 13/29 29 Resistance settings 3 AN2859 Resistance settings Equation 13 shows how to select values for R1 and R3 resistances. IAVF_Max is the maximum current sunk by the STCC08 AVF pin and should be lower than 5 mA. Equation 13 R1 = R3 = R ≥ 2 · VCC_Max IAVF_Max Knowing the R1 and R3 resistor standard values, the tolerance of the resistors, the STCC08 AVF output electrical dispersion and the DC power supply characteristic, R2 and R4 resistances value should be chosen by using equations 14 , 15 , and 16 (see also Appendix C). Equation 14 ⎧⇒ V1_Min > V0_Max ⎪ ⎪ ⎪ 2 ⎤ ⎡ ⎪ ⎛X ⎞ ⎥ ⎜ R_Max ⎟ ⎛ R + R ⎞ · ⎢V ⎪ − · V ⎜ 2 ⎟ ⎢ AVF_L_Max ⎜ AVF_L_Min ⎥ ⎟ ⎪ ⎝ ⎠ ⎜ ⎟ ⎢ ⎥ ⎨ ⎝ XR_Min ⎠ ⎣ ⎦ ⎪⇒ R4 > 2 ⎪ ⎛X ⎞ ⎜ ⎟ ⎪ VCC_Min − VAVF_L_Max ·⎜ R_Max ⎟ ⎪ ⎜ ⎟ ⎪ ⎝ XR_Min ⎠ ⎪ ⎩ Equation 15 ⎧⇒ V2_Min > V1_Max ⎪ ⎪ ⎪ 2 ⎡ ⎡ ⎪ ⎞ ⎤ ⎛X ⎛X ⎢ ⎢ ⎜ R_Max ⎟ ⎥ ⎜ R_Max ⎪ R2 · ⎢VCC_Min − VAVF_L_Max ⎜ ⎟ ⎥ − R · ⎢VAVF_L_Max · ⎜ ⎪ ⎜ ⎟ ⎜X ⎢ ⎢ ⎨ ⎝ XR_Min ⎠ ⎥⎦ ⎝ R_Min ⎣ ⎣ ⎪⇒ R4 < 2 ⎪ ⎛X ⎞ ⎜ R_Max ⎟ ⎪ V · CC_Max ⎜ ⎟ − VAVF_L_Min ⎪ ⎜X ⎟ ⎪ ⎝ R_Min ⎠ ⎪ ⎩ Equation 16 ⎧⇒ V3_Min > V2_Max ⎪ ⎪ ⎪ ⎡ ⎤ ⎪ X ⎪⎪ R2 · ⎢VCC_Max − VCC_Min · R_Min ⎥ ⎢ ⎨ XR_Max ⎥⎦ ⎣ ⎪⇒ R4 > −R ⎪ XR_Min ⎪ − VAVF_L_Max VCC_Min · ⎪ XR_Max ⎪ ⎪⎩ 14/29 DocID15255 Rev 2 2 ⎤ ⎞ ⎥ ⎟ ⎟ − VAVF_L_Min ⎥ ⎟ ⎥ ⎠ ⎦ AN2859 4 Detection windows digital value setting Detection windows digital value setting To detect the state of both AC switches, an MCU analog/digital converter input (ADC) should be used. The conversion result (NADC) of the VSTATE signal depends on the ADC size (N) and of the MCU voltage reference (VRef). Note that the ADC transfer function is considered as ideal (see Equation 17). Equation 17 NADC = VSTATE VRef · 2N According to the state of the AC switches, the VSTATE signal is not directly dependent on the value of VCC (see equations 1, 2 and 3). This has an impact on the conversion result if the voltage reference of the ADC transfer function depends directly on VCC. In this case, the detection levels to implement in the MCU firmware should be determined by taking into account the DC power supply variation with VREF = VCC (see equations 18, 19, 20, 21, 22, 23 and 24). Equation 18 ASC1 is on and ACS2 is on. ⎧ ⎛R + R ⎞ ⎜ 2 4⎟ ⎪ VAVF_L ⎠ · 2N ⎪⇒ N0 = · ⎝ ⎛ ⎞ ⎪ VCC ⎜ R2 + R4 ⎟ ⎪ ⎝ ⎠ ⎪ ⎨ ⎪ ⎛R + R ⎞ · X ⎪ ⎜ 2 4⎟ R_Max VAVF_L_Max V X ⎝ ⎠ ⎪⇒ N · · 2N = AVF_L_Max · R_Max · 2N = 0_Max ⎪ ⎛R + R ⎞ · X VCC_Min VCC_Min XR_Min ⎜ 2 ⎪ 4⎟ R_Min ⎝ ⎠ ⎩ Equation 19 ASC1 is on and ACS2 is on. N0_Min = 0 Equation 20 ASC1 is on and ACS2 is off. ⎧ ⎡ ⎛ ⎞⎤ ⎪ ⎢ R4 · VCC + VAVF_L · ⎜ R1 + R2 ⎟ ⎥ ⎝ ⎠ ⎥ · 2N ⎪⇒ N1 = ⎢ ⎛ ⎞ ⎪ ⎢ ⎥ VCC · ⎜ R1 + R2 + R4 ⎟ ⎪ ⎢⎣ ⎥⎦ ⎝ ⎠ ⎪⎪ ⎨ ⎪ ⎡ ⎤ ⎪ VAVF_L_Max · ⎛⎜ R1 + R2 ⎞⎟ ⎥ ⎢ 2N · XR_Max ⎪ ⎝ ⎠ ⎥· ⎪⇒ N1_Max = ⎢R4 + ⎢ ⎥ ⎛R + R + R ⎞ · X VCC_Min ⎪ 2 4⎟ R_Min ⎢⎣ ⎥⎦ ⎜⎝ 1 ⎪⎩ ⎠ DocID15255 Rev 2 15/29 29 Detection windows digital value setting AN2859 Equation 21 ASC1 is on and ACS2 is off. ⎧ ⎡ ⎛ ⎞⎤ ⎪ ⎢ R4 · VCC + VAVF_L · ⎜ R1 + R2 ⎟ ⎥ ⎝ ⎠ ⎥ · 2N ⎪⇒ N1 = ⎢ ⎛ ⎞ ⎪ ⎢ ⎥ VCC · ⎜ R1 + R2 + R4 ⎟ ⎪ ⎢⎣ ⎥⎦ ⎝ ⎠ ⎪⎪ ⎨ ⎪ ⎡ ⎤ ⎪ VAVF_L_Min · ⎛⎜ R1 + R2 ⎞⎟ ⎥ ⎢ 2N · XR_Min ⎪ ⎝ ⎠ ⎢ ⎥ ⇒ = + N R · 4 1_Min ⎪ ⎢ ⎥ ⎛R + R + R ⎞ · X VCC_Max ⎪ 2 4⎟ R_Max ⎢ ⎥⎦ ⎜⎝ 1 ⎪⎩ ⎠ ⎣ Equation 22 ASC1 is off and ACS2 is on. ⎧ ⎡ ⎛ ⎞⎤ ⎪ ⎢ R2 · VCC + VAVF_L · ⎜ R3 + R4 ⎟ ⎥ ⎝ ⎠ ⎥ · 2N ⎪⇒ N2 = ⎢ ⎛ ⎞ ⎪ ⎢ ⎥ VCC · ⎜ R2 + R3 + R4 ⎟ ⎪ ⎢⎣ ⎥⎦ ⎝ ⎠ ⎪⎪ ⎨ ⎪ ⎡ ⎤ ⎪ VAVF_L_Max · ⎛⎜ R3 + R4 ⎞⎟ ⎥ ⎢ 2N · XR_Max ⎪ ⎝ ⎠ ⎢ ⎥ ⇒ = + N R · 2 2_Max ⎪ ⎢ ⎥ R +R +R · X VCC_Min ⎪ R_Min 2 3 4 ⎢ ⎥⎦ ⎪⎩ ⎣ ( ) Equation 23 ASC1 is off and ACS2 is on. ⎧ ⎡ ⎛ ⎞⎤ ⎪ ⎢ R2 · VCC + VAVF_L · ⎜⎝ R3 + R4 ⎟⎠ ⎥ ⎪⇒ N2 = ⎢ ⎥ · 2N ⎛ ⎞ ⎪ ⎢ ⎥ VCC · ⎜ R2 + R3 + R4 ⎟ ⎪ ⎢⎣ ⎥⎦ ⎝ ⎠ ⎪⎪ ⎨ ⎪ ⎡ ⎤ ⎪ VAVF_L_Min · ⎛⎜ R3 + R4 ⎞⎟ ⎥ ⎢ 2N · XR_Min ⎪ ⎝ ⎠ ⎢ ⎥ ⇒ = + N R · 2 1_Min ⎪ ⎢ ⎥ ⎛R + R + R ⎞ · X VCC_Max ⎪ 3 4⎟ R_Max ⎢ ⎥⎦ ⎜⎝ 2 ⎪⎩ ⎠ ⎣ Equation 24 ASC1 is off and ACS2 is off. N3_Max = N3_Min > N2_Max 16/29 DocID15255 Rev 2 AN2859 5 Application example Application example Table 3. Defined values of the application Symbol Value Unit IAVF_Max 5 mA VCC_Min 4.5 V VCC_Max 5.5 V VAVF_L_Min 0 V VAVF_L_Max 1 V N (MCU ADC resolution) 10 bits The first step is to calculate R1 and R3 resistor values using Equation 13. The second step is to choose the R2 and R4 resistor values to fulfil equations14 and 15 (see alsoTable 4). Table 4. R1, R2, R3 and R4 resistor values Resistor settings Standard value (5% tolerance) R1 = R3 > 1.1 kΩ 2.2 kΩ R2 15 kΩ R4 6.8 kΩ The third step is to calculate the window detection levels (see Table 5) according to equations 5, 6, 7, 8, 9, 10, 11, 18, 19, 20, 21, 22, 23 and 24. The window detection digital levels will be stored in the MCU firmware to distinguish the state of each AC switch. Table 5. Detection window values Analog values (Volts) Equivalent digital values Windows detection level Max. Min. Max. Min. V0 1.105 0 252 0 V1 2.514 1.154 501 262 V2 4.214 2.545 802 579 V3 5.5 4.5 1024 > 802 DocID15255 Rev 2 17/29 29 Conclusion 6 AN2859 Conclusion This application note illustrates how designers can diagnose the state of two AC switches with only one single microcontroller ADC input. The way to implement this solution in the application and the external resistor choice is described in this document. This solution is used to detect the failure modes of two AC switches and to inform the MCU so that appropriate actions to put the system into a safe state can be taken. This function improves the system safety by detecting "diode mode" in both polarities of the AC mains, "short circuit" and "open circuit" of each AC switch independently. The main benefit of this solution is to reduce the cost of the microcontroller when a platform needs to monitor several AC switches because it requires one less pin. 18/29 DocID15255 Rev 2 AN2859 AC switch state deduction Appendix A AC switch state deduction Table 6. AC switch states when IN1 = IN2 = 0 IN1 IN2 VSTATE value ACS1 diagnostic ACS2 diagnostic 0 0 V0 Shorted circuit Shorted circuit 0 0 V1 Shorted circuit OFF 0 0 V2 OFF Shorted circuit 0 0 V3 OFF OFF 0 0 Toggle between V3 and V2 OFF Diode mode 0 0 Toggle between V3 and V1 Diode mode OFF 0 0 Toggle between V3 and V0 Diode mode Diode mode 0 0 Toggle between V2 and V1 Diode mode Diode mode 0 0 Toggle between V2 and V0 Diode mode Shorted circuit 0 0 Toggle between V1 and V0 Shorted circuit Diode mode Table 7. AC switch states when IN1 = 0 and IN2 = 1 IN1 IN2 VSTATE value ACS1 diagnostic ACS2 diagnostic 0 1 V0 Shorted circuit ON 0 1 V1 Shorted circuit OPEN circuit 0 1 V2 OFF ON 0 1 V3 OFF OPEN circuit 0 1 Toggle between V3 and V2 OFF NA 0 1 Toggle between V3 and V1 Diode mode OPEN circuit 0 1 Toggle between V3 and V0 Diode mode NA 0 1 Toggle between V2 and V1 Diode mode NA 0 1 Toggle between V2 and V0 Diode mode ON 0 1 Toggle between V1 and V0 Shorted circuit NA DocID15255 Rev 2 19/29 29 AC switch state deduction AN2859 Table 8. AC switch states when IN1 = 1 and IN2 = 0 IN1 IN2 VSTATE value ACS1 diagnostic ACS2 diagnostic 1 0 V0 ON Shorted circuited 1 0 V1 ON OFF 1 0 V2 Open circuit Shorted circuited 1 0 V3 Open circuit OFF 1 0 Toggle between V3 and V2 Open circuit Diode mode 1 0 Toggle between V3 and V1 NA OFF 1 0 Toggle between V3 and V0 NA Diode mode 1 0 Toggle between V2 and V1 NA Diode mode 1 0 Toggle between V2 and V0 NA Shorted circuit 1 0 Toggle between V1 and V0 ON Diode mode Table 9. AC switch states when IN1 = IN2 = 1 20/29 IN1 IN2 VSTATE value ACS1 diagnostic ACS2 diagnostic 1 1 V0 ON ON 1 1 V1 ON OPEN circuit 1 1 V2 Open circuit ON 1 1 V3 Open circuit OPEN circuit 1 1 Toggle between V3 and V2 Open circuit NA 1 1 Toggle between V3 and V1 NA OPEN circuit 1 1 Toggle between V3 and V0 NA NA 1 1 Toggle between V2 and V1 NA NA 1 1 Toggle between V2 and V0 NA ON 1 1 Toggle between V1 and V0 ON NA DocID15255 Rev 2 AN2859 VSTATE signal voltage definition Appendix B VSTATE signal voltage definition The VSTATE voltage is defined according to the theorem of superposition applied on the linear circuits defined on Figures14, 15, 16 and 17 (according to the state of each AC switch). The voltage resulting (VSTATE) from each source is calculated separately, and the results are added algebraically. The input current of the MCU A/D conversion block (IA/D) is neglected. Figure 14. Equivalent circuit ACS1 and ACS2 are on VCC MCU R1 STCC082 AVF R2 I A/D≈ 0 VAVF2_L A/D conversion R4 R2 VCC STCC081 AVF R3 R1 R3 VSTATE R4 VSTATE VCC VAVF2_L VAVF1_L VCC VAVF1_L Equation 25 R 4 V =V =V ·V · STATE 0 AVF1_L AVF2_L R + R 4 2 Equation 26 V0_Max ⎛R + R ⎞ · X ⎜ 2 4⎟ R_Max ⎠ = VAVF_L_Max · ⎝ ⎛R + R ⎞ · X ⎜ 2 4⎟ R_Min ⎝ ⎠ Equation 27 V0_Min ⎛R + R ⎞ · X ⎜ 2 4⎟ R_Min ⎠ = VAVF_L_Min · ⎝ =0 ⎛R + R ⎞ · X ⎟ ⎜ 2 4 R_Max ⎝ ⎠ DocID15255 Rev 2 21/29 29 VSTATE signal voltage definition AN2859 Figure 15. Equivalent circuit ACS1 is on and ACS2 is off VCC MCU R1 AVF STCC082 R2 I A/D≈ 0 VAVF2_H A/D conversion R4 R2 R3 VCC R1 R3 AVF STCC081 R4 VSTATE VAVF1_L VCC Equation 28 VSTATE = V1 = R4 R1 + R2 · VCC + · VAVF1_L R4 + R2 + R1 R1 + R2 + R4 Equation 29 V1_Max VCC_Max · R4 · XR_Max + VAVF_L_Max · ⎛⎜ R1 + R2 ⎞⎟ · XR_Max ⎝ ⎠ = ⎛R + R + R ⎞ · X ⎜ 1 2 4⎟ R_Min ⎝ ⎠ Equation 30 V1_Min 22/29 R1 VCC_Min · R4 .XR_Min + VAVF_L_Min · ⎛⎜ R1 + R2 ⎞⎟ · XR_Min ⎝ ⎠ = ⎛R + R + R ⎞ · X ⎜ 1 2 4⎟ R_Max ⎝ ⎠ DocID15255 Rev 2 VAVF1_L VCC VSTATE AN2859 VSTATE signal voltage definition Figure 16. Equivalent circuit ACS2 is on and ACS1 is off VCC MCU R1 STCC082 AVF I A/D≈ 0 R2 VAVF2_L A/D conversion R4 R2 VCC R1 R3 STCC081 AVF R3 VSTATE R4 VSTATE VAVF1_H VCC VAVF2_L VCC Equation 31 VSTATE = V2 = R2 R3 + R4 · VCC + · VAVF2_L R2 + R4 + R3 R3 + R4 + R2 Equation 32 V2_Max VCC_Max · R2 · XR_Max + VAVF_L_Max · ⎛⎜ R3 + R4 ⎞⎟ · XR_Max ⎝ ⎠ = ⎛R + R + R ⎞ · X ⎜ 2 3 4⎟ R_Min ⎝ ⎠ Equation 33 V2_Min VCC_Min · R2 · XR_Min + VAVF_L_Min · ⎛⎜ R3 + R4 ⎞⎟ · XR_Min ⎝ ⎠ = ⎛R + R + R ⎞ · X ⎜ 2 3 4⎟ R_Max ⎝ ⎠ DocID15255 Rev 2 23/29 29 VSTATE signal voltage definition AN2859 Figure 17. Equivalent circuit ACS1 and ACS2 are off VCC MCU R1 STCC082 AVF IA/D≈ 0 R2 A/D conversion VAVF2_H R2 R4 R1 R3 VCC R3 STCC081 AVF R4 VSTATE VAVF1_H VCC VCC Equation 34 VSTATE = V3 = VCC · R3 + R4 R1 + R2 + VCC · = VCC R1 + R2 + R3 + R4 R1 + R2 + R3 + R4 Equation 35 V3_Max = VCC_Max Equation 36 V3_Min = VCC_Min 24/29 DocID15255 Rev 2 VSTATE AN2859 Resistor settings Appendix C Resistor settings Figure 15, and equations 37, 38 and39 define conditions to identify the state of each AC switch. Equation 37 V1_Min > V0_Max Equation 38 V2_Min > V1_Max Equation 39 V2_Max < V3_Min C.1 First case: V1_Min > V0_Max Equations 26 and 30 define respectively V0_Max and V1_Min (see Appendix A). To take into account R1 resistor’s standardized values (see Equation 13), the resistor’s tolerance (XR), the STCC08 AVF output electrical dispersion and the DC power supply characteristic, the condition on R2 and R4 resistors is defined in Equation 42. Equation 40 V1_Min > V0_Max Equation 41 VCC_Min · R4 · XR_Min + VAVF_L_Min · ⎛⎜ R1 + R2 ⎞⎟ · XR_Min ⎝ ⎠ > VAVF_L_Max ⎛R + R + R ⎞ · X ⎜ 1 ⎟ 2 4 R_Max ⎝ ⎠ Equation 42 R4 > ⎤ ⎛X ⎞ ⎜ ⎟ · ⎜ R_Max ⎟ − VAVF_L_Min ⎥ ⎥ ⎜X ⎟ ⎝ R_Min ⎠ ⎦⎥ ⎛X ⎞ ⎜ ⎟ VCC_Min − VAVF_L_Max · ⎜ R_Max ⎟ ⎜X ⎟ ⎝ R_Min ⎠ ⎡ ⎛ R + R ⎞ · ⎢V ⎜ 1 2 ⎟ ⎢ AVF_L_Max ⎠ ⎝ ⎣⎢ DocID15255 Rev 2 25/29 29 Resistor settings C.2 AN2859 Second case: V2_Min > V1_Max Equations 29 and 33 define respectively V1_Max and V2_Min (see Appendix A). To take into account R3 resistor’s standardized values, the resistor’s tolerance (XR), the STCC08 AVF output electrical dispersion and the DC power supply characteristic, the condition on R2 and R4 resistors is defined by Equation 46. Equation 43 V2_Min > V1_Max Equation 44 V2_Min VCC_Min · R2 · XR_Min + VAVF_L_Min · ⎛⎜ R + R4 ⎞⎟ ·XR_Min ⎝ ⎠ = ⎛R + R + R ⎞ · X ⎜ 2 3 4⎟ R_Max ⎝ ⎠ Equation 45 V1_Max VCC_Max · R4 · XR_Max + VAVF_L_Max · ⎛⎜ R1 + R2 ⎞⎟ · XR_Max ⎝ ⎠ = ⎛R + R + R ⎞ · X ⎜ 1 2 4⎟ R_Min ⎝ ⎠ Equation 46 2 ⎡ ⎡ ⎛X ⎞ ⎤ ⎛X ⎢ ⎢ ⎜ R_Max ⎟ ⎥ ⎜ R_Max − R2 · ⎢VCC_Min − VAVF_L_Max ⎜ R · V · 3 ⎢ AVF_L_Max ⎜ ⎟ ⎥ ⎜X ⎟ ⎜X ⎢ ⎢ ⎝ R_Min ⎠ ⎥⎦ ⎝ R_Min ⎣ ⎣ R4 < 2 ⎛X ⎞ ⎜ ⎟ VCC_Max · ⎜ R_Max ⎟ − VAVF_L_Min ⎜X ⎟ ⎝ R_Min ⎠ 26/29 DocID15255 Rev 2 2 ⎤ ⎞ ⎥ ⎟ ⎟ − VAVF_L_Min ⎥ ⎟ ⎥ ⎠ ⎦ AN2859 C.3 Resistor settings Third case: V2_Max < V3_Min Equations 32 and 36 define respectively V2_Max and V3_Min (see Appendix A). To take into account R3 resistor’s standardized values, the resistors’ tolerance (XR), the STCC08 AVF output electrical dispersion and the DC power supply characteristic, the condition on R2 and R4 resistors is defined in Equation 49. Equation 47 V2_Max < V3_Min Equation 48 VCC_Max · R2 · XR_Max + VAVF_L_Max · ⎛⎜ R3 + R4 ⎞⎟ · XR_Max ⎝ ⎠ < VCC_Min ⎛R + R + R ⎞ · X ⎜ 2 3 4⎟ R_Min ⎝ ⎠ Equation 49 ⎡ ⎤ X R2 · ⎢VCC_Max − VCC_Min · R_Min ⎥ ⎢ XR_Max ⎥⎦ ⎣ R4 > − R3 XR_Min VCC_Min · − VAVF_L_Max XR_Max DocID15255 Rev 2 27/29 29 Revision history AN2859 Revision history Table 10. Document revision history 28/29 Date Revision Changes 08-Dec-2009 1 Initial release. 29-Jul-2014 2 Updated Figure 13 and the note below it. DocID15255 Rev 2 AN2859 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2014 STMicroelectronics – All rights reserved DocID15255 Rev 2 29/29 29