EEPROM 2kx16

EEPROM 2kx16
H35 – Memory IP – NVM
Key Parameter
Functional Block Diagram
2kx16 = 32768bit
• Number of Pages
• In/Out Bus Width
• Supply Voltage Write
1.8V to 3.6V
• Supply Voltage Read
1.8V to 3.6V
• Typ. Read Current
37.5µA @ 1MHz
• Typ. Write Current
• Write Time
• Read Access Time
• Block Area
Address Decoder
• Bits Organization
Charge Pump
Memory Array
DataIO / Sense Amplifier
Process Characteristics
Block Features
• Fabrication Process
0.35µm (H35EE)
• Fixed memory building block
• Process Option
Isolated EEPROM
• Fully static RAM operation
• Storage Element
• Pseudo differential sense amplifier
• Temperature Range
-40˚C to 125˚C
• Synchronous I/O interface
• Data Retention
20years at 125˚C
• Write Cycles
40k cycles at 125˚C
General Description
The IP-block represents a non-volatile memory (NVM) device using a SimpleEE floating gate bit
cell, intended for use in embedded micro controller systems. The movement of the charge in and
out of the floating gate is done by the Fowler-Nordheim tunneling mechanism.
Access to the IP-block is similar to a static RAM, except the write access, which is more time
consuming. To speed up write operations, the memory core is organized in 128 pages with 16
columns of 16bit each, where each write operation addresses one page.
The voltage required to program and to erase the memory cell is in the range of 14V, which is
internally generated by an integrated Charge Pump.
A DataIO block with integrated Sense Amplifier together with the Address Decoder, Charge Pump
and the Memory Array is managed by the Control Logic block. Special test modes for NVM bit cell
screening are implemented and executed in the production test flow in order to ensure reliability of
the NVM.
The device is optimized for low power operation by shutting down the sense amplifier after sensing
the state of the bit cells.
For further information and requests, e-mail us at: [email protected]
Disclaimer: This information is provided by ams AG “AS IS” and any express or implied warranties, including, but not limited
to the implied warranties of merchantability and fitness for a particular purpose are disclaimed.
Memory IP Factsheet
[v1-00] 2014-May