IDT2305A 3.3V ZERO DELAY CLOCK BUFFER COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES IDT2305A 3.3V ZERO DELAY CLOCK BUFFER FEATURES: • • • • • • • • • • • • DESCRIPTION: Phase-Lock Loop Clock Distribution 10MHz to 133MHz operating frequency Distributes one clock input to one bank of five outputs Zero Input-Output Delay Output Skew < 250ps Low jitter <200 ps cycle-to-cycle IDT2305A-1 for Standard Drive IDT2305A-1H for High Drive No external RC network required Operates at 3.3V VDD Power down mode Available in SOIC package The IDT2305A is a high-speed phase-lock loop (PLL) clock buffer, designed to address high-speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The IDT2305A is an 8-pin version of the IDT2309A. IDT2305A accepts one reference input, and drives out five low skew clocks. The -1H version of this device operates up to 133MHz frequency and has a higher drive than the -1 device. All parts have on-chip PLLs which lock to an input clock on the REF pin. The PLL feedback is on-chip and is obtained from the CLKOUT pad. In the absence of an input clock, the IDT2305A enters power down. In this mode, the device will draw less than 12µA for Commercial Temperature range and less than 25µA for Industrial temperature range, the outputs are tri-stated, and the PLL is not running, resulting in a significant reduction of power. The IDT2305A is characterized for both Industrial and Commercial operation. FUNCTIONAL BLOCK DIAGRAM 8 CLKOUT REF 1 3 PLL CLK1 Control Logic 2 5 CLK2 CLK3 7 CLK4 The IDT logo is a registered trademark of Integrated Device Technology, Inc. COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES JULY 2004 1 c 2004 Integrated Device Technology, Inc. DSC 6586/3 IDT2305A 3.3V ZERO DELAY CLOCK BUFFER COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES ABSOLUTE MAXIMUM RATINGS(1) PIN CONFIGURATION Symbol REF 1 8 CLKOUT CLK2 2 7 CLK4 CLK1 3 6 VDD GND 4 5 CLK3 Rating Max. Unit VDD Supply Voltage Range –0.5 to +4.6 V VI (2) Input Voltage Range (REF) –0.5 to +5.5 V VI Input Voltage Range –0.5 to V (except REF) IIK (VI < 0) Input Clamp Current IO (VO = 0 to VDD) VDD or GND TA = 55°C VDD+0.5 –50 mA Continuous Output Current ±50 mA Continuous Current ±100 mA Maximum Power Dissipation 0.7 W TSTG Storage Temperature Range –65 to +150 °C 0 to +70 °C -40 to +85 °C (in still air)(3) SOIC TOP VIEW Operating Commercial Temperature Temperature Range Operating Industrial Temperature Temperature Range NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 3. The maximum package power dissipation is calculated using a junction temperature of 150°C and a board trace length of 750 mils. APPLICATIONS: • • • • • SDRAM Telecom Datacom PC Motherboards/Workstations Critical Path Delay Designs PIN DESCRIPTION Pin Name REF Pin Number Type Functional Description 1 IN Input reference clock, 5 Volt tolerant input CLK2(2) 2 Out Output clock CLK1 3 Out Output clock 4 Ground (1) (2) GND CLK3 (2) VDD CLK4 (2) CLKOUT (2) Ground 5 Out Output clock 6 PWR 3.3V Supply 7 Out Output clock 8 Out Output clock, internal feedback on this pin NOTES: 1. Weak pull down. 2. Weak pull down on all outputs. 2 IDT2305A 3.3V ZERO DELAY CLOCK BUFFER COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES OPERATING CONDITIONS - COMMERCIAL Symbol Parameter Min. Max. Unit 3 3.6 V Operating Temperature (Ambient Temperature) 0 70 °C Load Capacitance < 100MHz — 30 pF Load Capacitance 100MHz - 133MHz — 10 Input Capacitance — 7 VDD Supply Voltage TA CL CIN pF DC ELECTRICAL CHARACTERISTICS - COMMERCIAL Symbol Parameter Conditions Min. Max. Unit VIL Input LOW Voltage Level — 0.8 V VIH Input HIGH Voltage Level 2 — V IIL Input LOW Current VIN = 0V — 50 µA IIH Input HIGH Current VIN = VDD — 100 µA VOL Output LOW Voltage Standard Drive — 0.4 V VOH Output HIGH Voltage 2.4 — V IDD_PD Power Down Current REF = 0MHz — 12 µA Supply Current Unloaded Outputs at 66.66MHz — 32 mA IDD IOL = 8mA High Drive IOL = 12mA (-1H) Standard Drive IOH = -8mA High Drive IOH = -12mA (-1H) (1,2) SWITCHING CHARACTERISTICS (2305A-1) - COMMERCIAL Symbol t1 Parameter Output Frequency Conditions Min. Typ. Max. Unit 10pF Load 10 — 133 MHz 30pF Load 10 — 100 Duty Cycle = t2 ÷ t1 Measured at 1.4V, FOUT = 66.66MHz 40 50 60 % t3 Rise Time Measured between 0.8V and 2V — — 2.5 ns t4 Fall Time Measured between 0.8V and 2V — — 2.5 ns t5 Output to Output Skew All outputs equally loaded — — 250 ps t6 Delay, REF Rising Edge to CLKOUT Rising Edge Measured at VDD/2 — 0 ±350 ps t7 Device-to-Device Skew Measured at VDD/2 on the CLKOUT pins of devices — 0 700 ps tJ Cycle-to-Cycle Jitter, pk - pk Measured at 66.66MHz, loaded outputs — — 200 ps PLL Lock Time Stable power supply, valid clock presented on REF pin — — 1 ms tLOCK NOTES: 1. REF Input has a threshold voltage of VDD/2. 2. All parameters specified with loaded outputs. 3 IDT2305A 3.3V ZERO DELAY CLOCK BUFFER COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES SWITCHING CHARACTERISTICS (2305A-1H) - COMMERCIAL Symbol Min. Typ. Max. Unit Output Frequency 10pF Load 30pF Load 10 10 — — 133 100 MHz Duty Cycle = t2 ÷ t1 Measured at 1.4V, FOUT = 66.66MHz 40 50 60 % Duty Cycle = t2 ÷ t1 Measured at 1.4V, FOUT <50MHz 45 50 55 % t3 Rise Time Measured between 0.8V and 2V — — 1.5 ns t4 Fall Time Measured between 0.8V and 2V — — 1.5 ns t5 Output to Output Skew All outputs equally loaded — — 250 ps t6 Delay, REF Rising Edge to CLKOUT Rising Edge Measured at VDD/2 — 0 ±350 ps t7 Device-to-Device Skew Measured at VDD/2 on the CLKOUT pins of devices — 0 700 ps t8 Output Slew Rate Measured between 0.8V and 2V using Test Circuit #2 1 — — V/ns tJ Cycle-to-Cycle Jitter, pk - pk Measured at 66.66MHz, loaded outputs — — 200 ps PLL Lock Time Stable power supply, valid clock presented on REF pin — — 1 ms t1 tLOCK Parameter Conditions (1,2) NOTES: 1. REF Input has a threshold voltage of VDD/2. 2. All parameters specified with loaded outputs. OPERATING CONDITIONS - INDUSTRIAL Symbol Parameter Min. Max. Unit VDD Supply Voltage 3 3.6 V TA Operating Temperature (Ambient Temperature) -40 +85 °C CL Load Capacitance < 100MHz — 30 pF Load Capacitance 100MHz - 133MHz — 10 Input Capacitance — 7 CIN pF DC ELECTRICAL CHARACTERISTICS - INDUSTRIAL Symbol Parameter Conditions VIL Input LOW Voltage Level VIH Input HIGH Voltage Level IIL Input LOW Current VIN = 0V IIH Input HIGH Current VIN = VDD VOL Output LOW Voltage VOH IDD_PD IDD Output HIGH Voltage Standard Drive IOL = 8mA High Drive IOL = 12mA (-1H) Standard Drive IOH = -8mA High Drive IOH = -12mA (-1H) Min. Max. Unit — 0.8 V 2 — V — 50 µA — 100 µA — 0.4 V 2.4 — V Power Down Current REF = 0MHz — 25 µA Supply Current Unloaded Outputs at 66.66MHz — 35 mA 4 IDT2305A 3.3V ZERO DELAY CLOCK BUFFER COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES SWITCHING CHARACTERISTICS (2305A-1) - INDUSTRIAL Symbol t1 Parameter Output Frequency (1,2) Conditions Min. Typ. Max. Unit 10pF Load 10 — 133 MHz 30pF Load 10 — 100 Duty Cycle = t2 ÷ t1 Measured at 1.4V, FOUT = 66.66MHz 40 50 60 % t3 Rise Time Measured between 0.8V and 2V — — 2.5 ns t4 Fall Time Measured between 0.8V and 2V — — 2.5 ns t5 Output to Output Skew All outputs equally loaded — — 250 ps t6 Delay, REF Rising Edge to CLKOUT Rising Edge Measured at VDD/2 — 0 ±350 ps t7 Device-to-Device Skew Measured at VDD/2 on the CLKOUT pins of devices — 0 700 ps tJ Cycle-to-Cycle Jitter, pk - pk Measured at 66.66MHz, loaded outputs — — 200 ps PLL Lock Time Stable power supply, valid clock presented on REF pin — — 1 ms Min. Typ. Max. Unit 10 10 — — 133 100 MHz tLOCK NOTES: 1. REF Input has a threshold voltage of VDD/2. 2. All parameters specified with loaded outputs. SWITCHING CHARACTERISTICS (2305A-1H) - INDUSTRIAL Symbol Parameter Conditions (1,2) Output Frequency 10pF Load 30pF Load Duty Cycle = t2 ÷ t1 Measured at 1.4V, FOUT = 66.66MHz 40 50 60 % Duty Cycle = t2 ÷ t1 Measured at 1.4V, FOUT <50MHz 45 50 55 % t3 Rise Time Measured between 0.8V and 2V — — 1.5 ns t4 Fall Time Measured between 0.8V and 2V — — 1.5 ns t5 Output to Output Skew All outputs equally loaded — — 250 ps t6 Delay, REF Rising Edge to CLKOUT Rising Edge Measured at VDD/2 — 0 ±350 ps t7 Device-to-Device Skew Measured at VDD/2 on the CLKOUT pins of devices — 0 700 ps t8 Output Slew Rate Measured between 0.8V and 2V using Test Circuit #2 1 — — V/ns tJ Cycle-to-Cycle Jitter, pk - pk Measured at 66.66MHz, loaded outputs — — 200 ps PLL Lock Time Stable power supply, valid clock presented on REF pin — — 1 ms t1 tLOCK NOTES: 1. REF Input has a threshold voltage of VDD/2. 2. All parameters specified with loaded outputs. ZERO DELAY AND SKEW CONTROL All outputs should be uniformly loaded in order to achieve Zero I/O Delay. Since the CLKOUT pin is the internal feedback for the PLL, its relative loading can affect and adjust the input/output delay. For designs utilizing zero I/O Delay, all outputs including CLKOUT must be equally loaded. Even if the output is not used, it must have a capacitive load equal to that on the other outputs in order to obtain true zero I/O Delay. If I/O Delay adjustments are needed, use the Output Load Difference diagram to calculate loading differences between the CLKOUT pin and other outputs. For zero output-to-output skew, all outputs must be loaded equally. 5 IDT2305A 3.3V ZERO DELAY CLOCK BUFFER COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES SWITCHING WAVEFORMS 1.4V t1 Output t2 1.4V 1.4V 1.4V 1.4V Output t5 Output to Output Skew Duty Cycle Timing Output 0.8V 2V 2V 3.3V 0.8V VDD/2 REF 0V t4 t3 VDD/2 Output t6 Input to Output Propagation Delay All Outputs Rise/Fall Time CLKOUT Device 1 CLKOUT Device 2 VDD/2 VDD/2 t7 Device to Device Skew TEST CIRCUITS VDD 0.1µF CLKOUT OUTPUTS VDD 0.1µF 1KΩ CLKOUT OUTPUTS CLOAD 1KΩ 10pF VDD VDD 0.1µF 0.1µF GND GND GND GND Test Circuit 2 (t8, Output Slew Rate On -1H Devices) Test Circuit 1 (all Parameters Except t8) 6 IDT2305A 3.3V ZERO DELAY CLOCK BUFFER COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES ORDERING INFORMATION IDT XXXXX Device Type XX Package X Process Ordering Code Blank I Commercial (0oC to +70oC) Industrial (-40oC to +85oC) DC DCG Small Outline IC SOIC - Green 2305A-1 2305A-1H Zero Delay Clock Buffer with High Drive Package Type Operating Range IDT2305A-1DC 8-Pin SOIC Commercial IDT2305A-1DCG 8-Pin SOIC Commercial IDT2305A-1DCGI 8-Pin SOIC Industrial IDT2305A-1DCI 8-Pin SOIC Industrial IDT2305A-1HDC 8-Pin SOIC Commercial IDT2305A-1HDCG 8-Pin SOIC Commercial IDT2305A-1HDCGI 8-Pin SOIC Industrial IDT2305A-1HDCI 8-Pin SOIC Industrial CORPORATE HEADQUARTERS 2975 Stender Way Santa Clara, CA 95054 for SALES: 800-345-7015 or 408-727-6116 fax: 408-492-8674 www.idt.com 7 for Tech Support: [email protected] (408) 654-6459