RENESAS RJE0607JSP

Preliminary Datasheet
RJE0607JSP
REJ03G1876-0100
Rev.1.00
Apr 01, 2010
Silicon P Channel MOS FET Series
Power Switching
Description
This FET has the over temperature shut-down capability sensing to the junction temperature. This FET has the built-in
over temperature shut-down circuit in the gate area. And this circuit operation to shut-down the gate voltage in case of
high junction temperature like applying over power consumption, over current etc..
Features






High endurance capability against to the short circuit.
Built-in the over temperature shut-down circuit.
Latch type shut down operation (need 0 voltage recovery).
Built-in the current limitation circuit.
Low on-resistance RDS(on) : 140 m Typ, 260 m Max (VGS = –10 V)
High density mounting
Outline
RENESAS Package code: PRSP0008DD-D
(Package name: SOP-8 (FP-8DAV))
8
7
65
D
3
1 2
Latch
Circuit
D
5
4
Current
Limitation
Circuit
Gate Resistor
Temperature
Sensing
Circuit
D
8
6
4
2
G
D
7
G
Gate
Shut-down
Circuit
MOS1
Gate Resistor
Temperature
Sensing
Circuit
1
S
Latch
Circuit
MOS2
1, 3
Source
2, 4
Gate
5, 6, 7, 8 Drain
Current
Limitation
Circuit
Gate
Shut-down
Circuit
3
S
Absolute Maximum Ratings
(Ta = 25°C)
Item
Symbol
Ratings
Drain to source voltage
VDSS
–60
Gate to source voltage
VGSS
–16
Gate to source voltage
VGSS
2.5
Drain current
ID Note5
–1.5
Body-drain diode reverse drain current
IDR
–1.5
Avalanche current
IAP Note 4
–1.5
Avalanche energy
EAR Note 4
9.6
Channel dissipation
Pch Note 2
2
Channel dissipation
Pch Note 3
1.5
Channel temperature
Tch
150
Storage temperature
Tstg
–55 to +150
Notes: 1. Value at Tc = 25C
2. 1 Drive operation : When using the glass epoxy board (FR4 40  40  1.6 mm), PW  10 s
3. 2 Drive operation : When using the glass epoxy board (FR4 40  40  1.6 mm), PW  10 s
4. Tch = 25C, Rg  50 
5. It provides by the current limitation lower bound value.
REJ03G1876-0100 Rev.1.00
Apr 01, 2010
Unit
V
V
V
A
A
A
mJ
W
W
C
C
Page 1 of 7
RJE0607JSP
Preliminary
Typical Operation Characteristics
(Ta = 25°C)
Item
Input voltage
Input current
(Gate non shut down)
Symbol
VIH
VIL
IIH1
IIH2
IIL
Input current
(Gate shut down)
Shut down temperature
IIH(sd)1
IIH(sd)2
Tsd
Gate operation voltage
Vop
Drain current
(Current limitation value)
ID limt
Min
–3.5
—
—
—
—
—
—
—
Typ
—
—
—
—
—
–0.8
–0.35
175
Max
—
–1.2
–100
–50
–1
—
—
—
Unit
V
V
A
A
A
mA
mA
C
–3.5
–1.5
—
—
–12
—
V
A
Test Conditions
Vi = –8 V, VDS = 0
Vi = –3.5 V, VDS = 0
Vi = –1.2 V, VDS = 0
Vi = –8 V, VDS = 0
Vi = –3.5 V, VDS = 0
Channel temperature
(dv/dt VGS  500 V/ms)
VGS = –12 V, VDS = –10 V Note 4
Notes; 6. Pulse test
Electrical Characteristics
(Ta = 25°C)
Item
Drain current
Symbol
ID1
ID2
ID3
Min
—
—
–1.5
–60
Typ
—
—
—
—
Max
–2
–10
—
—
Unit
A
mA
A
V
Test Conditions
VGS = –3.5 V, VDS = –10 V
VGS = –1.2 V, VDS = –10 V
VGS = –12 V, VDS = –10 V Note 7
ID = –10 mA, VGS = 0
V(BR)GSS
IGSS1
IGSS2
IGSS3
IGSS4
IGS(OP)1
IGS(OP)2
IDSS1
IDSS2
–16
2.5
—
—
—
—
—
—
—
—
—
—
—
—
—
—
–0.8
–0.35
—
—
—
—
–100
–50
–1
100
—
—
–10
–10
V
V
A
A
A
A
mA
mA
A
A
IG = –800 A, VDS = 0
IG = 100 A, VDS = 0
VGS = –8 V, VDS = 0
VGS = –3.5 V, VDS = 0
VGS = –1.2 V, VDS = 0
VGS = 2.4 V, VDS = 0
VGS = –8 V, VDS = 0
VGS = –3.5 V, VDS = 0
VDS = –60 V, VGS = 0
VGS(off)
RDS(on)
–2.2
—
—
185
–3.4
380
V
m
RDS(on)
Coss
—
—
140
194
260
—
m
pF
td(on)
tr
td(off)
tf
VDF
trr
—
—
—
—
—
—
1.82
1.95
0.99
0.84
0.83
85
—
—
—
—
—
—
s
s
s
s
V
ns
tos1
—
18.6
—
ms
Drain to source breakdown
voltage
V(BR)DSS
Gate to source breakdown
voltage
V(BR)GSS
Gate to source leak current
Input current (shut down)
Zero gate voltage drain current
Gate to source cutoff voltage
Static drain to source on state
resistance
Output capacitance
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Body-drain diode forward voltage
Body-drain diode reverse
recovery time
Over load shut down
Note 8
operation time
VDS = –48 V, VGS = 0
Ta = 125C
VDS = –10 V, ID = –1 mA
ID = –0.75 A, VGS = –6 V Note 7
ID = –0.75 A, VGS = –10 V
Note 7
VDS = –10 V, VGS = 0, f =
1MHz
VGS = –10 V, ID= –0.75 A,
RL = 40 
IF = –1.5 A, VGS = 0
IF = –1.5 A, VGS = 0
diF/dt = 50 A/s
VGS = –5 V, VDD = –16 V
Notes: 7. Pulse test
8. Including the junction temperature rise of the over loaded condition.
REJ03G1876-0100 Rev.1.00
Apr 01, 2010
Page 2 of 7
RJE0607JSP
Preliminary
Main Characteristics
Power vs. Temperature Derating
Maximum Safe Operation Area
−10 Ta = 25°C
3.0
Operation
in this area
is limited RDS(on)
tio
n
−0.01
−0.01
0
0
50
100
150
200
−0.1
9
era
−0.1
te
n
Op
s
tio
No
er
ra
m
pe
riv
s
1.0
10
rO
2D
1
ive
<
PW
Dr
ion
at
er
1
−1
Op
2.0
Thermal shut down operation area
1 shot Pulse
1 Driver Operation
Drain Current ID (A)
Test condition.
When using the glass epoxy board.
(FR4 40 x 40 x 1.6 mm), (PW ≤ 10s)
DC
Channel Dissipation Pch (W)
4.0
−1
−10
−100
Drain to Source Voltage VDS (V)
Case Temperature Tc (°C)
Note 6:
When using the glass epoxy board.
(FR4 40 x 40 x 1.6 mm)
Typical Output Characteristics
−4.5 V
−5 V
−6 V
−8 V
−10 V
−1.0
−2.0
Pulse Test
−4 V
−0.5
Drain Current ID (A)
Drain Current ID (A)
−1.5
Typical Transfer Characteristics
VDS = −10 V
Pulse Test
−1.5
Tc = 75°C
−1.0
25°C
−0.5
−40°C
−3.5 V
VGS = 0 V
−2
−4
−6
−8
0
0
−10
−2
−4
−6
−8
−10
Drain to Source Voltage VDS (V)
Gate to Source Voltage VGS (V)
Drain Source Saturation Voltage vs.
Gate to Source Voltage
Static Drain to Source On State Resistance
vs. Drain Current
−1000
Pulse Test
−800
−600
−400
−200
−1 A
0
−2
ID = −0.5 A
−4
−6
−8
−10
Gate to Source Voltage VGS (V)
REJ03G1876-0100 Rev.1.00
Apr 01, 2010
Static Drain to Source On State Resistance
RDS(on) (mΩ)
Drain to Source Saturation Voltage
VDS(on) (mV)
0
1000
Pulse Test
VGS = −6 V
100
10
−0.1
−10 V
−1
−10
Drain Current ID (A)
Page 3 of 7
Preliminary
Body-Drain Diode Reverse
Recovery Time
Static Drain to Source On State Resistance
vs. Temperature
1000
500
Pulse Test
400
ID = −1 A
−0.2 A, −0.5 A
300
200
VGS = −6 V
100
ID = −0.2 A, −0.5 A, −1 A
−10 V
0
−50
−25
0
25
50
Reverse Recovery Time trr (ns)
Static Drain to Source On State Resistance
RDS(on) (mΩ)
RJE0607JSP
75 100 125 150
di / dt = 50 A /μs
VGS = 0, Ta = 25°C
10
−0.1
−1
−10
Case Temperature Tc (°C)
Reverse Drain Current IDR (A)
Switching Characteristics
Typical Capacitance vs.
Drain to Source Voltage
10
1000
Capacitance C (pF)
Switching Time t (μs)
100
tr
td(on)
1
td(off)
tf
VGS = 0
f = 1 MHz
Coss
100
VGS = −10 V, VDD = −30 V
PW = 300 μs, duty ≤ 1 %
0.1
−0.1
−1
−30
−40
−50
−60
Reverse Drain Current vs.
Source to Drain Voltage
Gate to Source Voltage vs.
Shutdown Time of Load-Short Test
–10 V
–1.5
–5 V
VGS = 0 V
–0.5
–0.4
–0.8
–1.2
–1.6
–2.0
Source to Drain Voltage VSD (V)
REJ03G1876-0100 Rev.1.00
Apr 01, 2010
Gate to Source Voltage VGS (V)
Reverse Drain Current IDR (A)
−20
Drain to Source Voltage VDS (V)
Pulse Test
0
−10
Drain Current ID (A)
–2.0
–1.0
10
−0
−10
−16
−14
−12
−10
VDD = −16 V
−8
−6
−4
−2
0
1
10
100
Shutdown Time of Load-Short Test Pw (ms)
Page 4 of 7
RJE0607JSP
Preliminary
Shutdown Case Temperature Tc (°C)
Shutdown Case Temperature vs.
Gate to Source Voltage
200
180
160
140
120 ID = −0.2 A
dv/dt
VGS ≥ 500 V/ms
100
0
−2
−4
−6
−8
−10
Normalized Transient Thermal Impedance γs (t)
Gate to Source Voltage VGS (V)
Normalized Transient Thermal Impedance vs. Pulse Width (1 Drive Operation)
10
1
D=1
0.5
0.1
0.1
0.05
0.2
0.02
0.01
θch-f(t) = γs (t) • θch - f
θch-f = 125°C/W, Ta = 25°C
When using the glass epoxy board
(FR4 40 x 40 x 1.6 mm)
0.01
e
uls
tp
o
sh
0.001
PDM
1
D=
PW
T
PW
T
0.0001
10 μ
100 μ
1m
10 m
100 m
1
10
100
1000
10000
Normalized Transient Thermal Impedance γs (t)
Pulse Width PW (S)
Normalized Transient Thermal Impedance vs. Pulse Width
(Operatioon of 2 devices; allowable value per device)
10
1
D=1
0.5
0.2
0.1
0.1
0.05
0.02
0.01
θch-f(t) = γs (t) • θch - f
θch-f = 166°C/W, Ta = 25°C
When using the glass epoxy board
(FR4 40 x 40 x 1.6 mm)
0.01
e
0.001
uls
PDM
tp
o
sh
D=
1
PW
T
PW
T
0.0001
10 μ
100 μ
1m
10 m
100 m
1
10
100
1000
10000
Pulse Width PW (S)
REJ03G1876-0100 Rev.1.00
Apr 01, 2010
Page 5 of 7
RJE0607JSP
Preliminary
Switching Time Test Circuit
Vout
Monitor
Vin Monitor
Waveform
Vin
10%
D.U.T.
RL
Vin
–10 V
50 Ω
REJ03G1876-0100 Rev.1.00
Apr 01, 2010
90%
VDD
= –30 V
90%
90%
Vout
10%
td(on)
tr
10%
td(off)
tf
Page 6 of 7
RJE0607JSP
Preliminary
Package Dimensions
JEITA Package Code
P-SOP8-3.95 × 4.9-1.27
RENESAS Code
PRSP0008DD-D
Previous Code
FP-8DAV
MASS[Typ.]
0.085g
F
Package Name
SOP-8
*1 D
bp
1
c
*2 E
Index mark
HE
5
8
4
Z
Terminal cross section
(Ni/Pd/Au plating)
* 3 bp
x M
NOTE)
1. DIMENSIONS "*1(Nom)" AND "*2"
DO NOT INCLUDE MOLD FLASH.
2. DIMENSION "*3" DOES NOT
INCLUDE TRIM OFFSET.
e
Reference
Symbol
A1
A
L1
L
y
Detail F
D
E
A2
A1
A
bp
b1
c
c1
HE
e
x
y
Z
L
L1
Dimension in Millimeters
Min
Nom Max
4.90 5.3
3.95
0.10 0.14 0.25
1.75
0.34 0.40 0.46
0.15 0.20
0.25
0°
8°
5.80 6.10 6.20
1.27
0.25
0.1
0.75
0.40 0.60 1.27
1.08
Ordering Information
Part No.
RJE0607JSP-00-J0
REJ03G1876-0100 Rev.1.00
Apr 01, 2010
Quantity
2500 pcs/reel
Shipping Container
Taping
Page 7 of 7
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