IDT49FCT3805D/E 3.3V CMOS DUAL 1-TO-5 CLOCK DRIVER INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS DUAL 1-TO-5 CLOCK DRIVER IDT49FCT3805D/E FEATURES: DESCRIPTION: • • • • • • • • • • • • • The FCT3805 is a 3.3 volt clock driver built using advanced CMOS technology. The device consists of two banks of drivers, each with a 1:5 fanout and its own output enable control. The device has a "heartbeat" monitor for diagnostics and PLL driving. The MON output is identical to all other outputs and complies with the output specifications in this document. The FCT3805 offers low capacitance inputs. The FCT3805 is designed for high speed clock distribution where signal quality and skew are critical. The FCT3805 also allows single point-to-point transmission line driving in applications such as address distribution, where one signal must be distributed to multiple recievers with low skew and high signal quality. For more information on using the FCT3805 with two different input frequencies on bank A and B, please see AN-236. Advanced CMOS Technology Guaranteed low skew < 200ps (max.) Very low propagation delay < 2.5ns (max) Very low duty cycle distortion < 270ps (max) Very low CMOS power levels Operating frequency up to 166MHz TTL compatible inputs and outputs Inputs can be driven from 3.3V or 5V components Two independent output banks with 3-state control 1:5 fanout per bank "Heartbeat" monitor output VCC = 3.3V ± 0.3V Available in SSOP and QSOP packages PIN CONFIGURATION FUNCTIONAL BLOCK DIAGRAM OE A 5 IN A 5 IN B OA 1 - OA 5 OB 1 - OB 5 OE B MON VCCA 1 20 VCCB OA1 2 19 OB1 OA2 3 18 OB2 OA3 4 17 OB3 GNDA 5 16 GNDB OA4 6 15 OB4 OA5 7 14 OB5 GNDQ 8 13 MON OEA 9 12 OEB INA 10 11 INB SSOP/ QSOP TOP VIEW The IDT logo is a registered trademark of Integrated Device Technology, Inc. INDUSTRIAL TEMPERATURE RANGE SEPTEMBER 2004 1 c 2004 Integrated Device Technology, Inc. DSC-5864/19 IDT49FCT3805D/E 3.3V CMOS DUAL 1-TO-5 CLOCK DRIVER INDUSTRIAL TEMPERATURE RANGE ABSOLUTE MAXIMUM RATINGS(1) Symbol VCC Description Input Power Supply Voltage PIN DESCRIPTION Max Unit Pin Names –0.5 to +4.6 V OEA, OEB Description 3-State Output Enable Inputs (Active LOW) VI Input Voltage –0.5 to +5.5 V INA, INB Clock Inputs VO Output Voltage –0.5 to VCC+0.5 V OAn, OBn Clock Outputs TJ Junction Temperature 150 °C MON Monitor Output TSTG Storage Temperature –65 to +165 °C NOTE: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. FUNCTION TABLE (1) Inputs CAPACITANCE (TA = +25 C, f = 1.0MHz) O Symbol Parameter(1) Conditions Typ. Max. Unit CIN Input Capacitance VIN = 0V 3 4 pF COUT Output Capacitance VOUT = 0V — 6 pF Outputs OEA, OEB INA, INB OAn, OBn MON L L L L L H H H H L Z L H H Z H NOTE: 1. H = HIGH L = LOW Z = High-Impedance NOTE: 1. This parameter is measured at characterization but not tested. DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified Industrial: TA = -40°C to +85°C, VCC = 3.3V ± 0.3V Symbol Test Conditions(1) Parameter Min. Typ.(2) Max. Unit VIH Input HIGH Level 2 — 5.5 V VIL Input LOW Level –0.5 — 0.8 V IIH Input HIGH Current — — ±1 IIL VCC = Max. VI = 5.5V Input LOW Current VCC = Max. VI = GND — — ±1 IOZH High Impedance Output Current VCC = Max. VO = VCC — — ±1 IOZL (3-State Outputs Pins) VO = GND — — ±1 VIK Clamp Diode Voltage — –0.7 –1.2 V –45 –74 –180 mA IODH Output HIGH Current VCC = Min., IIN = –18mA VCC = 3.3V, VIN = VIH or VIL, VO = 1.5V(3,4) 1.5V(3,4) IODL Output LOW Current VCC = 3.3V, VIN = VIH or VIL, VO = IOS Short Circuit Current VCC = Max., VO = GND(3,4) VOH Output HIGH Voltage VCC = Min. VIN = VIH or VIL 50 90 200 mA –60 –135 –240 mA IOH = –12mA 2.4(5) 3 — IOH = –8mA 2.4(5) 3 — VCC - 0.2 — — IOH = –100μA VOL Output LOW Voltage VCC = Min. IOL = 12mA — 0.3 0.4 VIN = VIH or VIL IOL = 8mA — 0.2 0.4 IOL = 100μA — — 0.2 NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 3.3V, 25°C ambient. 3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. 4. This parameter is guaranteed but not tested. 5. VOH = Vcc -0.6V at rated current. 2 µA V V IDT49FCT3805D/E 3.3V CMOS DUAL 1-TO-5 CLOCK DRIVER INDUSTRIAL TEMPERATURE RANGE POWER SUPPLY CHARACTERISTICS Symbol Parameter ICCL Quiescent Power Supply Current Test Conditions(1) VCC = Max. Min. Typ.(2) Max. Unit — 0.1 30 µA — 45 300 µA — 80 120 µ A/MHz — 125 150 — 125 150 VIN = GND or VCC ICCH ICCZ ΔICC Power Supply Current per Input HIGH VCC = Max. VIN = VCC –0.6V ICCD Dynamic Power Supply Current VCC = Max. VIN = VCC per Output(3) CL = 15pF VIN = GND All Outputs Toggling IC Total Power Supply Current(4) VCC = Max. VIN = VCC CL = 15pF VIN = GND All Outputs Toggling VIN = VCC –0.6V fi = 133MHz VIN = GND VCC = Max. VIN = VCC CL = 15pF VIN = GND All Outputs Toggling VIN = VCC –0.6V fi = 166MHz VIN = GND mA — 155 195 — 160 195 NOTES: 1. 2. 3. 4. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. Typical values are at VCC = 3.3V, +25°C ambient. This parameter is not directly testable, but is derived for use in Total Power Supply calculations. IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ΔICC DHNT + ICCD (fONO) ICC = Quiescent Current (ICCL, ICCH and ICCZ) ΔICC = Power Supply Current for a TTL High Input (VIN = VCC -0.6V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fO = Output Frequency NO = Number of Outputs at fO 3 IDT49FCT3805D/E 3.3V CMOS DUAL 1-TO-5 CLOCK DRIVER INDUSTRIAL TEMPERATURE RANGE SWITCHING CHARACTERISTICS OVER OPERATING RANGE - 3805D (3,4) Symbol Parameter Conditions(1) Min.(2) Max. Unit 1 3 ns tPLH Propagation Delay CL = 15pF tPHL INA to OAn, INB to OBn f ≤ 133MHz tR Output Rise Time (0.8V to 2V) — 1.5 ns tF Output Fall Time (2V to 0.8V) — 1.5 ns tSK(O) Same device output pin to pin skew(5) — 270 ps tSK(P) Pulse skew(6,9) — 270 ps tSK(PP) Part to part skew(7) — 550 ps tPZL Output Enable Time — 5.2 ns tPZH OEA to OAn, OEB to OBn tPLZ Output Disable Time — 5.2 ns tPHZ OEA to OAn, OEB to OBn fMAX Input Frequency — 133 MHz SWITCHING CHARACTERISTICS OVER OPERATING RANGE - 3805E (3,4) Symbol Parameter Conditions(1,8) Min.(2) Max. Unit 0.5 2.5 ns tPLH Propagation Delay CL = 15pF tPHL INA to OAn, INB to OBn f ≤ 166MHz tR Output Rise Time (0.8V to 2V) — 1 ns tF Output Fall Time (2V to 0.8V) — 1 ns tSK(O) Same device output pin to pin skew(5) — 200 ps tSK(P) Pulse skew(6,9) — 270 ps tSK(PP) Part to part skew(7) — 550 ps — 5.2 ns — 5.2 ns — 166 MHz tPZL Output Enable Time tPZH OEA to OAn, OEB to OBn tPLZ Output Disable Time tPHZ OEA to OAn, OEB to OBn fMAX Input Frequency NOTES: 1. See test circuits and waveforms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. tPLH, tPHL, tSK(P), and tSK(O) are production tested. All other parameters guaranteed but not production tested. 4. Propagation delay range indicated by Min. and Max. limit is due to VCC, operating temperature and process parameters. These propagation delay limits do not imply skew. 5. Skew measured between all outputs under identical transitions and load conditions. 6. Skew measured is difference between propagation delay times tPHL and tPLH of same outputs under identical load conditions. 7. Part to part skew for all outputs given identical transitions and load conditions at identical VCC levels and temperature. 8. Airflow of 1m/s is recommended for frequencies above 133MHz. 9. This parameter is measured using f = 1MHz. 4 IDT49FCT3805D/E 3.3V CMOS DUAL 1-TO-5 CLOCK DRIVER INDUSTRIAL TEMPERATURE RANGE TEST CIRCUITS AND WAVEFORMS 6V V CC O pen G ND 500 Ω V IN V O UT Pulse Generator D.U.T RL CL RT 500 Ω Enable and Disable Time Circuit V CC INPUT t PLH1 t PH L1 3V 1.5V 0V VOH V IN V O UT Pulse Generator 1.5V VOL OUTPUT 1 D.U.T RL t SK(o) CL RT t SK(o) OUTPUT 2 t PLH2 VOH 1.5V VOL t PH L2 t SK(o) = |t PLH2 - t PLH1 | or |t P HL2 - t PHL1 | Output Skew - tSK(O) CL = 15pF Test Circuit SWITCH POSITION TEST CONDITIONS Test Switch Symbol VCC = 3.3V ±0.3V Unit Disable Low Enable Low 6V CL 15 pF RT ZOUT of pulse generator Ω Disable High Enable High GND RL 33 Ω tR / tF 1 (0V to 3V or 3V to 0V) ns DEFINITIONS: CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator. tR / tF = Rise/Fall time of the input stimulus from the Pulse Generator. 5 IDT49FCT3805D/E 3.3V CMOS DUAL 1-TO-5 CLOCK DRIVER INDUSTRIAL TEMPERATURE RANGE TEST CIRCUITS AND WAVEFORMS ENABLE 3V DISABLE INPUT 1.5V 0V 3V CONTROL INPUT OUTPUT NORMALLY LOW t PLZ V OH 1.5V SW ITCH CLOSED OUTPUT NORMALLY HIGH V OH 0.3V 0.3V SW ITCH OPEN VOH PACKAGE 2 OUTPUT V OH t PLH2 1.5V V OL tSK(PP) t SK(PP) VOL t PHZ t PZH VOH 1.5V VOL PACKAGE 1 OUTPUT 0V t PZL tPH L1 tPLH1 1.5V V OL tSK(P P) = |tPLH2 - t PLH1 | tPHL2 or |t PHL2 - tP HL1 | Part-to-Part Skew - tSK(PP) Enable and Disable Times NOTE: 1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH Part-to-Part Skew is for the same package and speed grade. 3V INPUT 3V INPUT 1.5V 1.5V 0V t PLH 0V t PHL t PLH tPHL VOH 2.0V OUTPUT 0.8V tR 1.5V VOL V OH OUTPUT 1.5V 1.5V VOL VOL tSK(P ) = |t PLH - tPLH | tF Propagation Delay Pulse Skew 6 IDT49FCT3805D/E 3.3V CMOS DUAL 1-TO-5 CLOCK DRIVER INDUSTRIAL TEMPERATURE RANGE ORDERING INFORMATION IDT49FCT XXXX Device Type X Package X Process CORPORATE HEADQUARTERS 6024 Silver Creek Valley Road San Jose, CA 95138 I -40°C to +85°C (Industrial) PY PYG Q QG Shrink Small Outline IC SSOP - Green Quarter-size Small Outline IC QSOP - Green 3805D 3805E 3.3V CMOS Dual 1-to-5 Clock Driver for SALES: 800-345-7015 or 408-284-8200 fax: 408-284-2775 www.idt.com 7 for Tech Support: [email protected]