Datasheet

AON2812
30V Dual N-Channel AlphaMOS
General Description
Product Summary
VDS
• Trench Power AlphaMOS (αMOS LV) technology
• Low RDS(ON)
• Low Gate Charge
• ESD protection
• RoHS and Halogen-Free Compliant
30V
4.5A
ID (at VGS=10V)
RDS(ON) (at VGS=10V)
< 37mΩ
RDS(ON) (at VGS=4.5V)
< 45mΩ
RDS(ON) (at VGS=2.5V)
< 70mΩ
Typical ESD protection
HBM Class 3A
Applications
• Battery protection switch
• Mobile device battery charging and discharging
• Load switch
D2
D1
DFN 2x2
Top View
Bottom View
D1
G2
S2
D1
D2
Pin 1
G2
G1
S1
D2
G1
S1
S2
Pin 1
Orderable Part Number
Package Type
Form
Minimum Order Quantity
AON2812
DFN 2x2
Tape & Reel
3000
Absolute Maximum Ratings TA=25°C unless otherwise noted
Parameter
Drain-Source Voltage
Symbol
VDS
Gate-Source Voltage
Continuous Drain
Current G
VGS
TA=25°C
Pulsed Drain Current C
Junction and Storage Temperature Range
Thermal Characteristics
Parameter
Maximum Junction-to-Ambient A
Maximum Junction-to-Ambient A D
Rev.1.0: February 2014
Steady-State
A
2.5
W
1.6
TJ, TSTG
Symbol
t ≤ 10s
V
18
PD
TA=70°C
±12
3.5
IDM
TA=25°C
Power Dissipation B
Units
V
4.5
ID
TA=70°C
Maximum
30
RθJA
-55 to 150
Typ
40
65
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°C
Max
50
80
Units
°C/W
°C/W
Page 1 of 5
Electrical Characteristics (TJ=25°C unless otherwise noted)
Symbol
Parameter
STATIC PARAMETERS
BVDSS
Drain-Source Breakdown Voltage
Conditions
Min
ID=250µA, VGS=0V
Zero Gate Voltage Drain Current
IGSS
VGS(th)
Gate-Body leakage current
VDS=0V, VGS=±10V
Gate Threshold Voltage
VDS=VGS, ID=250µA
V
TJ=55°C
0.6
TJ=125°C
±10
µA
1
1.4
V
30
37
41
50
VGS=4.5V, ID=1A
35
45
VGS=2.5V, ID=1A
50
70
Forward Transconductance
VDS=5V, ID=2A
10
VSD
Diode Forward Voltage
IS=1A,VGS=0V
0.75
IS
Maximum Body-Diode Continuous Current
DYNAMIC PARAMETERS
Input Capacitance
Ciss
Output Capacitance
Crss
Reverse Transfer Capacitance
Rg
Gate resistance
µA
5
gFS
Coss
Units
1
VGS=10V, ID=2A
Static Drain-Source On-Resistance
Max
30
VDS=30V, VGS=0V
IDSS
RDS(ON)
Typ
VGS=0V, VDS=15V, f=1MHz
mΩ
S
1
V
3
A
235
pF
75
pF
15
Ω
12
SWITCHING PARAMETERS
Qg(10V)
Total Gate Charge
4.5
10
nC
Qg(4.5V)
Total Gate Charge
2.2
6
nC
Qgs
Gate Source Charge
Qgd
Gate Drain Charge
tD(on)
Turn-On DelayTime
tr
Turn-On Rise Time
tD(off)
Turn-Off DelayTime
tf
trr
Turn-Off Fall Time
Qrr
VGS=10V, VDS=15V, ID=2A
VGS=10V, VDS=15V, RL=7.5Ω,
RGEN=3Ω
4
pF
8
f=1MHz
0.3
nC
0.7
nC
3
ns
3
ns
24
ns
6
ns
IF=2A, dI/dt=100A/µs
7.2
Body Diode Reverse Recovery Charge IF=2A, dI/dt=100A/µs
1.3
ns
nC
Body Diode Reverse Recovery Time
A. The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The
value in any given application depends on the user's specific board design.
B. The power dissipation PD is based on TJ(MAX)=150°C, using ≤ 10s junction-to-ambient thermal resistance.
C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C. Ratings are based on low frequency and duty cycles to keep
initialTJ=25°C.
D. The RθJA is the sum of the thermal impedance from junction to lead RθJL and lead to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-ambient thermal impedance which is measured with the device mounted on 1in2 FR-4 board with
2oz. Copper, assuming a maximum junction temperature of TJ(MAX)=150°C. The SOA curve provides a single pulse rating.
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Rev.1.0: February 2014
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Page 2 of 5
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
20
20
10V
VDS=5V
3V
16
16
2.5V
4.5V
12
ID(A)
ID (A)
12
2V
8
125°C
8
4
4
25°C
VGS=1.5V
0
0
0
1
2
3
4
0
5
1
2
4
VGS(Volts)
Figure 2: Transfer Characteristics (Note E)
VDS (Volts)
Figure 1: On-Region Characteristics (Note E)
80
1.6
Normalized On-Resistance
70
VGS=2.5V
60
RDS(ON) (mΩ
Ω)
3
50
VGS=4.5V
40
30
VGS=10V
20
VGS=4.5V
ID=1A
1.4
VGS=10V
ID=2A
1.2
VGS=2.5V
ID=1A
1
10
0.8
0
0
2
4
6
0
8
25
50
75
100
125
150
175
Temperature (°C)
Figure 4: On-Resistance vs. Junction Temperature
(Note E)
ID (A)
Figure 3: On-Resistance vs. Drain Current and Gate
Voltage (Note E)
80
1.0E+01
ID=2A
1.0E+00
125°C
1.0E-01
125°C
IS (A)
RDS(ON) (mΩ
Ω)
60
40
1.0E-02
25°C
1.0E-03
25°C
20
1.0E-04
0
1.0E-05
0
2
4
6
8
10
VGS (Volts)
Figure 5: On-Resistance vs. Gate-Source Voltage
(Note E)
Rev.1.0: February 2014
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0.0
0.2
0.4
0.6
0.8
1.0
1.2
VSD (Volts)
Figure 6: Body-Diode Characteristics (Note E)
Page 3 of 5
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
10
350
VDS=15V
ID=2A
300
Capacitance (pF)
VGS (Volts)
8
6
4
Ciss
250
200
150
Coss
100
2
Crss
50
0
0
0
1
2
3
4
5
0
5
Qg (nC)
Figure 7: Gate-Charge Characteristics
15
20
25
30
VDS (Volts)
Figure 8: Capacitance Characteristics
200
100.0
10.0
RDS(ON)
limited
TJ(Max)=150°C
TA=25°C
10µs
150
100µs
1.0
1ms
10ms
0.1
100
50
TJ(Max)=150°C
TA=25°C
0.0
0.01
Power (W)
10µs
ID (Amps)
10
DC
0.1
1
10
VDS (Volts)
VGS> or equal to 2.5V
Figure 9: Maximum Forward Biased Safe
Operating Area (Note F)
100
0
1E-05
0.001
0.1
10
1000
Pulse Width (s)
Figure 10: Single Pulse Power Rating Junction-toAmbient (Note F)
Zθ JA Normalized Transient
Thermal Resistance
10
D=Ton/T
TJ,PK=TA+PDM.ZθJA.RθJA
1
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
RθJA=80°C/W
0.1
PD
0.01
Single Pulse
Ton
T
0.001
1E-05
0.0001
0.001
0.01
0.1
1
10
100
Pulse Width (s)
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)
Rev.1.0: February 2014
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Page 4 of 5
Gate Charge Test Circuit & Waveform
Vgs
Qg
10V
+
+ Vds
VDC
-
Qgs
Qgd
VDC
-
DUT
Vgs
Ig
Charge
Resistive Switching Test Circuit & Waveforms
RL
Vds
Vds
DUT
Vgs
90%
+ Vdd
VDC
-
Rg
10%
Vgs
Vgs
td(on)
tr
td(off)
ton
tf
toff
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
L
2
EAR= 1/2 LIAR
Vds
BVDSS
Vds
Id
+ Vdd
Vgs
Vgs
I AR
VDC
-
Rg
Id
DUT
Vgs
Vgs
Diode Recovery Test Circuit & Waveforms
Q rr = - Idt
Vds +
DUT
Vgs
Vds Isd
Vgs
Ig
Rev.1.0: February 2014
L
Isd
+ Vdd
t rr
dI/dt
I RM
Vdd
VDC
-
IF
Vds
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Page 5 of 5