APW7307 24V 3A 500kHz Synchronous Buck Converter Features General Description • Wide Input Voltage from 4.5V to 24V • 3A Continuous Output Current • Adjustable Output Voltage from 0.807V to 13V • Integrated Low RDS(ON) MOSFETs • Fixed 500kHz Switching Frequency • Stable with Low ESR Ceramic Output Capacitors • Power-On-Reset Detection • Over-Temperature Protection • Current-Limit Protection with HICCUP Mode • Small TSOT-23-8A Package • Lead Free and Green Devices Available APW7307 is a 3A synchronous buck converter with integrated low R DS(ON) power MOSFETs. The APW7307 design with a current-mode control scheme, can convert wide input voltage of 4.5V to 24V to the output voltage adjustable from 0.807V to 13V to provide excellent output voltage regulation. The APW7307 is equipped advance asynchronous modulation mode operation. Increase efficiency at light load. The APW7307 is also equipped with Power-on-reset, soft start, and whole protections (under-voltage, over-temperature, and current-limit) into a single package. This device, available TSOT-23-8A, provides a very compact system solution external components and PCB area. (RoHS Compliant) Applications Pin Configuration • Notebook Systems and I/O Power • Digital Set-Top Boxes • Flat-Panel Television and Monitors • Distributed Power Systems POK 1 VIN 2 SW 3 GND 4 8 7 6 5 FB VCC EN BST APW 7307 TSOT -23- 8A Simplified Application Circuit VIN VIN BST CIN VCC L1 APW7307 V OUT SW POK FB ON OFF COUT GND EN ANP EC res erves the right to ma ke cha nges to imp rove relia bility or m anufac turab ility witho ut no tice, and advise customers to obtain the latest version of relevant information to verify before placing orders. C opyright ANPEC Electronics C orp. Rev. A.5 - Oct., 2015 1 www.anpec.com.tw APW7307 Ordering and Marking Information APW7307 Assembly Material Package Code AZ : TSOT-23-8A Operating Junction Temperature I: -40 to 85o C Handling Code TR : Tape & Reel Handling Code Temperature Range Assembly Material G : Halogen and Lead Free Device Package Code APW7307 AZI : W07X X - Date Code Note: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; w hich are fully compliant w ith RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020D for MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-fr ee (RoHS compliant) and halogen free (Br or Cl does not exceed 900ppm by w eight in homogeneous material and total of Br and Cl does not exceed 1500ppm by w eight). Absolute Maximum Ratings (Note Symbol VIN, VEN 1) Parameter VIN Supply to GND Voltage and EN to GND Voltage Rating Unit -0.3 ~ 27 V VSW SW to GND Voltage -0.3 ~ 27 V VBST-SW BST to SW Voltage -0.3 ~ 6 V POK, EN, VCC and FB to GND Voltage -0.3 ~ 6 TJ Junction Temperature V o 150 T STG Storage Temperature T SDR Maximum Lead Soldering Temperature(10 Seconds) o -65 ~ 150 o 260 C C C Note1: Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability Thermal Characteristics Symbol θJA Parameter Junction-to-Ambient Resistance in Free Air Typical Value (Note 2) Unit o 100 C/W Note 2: θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. Recommended Operating Conditions (Note Symbol Parameter 3) Range Unit 4.5 ~ 24 V 0 ~ 24 V Converter Output Voltage 0.807~13 V Converter Output Current 0~3 A V IN VIN Supply Voltage VEN EN Input Voltage VOUT IOUT C opyright ANPEC Electronics C orp. Rev. A.5 - Oct., 2015 2 www.anpec.com.tw APW7307 Recommended Operating Conditions (Cont.) (Note Symbol Range Unit Converter Output Capacitance 22 ~ 47 µF L1 Inductance 1.5 ~ 10 µH TA Ambient Temperature -40 ~ 85 COUT TJ Parameter 3) Junction Temperature o o -40 ~ 125 C C Note 3 : Refer to the typical application circuit. Electrical Characteristics Unless otherwise specified, these specifications apply over V IN=12V, V EN=3V and TA= -40 to 85 oC. Typical values are at TA=25oC. Parameter Symbol Test Conditions APW7307 Min Typ Max Unit SUPPLY CURRENT IVIN IVIN_SD VIN Supply Current VFB =0.9V, SW=NC - 1 1.2 mA VIN Shutdown Supply Current VEN =0V - - 10 µA 3.7 3.9 4.1 V - 0.6 - V - 0.807 - V -1 - +1 % POWER-ON-RESET (POR) VIN POR Voltage Threshold VIN Rising VIN POR Hysteresis REFERENCE VOLTAGE VREF Reference Voltage Output Voltage Accuracy TJ =25°C, IOUT =10mA IFB FB input current - 10 50 nA V VCC VCC Regulator - 5 - V - 3 - % 570 kHz VCC Load Regulation IVCC=3mA OSCI LLATOR AND DUTY CYCLE FSW Switching Frequency 430 500 DAMX Maximum Duty Cycle - 93 - % Minimum on-time - - 100 ns - 100 - mΩ POWER MOSFET High Side MOSFET Resistance - 40 - mΩ High Side Switch Leakage Current VEN =0V, V IN=24V, VSW =0V - - 1 µA Low Side Switch Leakage Current VEN =0V, V IN=24V, VSW =24V - - 1 µA 4 5 6 A Under-Voltage Protection (UVP) 40 50 60 %VREF FB Over Voltage Protection Low Side MOSFET Resistance PROTECTIONS ILIM T OTR High Side MOSFET Current-Limit 120 125 130 %VREF FB OVP Hysteresis - 20 - %VREF Hiccup Delay time - 1 - T SS OTP Rising Threshold (Note 4) - 150 - o OTP Hysteresis (Note 4) - 30 - o C opyright ANPEC Electronics C orp. Rev. A.5 - Oct., 2015 3 C C www.anpec.com.tw APW7307 Electrical Characteristics (cont.) Unless otherwise specified, these specifications apply over V IN=12V, V EN=3V and TA= -40 to 85 oC. Typical values are at TA=25oC. Parameter Symbol Test Conditions APW7307 Unit Min Typ Max - 1.5 - ms 1.2 1.4 1.6 V - 0.2 - V - 8 - µs - 2 - µA 90 - % - 85 - % 120 125 130 % SOFT-START, ENABLE T SS Soft Start Time EN Rising Threshold Voltage EN Falling Threshold Hysteresis EN turn off delay EN Input Current VEN =2V POWER-OK INDICATOR POK in from Lower (POK Goes High) V POK POK Threshold POK out from normal falling (POK Goes Low) POK out from normal rising (POK Goes Low) IPOK - POK Leakage Current V POK=5V - 0.1 1 µA POK Sink Current V POK=0.5V - 5 - mA POK Enable Delay Time from 90% VOUT to POK High - 250 - µs Note4: Guaranteed by design. Pin Description PIN FUNCTION NO. NAME 1 POK 2 VIN 3 SW 4 GND Signal and power ground. 5 BST High-Side Gate Drive Boost Input. BS supplies the voltage to drive the high-side N-channel MOSFET. At least 10nF capacitor should be connected from SW to BST to supply the high side switch. 6 EN Enable Input. EN is a digital input that turns the regulator on or off. EN threshold is 1.4V with 0.2V hysteresis. 7 VCC 8 FB Power Good Output. POK is an open drain output used to indicate the status of the output voltage. Connect the POK in to VCC through a pull-high resistor. Power Input. VIN supplies the power to the control circuitry, gate driver. Connecting a ceramic bypass capacitor and a suitably large capacitor between VIN and GND eliminates switching noise and voltage ripple on the input to the IC. Power Switching Output. SW is the Source of the N-Channel power MOSFET to supply power to the output LC filter. Bias Supply. Decouple with a 0.1µF capacitor or higher is recommended. Output feedback Input. The IC senses the feedback voltage via FB and regulates FB voltage at 0.807V. Connecting FB with a resistor-divider from the converter’s output to set the output voltage. C opyright ANPEC Electronics C orp. Rev. A.5 - Oct., 2015 4 www.anpec.com.tw APW7307 Typical Operating Characteristics Reference Voltage vs. Junction Temperature 0.817 Shutdown Current vs. Input Voltage 12 Shutdown Current (uA) Reference Voltage (V) 10 0.812 0.807 0.802 8 6 4 2 0.797 -40 0 -20 0 20 40 60 80 100 120 140 4 Junction Temperature (oC) 16 20 24 Load Regulation 0.5 Output Voltage Variation (%) Supply Current (mA) 12 Input Voltage(V) Supply Current vs. Input Voltage 0.9 8 0.8 0.7 0 -0.5 -1 -1.5 0.6 4 8 12 16 20 0 24 0.4 0.8 1.2 1.6 2 Output Current (A) Input Voltage(V) Line Regulation Output Voltage Variation (%) 0.3 0.2 0.1 0 -0.1 4 8 12 16 20 24 Input Voltage(V) C opyright ANPEC Electronics C orp. Rev. A.5 - Oct., 2015 5 www.anpec.com.tw APW7307 Typical Operating Characteristics 100 95 95 90 90 Efficiency (%) Efficiency (%) 100 Efficiency vs. Load Current FSW=500kHz , VOUT =5V Efficiency vs. Load Current FSW=500kHz , VI N=12V 85 80 75 70 80 75 70 VOUT=5V VOUT=3.3V 65 85 VIN=12V VIN=6.5V VIN=19V 65 VOUT=1.2V 60 0.01 60 0.1 1 10 0.01 C opyright ANPEC Electronics C orp. Rev. A.5 - Oct., 2015 0.1 1 10 Output Current (A) Output Current (A) 6 www.anpec.com.tw APW7307 Operating Waveforms Refer to the typical application circuit. The test condition is V IN=12V, TA= 25oC unless otherwise specified. Power On Power Off VIN 1 2 VIN 1 V OUT VOUT 2 VSW V SW 3 3 CH1: VIN, 5V/Div CH2: V OUT , 2V/Div CH3: VSW, 10V/Div TIME: 2ms/Div CH1: V IN, 5V/Div CH2: V OUT , 2V/Div CH3: VSW, 10V/Div TIME: 2ms/Div Shutdown Enable V EN 1 2 3 V EN 1 V OUT 2 VSW VS W 3 CH1: V EN , 2V/Div CH2: VOUT, 2V/Div CH3: V SW, 10V/Div TIME: 50us/Div CH1: VEN, 2V/Div CH2: VOUT , 2V/Div CH3: VSW, 10V/Div TIME: 2ms/Div C opyright ANPEC Electronics C orp. Rev. A.5 - Oct., 2015 V OUT 7 www.anpec.com.tw APW7307 Operating Waveforms Refer to the typical application circuit. The test condition is V IN=12V, TA= 25oC unless otherwise specified. Short-Current Recovery Short-Current Entry VOUT VOUT 1 1 V SW VSW 2 2 IL IL 3 3 CH1: VOUT , 2V/Div CH2: VSW,10V/Div CH3: IL,2A/Div TIME: 2ms/Div CH1: VOUT, 2V/Div CH2: VSW,10V/Div CH3: IL,2A/Div TIME: 2ms/Div Load Transient Vout Ripple VOUT VOUT 1 1 VS W VS W 2 2 I OUT IL 3 3 CH1: VOUT, 50mV/Div,AC CH2: VSWX ,10V/Div CH3: IL,2A/Div TIME: 2us/Div C opyright ANPEC Electronics C orp. Rev. A.5 - Oct., 2015 8 CH1: VOUT , 100mV/DIV,AC CH2: VSW ,10V/Div CH3: IOUT,1A/Div TIME: 50us/Div www.anpec.com.tw APW7307 Block Diagram VIN POR RSEN VCC VCC Regulator Current Limit Comparator Slope Compensation BST ∑ SW Oscillator EN Logic Control VCC FB GND Soft-Start VREF POK C opyright ANPEC Electronics C orp. Rev. A.5 - Oct., 2015 9 www.anpec.com.tw APW7307 Typical Application Circuit Dual Power Input : VIN Pre-existing & VOUT setting less than VIN POR VIN 12V VIN BST R4 20 C IN 22µF C4 0.1µF L1 VCC R7 100k C6 0.1µF APW7307 VOUT 3.3V/3A SW 4.7 µH POK R1 40.2k COUT 22µFx2 FB R2 12.7k R3 33k ON GND OFF EN Single Power Input : VIN divided to EN & VOUT setting more than VIN POR VIN 12V VIN BST C IN 22µF R6 68k C4 0.1µF V CC R5 100 k C6 0. 1µF R4 20 SW APW 7307 V OUT 5V/ 3A L1 4.7µH R1 40.2k POK FB R3 20k R7 15k C OUT 22µFx2 R2 7.74k GND EN Table 1. Componments Selection for Different Output Voltage V OUT (V) R1 (kΩ ) R2 (k Ω) R3 (k Ω ) R 4 (Ω ) L ( µH) C O U T (µF ) 1.05 20.5 68.1 100 20~60 1.5 44 1.2 20.5 42.1 75 20~60 1.8 44 3.3 40.2 13 33 20~60 4.7 44 5 40.2 7.74 20 20~60 4.7 44 C opyright ANPEC Electronics C orp. Rev. A.5 - Oct., 2015 10 www.anpec.com.tw APW7307 Function Description Main Control Loop Over-Current-Protection and Hiccup The APW7307 is a constant frequency, synchronous rectifier and current-mode swi tchi ng regul ator. In normal operation, the internal upper power MOSFET is turned on each cycle. The peak inductor current at which ICMP turn off the upper MOSFET is controlled by the voltage on the COMP node, which is the output of the error amplifier (EAMP). An external resistive divider connected between VOUT and ground allows the EAMP to receive an output fee dback vol tage VFB at FB pin. Whe n th e lo ad curre nt increases, it causes a slightly decrease in VFB relative to the 0.80 7V re feren ce, w hich in tu rn ca uses the C OMP vo lta ge to i ncrease un til the avera ge i ndu cto r cu rre nt matches the new load current. TheAPW7307 has a cycle-by-cycle over-current limit when the i nductor current pe ak value exceeds the set cu rrent limit threshold. Meanwhile, the output voltage drops until FB is below the Under-Volta ge (UV) threshold below the reference. Once UV is triggered, the APW7307 enters hiccup mode to periodically restart the part. This protection mode is especially useful when the output is dead-shorted to ground. The average short circuit current is greatly redu ce d to all evi ate the rma l iss ue s and to protect the regulator. The APW7307 exits the hiccup mode once the over-current condition is removed. Over-Temperature Protection (OTP) Enable/Shutdown The over-temperature circuit limits the junction temperature of the APW7307. When the junction temperature exceeds 150oC, a thermal sensor tu rns off the both power MOSFETs, allowing the devices to cool. The thermal sensor allows the converters to start a soft-start process and regulate the output voltage a gain after the jun ction temperature cools by 30oC. The OTP is designed with a 30oC hys teresi s to l ower the average Junction Te mperature (TJ ) during continuous th ermal overload co nditions , increasing the lifetime of the device. Driving EN to the ground places the APW7307 in shutdown mode. When in shutdown, the internal power MOSFETs turn off, all internal circuitry shuts down and the quiescent supply current reduces to 1µA typical. Under Voltage Lockout (UVLO) An under-voltage lockout function prevents the device from operating if the input voltage on VIN is lower than approximately 3.9V. Th e devi ce automatically e nters the sh utdow n mode if th e vol tage o n VIN drops below appro ximately 3.9V. This under-voltage lockout function is impleme nte d i n ord er to pre ven t the ma lfu nction in g o f the converter. Over-Voltage Protection (OVP) The over-voltage function monitors the output voltage by FB pin. Once the FB voltage exceeds 125% of the referen ce vol tage , the ove r-volta ge pro tectio n co mpa rator forces the low-side MOSFET on. This action actively pulls do wn the output vol tage to preven t the e nd device be damage. As soon as the output voltage is below 105% of the re ference vo ltage, the low-side MOSFET off and the OVP comp arato r is disen gaged . The chip restores its normal operation. Soft-Start The APW7307 has a built-in soft-start to control the output voltage rise during start-up. During soft-start, an internal ramp voltage, connected to the one of the positive inputs of the error ampli fier, raise s up to rep lace the reference vol tage (0.807 V typ ical) until the ramp voltag e reaches the reference voltage. Then, the voltage on FB regulated at reference voltage. C opyright ANPEC Electronics C orp. Rev. A.5 - Oct., 2015 11 www.anpec.com.tw APW7307 Function Description Frequency Foldback The foldback freq uency i s controlled b y the FB voltage. When the o utput i s short If VOUT setting les s than VIN POR,suggest using Dual Power Input of Typical Application Circuit. If VOUT setting more than VIN POR, suggest using Single Power Input of Typical Application Circuit. to the grou nd, the freque ncy of the osci llator will be reduced to 0.25 x FSW . This low er frequency allow s the inductor cu rrent to s afely disch arge, there by p reventing current runaway. The oscillator’s frequencywill gradually increase to its designed rate when the feedback voltgae on FB again app roaches 0.807V. Power OK Indicator The APW7307 features an open-drain POK pin to indicate output regulation status. In normal operation, when the output voltage rises 90% of its target value, the POK goes high. When the output voltage return 85% or 125% of the target voltage, POK signal will be pulled low immediately. C opyright ANPEC Electronics C orp. Rev. A.5 - Oct., 2015 12 www.anpec.com.tw APW7307 Application Information Input Capacitor Selection Output Voltage Setting Because buck converters have a pulsating input current, a low ESR input capacitor is required. This results in the best input voltage filtering, mi nimizin g the i nterference with other circuits caused by high input voltage spikes. Also, the input capacitor must be sufficiently large to stabilize the inpu t voltage during heavy load transients. For good input voltage filtering, usually a 22µF input capacitor is sufficient. It can be increased without any limit for better inp ut-vo ltage filtering . Ceramic capacitors sho w better performance because of the low ESR value, and they are less sensitive against voltage transients and spikes compared to tantalum capacitors. Place the input capacitor as close as possible to the inp ut and GND pin of the device for better performance. In th e adjustable version, th e output voltage is set by a res isti ve d ivid er. The exte rnal res isti ve d ivid er i s co nnected to the output, allowing remote voltage sensing as shown in “Typ ical App lication Circuits”. The output voltage can be calculated as below: Inductor Selection For high efficiencies, the inductor should have a low DC resistance to minimize conduction losses. Especially at high-switching frequencies, the core material has a higher impact on efficiency. When using small chip inductors, the efficiency is reduced mainly due to higher inductor core losses. This needs to be considered when selecting the appropriate inductor. The inductor value determines the inductor ripple current. The larger the inductor value, the smaller the inductor ripple current and the lower the conduction losses of the converter. Conversely, larger inductor values cause a slower load transient response. A reasonable starting point for setting ripple current, ∆IL, is 40% of maximum output current. The recommended inductor value can be calculated as below: The current-mode control scheme of the APW7307 allows the use of tiny ceramic capacitors. The higher capacitor value provides the good load transients response. Ceramic capacitors with low ESR values have the lowest output voltage ripple and are recommended. If required, tantalum capacitors may be used as well. The output ripple is the sum of the voltages across the ESR and the ideal output capacitor. R1 R1 VOUT = VREF ⋅ 1+ = 0.807 ⋅ 1+ R2 R2 If VOUT setting les s than VIN POR ,suggest using Dual Power Input of Typical Application Circuit. If VOUT setting more than VIN POR, suggest using Single Power Input of Typical Application Circuit. Output Capacitor Selection ∆VOUT V VOUT ⋅ 1 − OUT V IN ≅ FSW ⋅ L 1 ⋅ ESR + 8 ⋅ F ⋅ C SW OUT When choosing the input and output ceramic capacitors, cho ose th e X5R or X7 R diel ectric form ulatio ns. Th ese dielectrics have the best temperature and voltag e characteristics of all the ceramics for a given value and size. V VOUT 1 − OUT V IN L≥ FSW ⋅ ∆IL IL (MAX ) = IOUT( MAX ) + 1 ∆IL 2 To avoid saturation of the inductor, the inductor should be rated at least for the maximum output current of the converter plus the inductor ripple current. C opyright ANPEC Electronics C orp. Rev. A.5 - Oct., 2015 13 www.anpec.com.tw APW7307 Application Information OutPut Capacitor Selection When choosing the input and output ceramic capacitors, cho ose th e X5R or X7 R diel ectric form ulatio ns. Th ese dielectrics have the best temperature and voltag e characteristics of all the ceramics for a given value and size. VIN IIN I Q1 IL CIN IOUT V OUT Q1 SW ESR Q2 2. To minimize copper trace connections that can inject noise into the system, the inductor should be placed as close as possible to the SW pin to minimize the noise coupling into other circuits. 3. The output cap acitor should be place clos ed to converter VOUT and GND. 4. Sin ce the fee dback pin and network is a high impedance circuit the feedback network should be routed away fro m the ind uctor. The feed back pin and feedb ack n etwork should be shielded with a ground plane or trace to minimize noise coupling into this circuit. 5. A star grou nd conne ction or ground pl ane mini mizes ground shifts and noise is recommended. COUT Recommended Minimum Footprint 0.102 IL 0.026 ILIM I PEAK IL I OUT 0.017 IQ1 0.057 TSOT-23-8A Layout Consideration For all switching power supplies, the layout is an important step in the design; especially at high peak currents and switching frequencies. If the layout is not carefully done, the regulator might show noise problems and duty cycle jitter. 1. The input capacitor should be placed close to the VIN and GND. Connecting the capacitor and VIN/GND with short and wide trace without any via holes for good input voltage filtering. The distance between VIN/GND to capacitor less than 2mm respectively is recommended. C opyright ANPEC Electronics C orp. Rev. A.5 - Oct., 2015 14 www.anpec.com.tw To avoid rated at verter p APW7307 Package Information TSOT-23-8A D e E E1 SEE VIEW A c b 0.25 A A2 e1 c Ξ aaa A1 NX L GAUGE PLANE SEATING PLANE VIEW A S Y M B O L TSOT-23-8A MILLIMETERS INCHES MIN. MAX. MIN. MAX. A 0.70 1.00 0.028 0.039 A1 0.01 0.10 0.000 0.004 0.035 A2 0.70 0.90 0.028 b 0.22 0.40 0.009 0.016 c 0.08 0.20 0.003 0.008 0.122 0.118 D 2.70 310 0.106 E 2.60 3.00 0.102 E1 1.40 1.80 0.055 0.071 e 0.65 BSC 0.026 BSC e1 1.95 BSC 0.077 BSC L 0 0.30 0 0.60 o aaa C opyright ANPEC Electronics C orp. Rev. A.5 - Oct., 2015 8 o 0.10 0.012 0.024 0o 8o 0.004 15 www.anpec.com.tw APW7307 Carrier Tape & Reel Dimensions P0 P2 P1 A B0 W F E1 OD0 K0 A0 A OD1 B B T SECTION A-A SECTION B-B H A d T1 Application TSOT-23-8A A H T1 C d D W E1 F 178.0±2.00 50 MIN. 8.4+2.00 -0.00 13.0+0.50 -0.20 1.5 MIN. 20.2 MIN. 8.0±0.30 1.75±0.10 3.5±0.05 P0 P1 P2 D0 D1 T A0 B0 K0 2.0±0.05 1.5+0.10 -0.00 1.0 MIN. 0.6+0.00 -0.40 3.20±0.20 3.10± 0.20 1.20 ±0.20 4.0±0.10 4.0± 0.10 (mm) Devices Per Unit Package Type Unit Quantity TSOT-23-8A Tape & Reel 3000 C opyright ANPEC Electronics C orp. Rev. A.5 - Oct., 2015 16 www.anpec.com.tw APW7307 Taping Direction Information TSOT-23-8A USER DIRECTION OF FEED AAAX AAAX AAAX AAAX AAAX AAAX AAAX Classification Profile C opyright ANPEC Electronics C orp. Rev. A.5 - Oct., 2015 17 www.anpec.com.tw APW7307 Classification Reflow Profiles Profile Feature Sn-Pb Eutectic Assembly Pb-Free Assembly 100 °C 150 °C 60-120 seconds 150 °C 200 °C 60-120 seconds 3 °C/second max. 3°C/second max. 183 °C 60-150 seconds 217 °C 60-150 seconds See Classification Temp in table 1 See Classification Temp in table 2 20** seconds 30** seconds 6 °C/second max. 6 °C/second max. 6 minutes max. 8 minutes max. Preheat & Soak Temperature min (Tsmin ) Temperature max (Tsmax) Time (Tsmin to Tsmax) (ts) Average ramp-up rate (Tsmax to TP) Liquidous temperature (T L) Time at liquidous (tL) Peak package body Temperature (Tp )* Time (t P)** within 5 °C of the specified classification temperature (Tc) Average ramp-down rate (T p to Tsmax) Time 25°C to peak temperature * Tolerance for peak profile Temperature (Tp) is defined as a supplier minimum and a user maximum. ** Tolerance for time at peak profile temperature (tp ) is defined as a supplier minimum and a user maximum. Table 1. SnPb Eutectic Process – Classification Temperatures (Tc) Package Thickness <2.5 mm ≥2.5 mm Volume mm <350 235 °C 220 °C 3 Volume mm ≥350 220 °C 220 °C 3 Table 2. Pb-free Process – Classification Temperatures (Tc) Package Thickness <1.6 mm 1.6 mm – 2.5 mm ≥2.5 mm Volume mm <350 260 °C 260 °C 250 °C 3 Volume mm 350-2000 260 °C 250 °C 245 °C 3 Volume mm >2000 260 °C 245 °C 245 °C 3 Reliability Test Program Test item SOLDERABILITY HOLT PCT TCT HBM MM Latch-Up Method JESD-22, B102 JESD-22, A108 JESD-22, A102 JESD-22, A104 MIL-STD-883-3015.7 JESD-22, A115 JESD 78 C opyright ANPEC Electronics C orp. Rev. A.5 - Oct., 2015 18 Description 5 Sec, 245°C 1000 Hrs, Bias @ Tj=125°C 168 Hrs, 100%RH, 2atm, 121°C 500 Cycles, -65°C~150 °C VHBM≧2KV VMM≧200V 10ms, 1 tr ≧100mA www.anpec.com.tw APW7307 Customer Service Anpec Electronics Corp. Head Office : No.6, Dusing 1st Road, SBIP, Hsin-Chu, Taiwan, R.O.C. Tel : 886-3-5642000 Fax : 886-3-5642050 Taipei Branch : 2F, No. 11, Lane 218, Sec 2 Jhongsing Rd., Sindian City, Taipei County 23146, Taiwan Tel : 886-2-2910-3838 Fax : 886-2-2917-3838 C opyright ANPEC Electronics C orp. Rev. A.5 - Oct., 2015 19 www.anpec.com.tw