IC MS1000SH AppNote En

MS1003SH・MS1004SH
Application Note Ver.2.2
The product and product specifications are subject to change without notice.
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MS1003SH・MS1004SH
Application Note Ver.2.2
Precautions
Thank you for purchasing this product.
To ensure safety, keep the following warnings and cautions in mind at all times when using this IC.
Warning
!
Improper handling may result in death, serious injury, or significant property damage.
Caution
!
Improper handling may result in minor injuries or minor damage to property.
!
!
While we strive to improve quality and reliability at all times, semiconductor products will
malfunction at a certain rate. To prevent or limit the scope of injury, fire, or other societal damage that
may result from product malfunctions, it is your responsibility to take steps to ensure that your designs
incorporate suitable safety factors, including appropriate redundancy, fire prevention, and false
operation prevention measures.
The semiconductor product described in this document is not designed or manufactured for use in
devices or systems in which malfunctions would threaten human life or result in injury. Nor is it
designed or manufactured for use in other devices or systems requiring mission-critical quality and
reliability. Please consult with us before using the product in any of the following special or specific
applications:
Warning
Special applications
Transport equipment (e.g., automobiles and ships), communications equipment for backbone
networks, traffic signal equipment, disaster or crime prevention equipment, medical devices, various
types of safety equipment
Specific applications
Nuclear power control systems, aircraft equipment, aerospace equipment, submarine repeaters,
life-support medical equipment
Please consult with us before using any IC products in equipment expected to run continuously for
extended periods, even if the application in question has no special requirements.
Caution
!
Never repair or modify the product. Doing so may result in serious accidents.
<<Electric shock, destruction, fire, or malfunction may result.>>
!
In the event of problems, an excessive voltage may arise at the output terminal, or the voltage may
drop. Try to anticipate malfunctions and load issues and confirm that the end equipment is adequately
protected (e.g., by overvoltage or overcurrent protection).
!
Check the polarity of the input and output terminals. Make sure they are correctly connected before
turning on power.
<<The protective element may blow, or smoke or fire may result.>>
!
Use the specified input voltage. Provide a protective element in the input line.
<<Smoke or fire may result in event of a problem.>>
In the event of a malfunction or other anomaly, turn power off immediately and contact us.
!
 The contents of this document are subject to change without notice due to product improvements.
 You must provide written agreement concerning the specifications before starting to use the device.
 We have made every effort to confirm that all information provided in this document is correct and reliable. However, we take no
responsibility for losses or damages incurred or infringements of patents or other rights resulting from use of the information.
 This document neither warrants nor authorizes the right to exercise intellectual property rights or any other rights belonging to
Shindengen or third parties.
 No part of this document may be duplicated or reproduced in any form without prior consent from Shindengen.
SHINDENGEN ELECTRIC MFG. CO. , LTD
2/41
MS1003SH・MS1004SH
Application Note Ver.2.2
Contents
…
4
4. Pin functions
…
17
1.1 Introduction
…
4
4.1 Z/C pin
…
17
1.2 Characteristics
…
4
4.2 F/B pin
…
17
1.3 Applications
…
4
4.3 GND pin
…
17
1.4 Appearance and dimensions
…
4
4.4 OCL pin
…
17
1.5 Basic circuit configuration
…
5
4.5 VG pin
…
17
…
6
4.6 Vcc pin
…
17
2.1 Block diagram
…
6
4.7 Vin pin
…
17
2.2 Pin names
…
6
…
18
3. Circuit operation
…
7
5.1 Design flow chart
…
18
…
7
5.2 Example of main transformer
design conditions
…
19
3.1.1 Startup circuit
…
7
5.3 Formulas for main transformer
design
…
19
3.1.2 Soft start
…
8
5.4 Checking the operating points
…
21
3.1.3 Bias assist
…
8
5.4.1 Variables in formulas
…
22
…
9
…
9
5.4.2 Formulas for obtaining
trough skip start power
…
3.2.1 On-trigger circuit
22
3.2.2 Quasi-resonance
…
9
…
10
…
3.2.3 Soft drive
5.4.3 Formulas for obtaining
trough skip end power
22
3.2.4 Trough skip operation
…
10
…
11
…
3.2.5 Output voltage control
5.4.4 Formulas for obtaining
auto burst start/end power
24
3.3 Burst mode oscillation
…
11
…
11
…
3.3.1 AutoStby function
5.4.5 Formulas for obtaining
droop point power
24
3.3.2 Super standby mode
…
13
…
27
3.4 Protection functions
…
14
5.5.1 Design procedure for the
Z/C pin (Pin 1)
…
27
3.4.1 Vcc overvoltage
protection latch
…
14
5.5.2 Design procedure for F/B
pin
…
29
3.4.2 Overcurrent protection
…
14
5.5.3 Design of OCL pin
…
30
3.4.3 Overload protection (timer
latch function)
…
15
5.5.4 Design of VG pin
…
31
3.4.4 VCC-GND short circuit
protection
…
16
5.5.5 Design of Vcc pin
…
32
16
5.5.6 Setting resonating
capacitor
…
34
…
35
6.1 Circuit diagram
…
35
6.2 Calculations for example
circuit design
…
35
1. Overview
2. Block diagram
3.1 Startup
3.2 Oscillation
3.4.5 Leading edge blank (LEB)
3.4.6 On-trigger malfunction
prevention circuit
…
16
3.4.7 TSD
…
16
5. Design procedure
5.5 Pin design
6. Example circuit diagram
SHINDENGEN ELECTRIC MFG. CO. , LTD
3/41
MS1003SH・MS1004SH
Application Note Ver.2.2
1. Overview
1.1 Introduction
We have developed the MS1003SH and MS1004SH to meet the growing demand for power conservation.
These ICs incorporate a super standby mode to optimize power efficiency under micro loads.
The MS1003SH and MS1004SH consume less power in standby mode than conventional ICs. The ICs
incorporate various functions to make it more user-friendly and to make it easier to design a power supply
with fewer external components.
1.2 Characteristics
1) Quasi-resonant design for high efficiency and low noise
2) Four-step soft start function (40 ms/step)
3) Onboard startup circuit requires no startup resistor, dramatically reducing losses in the startup circuit.
4) The automatic trough skip function controls increases in oscillation frequency and improves efficiency
under light loads.
5) Auto burst function improves efficiency under light loads with no additional components.
6) Super standby mode improves efficiency under micro loads.
7) Soft drive circuit reduces noise.
8) Thermal shutdown, overvoltage protection, and overload protection (timer latch)
9) Primary current limit circuit incorporates an input voltage dependence correction circuit to reduce the
number of components required.
10) Bias assist function for startup circuit
11) Vcc-GND short circuit protection function
12) SOP-8 package employed for compact dimensions
1.3 Applications
Televisions, video recorders, refrigerators, washing machines, air conditioners and other appliances in
which reduced standby power consumption is a design goal.
Unit: mm
6.0
3.9
0.3
1.4 Appearance and dimensions
SHINDENGEN ELECTRIC MFG. CO. , LTD
4/41
MS1003SH・MS1004SH
Application Note Ver.2.2
1.5 Basic circuit configuration
(1) Circuit without super standby function
(2) Circuit with super standby function
SHINDENGEN ELECTRIC MFG. CO. , LTD
5/41
MS1003SH・MS1004SH
Application Note Ver.2.2
2. Block diagram
2.1 Block diagram
TIMER_
LATCH_
STBY_
CIR
TSD
Z/C
1
S
R
S
S
S
R
Vcc
F/B
OVP
COMP
5
VG
4
OCL
8
Vin
6
Vcc
3
GND
2
IDP_Limit
COMP
S
R
IDP_burst
COMP
VUL
COMP
R
Stup_UVLO
COMP
Vcc_UVLO
COMP
SPSTBY
UVLO
COMP
2.2 Pin names
Pin number
1
2
3
4
5
6
7
8
Symbol
Z/C
F/B
GND
OCL
VG
Vcc
NC
Vin
Pin name
Zero current detection pin
Feedback signal input pin
Ground pin
Overcurrent limit pin
VG pin
Vcc pin
No connection
Vin pin
SHINDENGEN ELECTRIC MFG. CO. , LTD
6/41
MS1003SH・MS1004SH
Application Note Ver.2.2
3. Circuit operation
3.1 Startup
The diagram below shows the startup sequence.
Vin
Nc coil
backup
Off
On
Off
On
Off
Normal mode
On
Off
Standby mode
Standby
On
Normal mode
Vcc(start)=
Vcc(stup off)=12V
Vcc(stop on normal)=9V
Vcc(stop normal)=8V
Vcc
Vcc(stup on stby)=8V
Vcc(stop stby)=12V
VccUVLO
Startup
UVLO
Startup sequence
3.1.1 Startup circuit
The startup circuit does not require a startup resistor,
making it possible to easily start the IC with a small
number of components. A schematic diagram of the
startup circuit is shown to the right.
Vin pin
Startup circuit
Until the IC starts up, the startup circuit current Icc
(stup) flows from the Vin pin to the Vcc pin to charge
C, as shown in the diagram.
Oscillation begins when the voltage at the Vcc pin
reaches Vcc (start). The startup circuit opens, and the
Vcc pin
startup circuit current stops. The Vcc pin has hysteresis,
which begins oscillating at Vcc (start) and stops
oscillating at Vcc (stop stby) or Vcc (stop normal). A
bias assist function is provided for the Vcc voltage to ensure safe startup. For more information on the bias
assist function, see Section 3.1.3.
SHINDENGEN ELECTRIC MFG. CO. , LTD
7/41
MS1003SH・MS1004SH
Application Note Ver.2.2
3.1.2 Soft start
At startup, the OCL level changes in four stages. Current flowing to the main switch also increases in stages.
The envelope curves of the current to the main switch are shaped in four steps to avoid abrupt switch
startups.
The soft start time depends on the Tss1 to Tss3 settings. The time settings are determined by the IC.
Normal OCL level
Steady-state
operation
3.1.3 Bias assist
Soon after oscillation begins during startup, the voltage drops, and the oscillation may halt. To prevent this
and ensure proper startup, the bias assist function supplies energy to the Vcc pin.
Shown below is a schematic diagram of Vcc startup incorporating the bias assist function.
Assist function
activates.
If the voltage drops below the oscillation
stop voltage, oscillation halts, and the
startup circuit must restart.
The voltage remains above the oscillation
stop voltage to ensure that oscillation
does not halt.
SHINDENGEN ELECTRIC MFG. CO. , LTD
8/41
MS1003SH・MS1004SH
Application Note Ver.2.2
3.2 Oscillation
Approx.
3.2.1 On-trigger circuit
As shown to the right, when a negative edge
of the Z/C pin voltage reaches VZ/C (0.25 V),
the gate signal is output, and the main
switching device is turned on.
Current-critical operations are performed by
detecting energy discharge timing with the
control coil voltage before turning on the
main switching device.
To minimize noise, negative edge detection
detects a trigger while the Z/C pin voltage
falls from Hi to Low. The VZ/C voltage
(0.25V) incorporates 50 mV hysteresis for
improved noise resistance.
約0.25V
0.25 V
VZ/C
ID
Secondary rectification diode current
2次整流ダイオード電流
VDS
コントロール巻線電圧
Control coil voltage
3.2.2 Quasi-resonance
In a circuit having resonating capacitor Cq between the drain
and the source of the main switching device, as shown to the
right, when the secondary diode current reaches 0 A, damping
begins at the resonance frequency based on the primary
inductance LP of the main transformer and the resonating
capacitor.
Adjusting the time constant of the CR connected to the Z/C
pin as shown on the right allows the main switching device to
be turned on at a trough of the damping voltage waveform,
thereby reducing turn-on losses.
LP
8
Cq
Vin pin
Vin端子
1
5
Z/C pin
Z/C端子
R
3
GND pin
GND端子
C
The
time constant
時定数により
determines
on-timing.
ONタイミングを決定
SHINDENGEN ELECTRIC MFG. CO. , LTD
9/41
MS1003SH・MS1004SH
Application Note Ver.2.2
3.2.3 Soft drive
Gate voltage supply
The soft drive circuit supplies a trigger voltage slightly greater than
the gate threshold of the main switch as a gate drive voltage before
constant voltage driving begins. This prevents the supply of greater
gate voltage than necessary.
ドレイン電流にあわせた
matched to drain current
ゲート電圧供給
VGS
The soft drive reduces losses by the gate charge voltage and reduces
noise by controlling the resonating capacitor discharge peak current.
急峻なゲートチャージ
Reducing gate charge
を低減
spikes
IG
Reducing
軽負荷時の
reactive charge
無効電荷削減
under
light loads
Damping of resonating
共振コンデンサ放電電流の
capacitor
discharge current
ダンピング
ID
3.2.4 Trough skip operation
The MS1003SH and MS1004SH monitor the switching cycle. If the switching cycle length becomes shorter
than the trough skip start cycle T (bottom skip start) of 7.5 μs (TYP), the IC enter the following modes:
MS1003SH moves from the normal partial resonance mode to the 1 trough skip mode (switching on
at the second trough).
MS1004SH moves from the normal partial resonance mode to the 2 trough skip mode (switching on
at the third trough).
In trough skip mode, the MS1003SH extends the off-period by a cycle of resonance and the MS1004SH by
two cycles of resonance. This controls an increase in the frequency. Once in trough skip mode, the cycle
monitoring timer setting changes. When the time from switching on to the first voltage trough becomes
longer than T (bottom skip stop) of 13 μs (TYP), the IC returns to normal partial resonance mode. Using
hysteresis in this manner prevents jitter and acoustic noise.
VDS
ID
Operating
動作
mode
Partial
resonance
部分共振
谷飛び
Trough
skip
Partial
resonance
部分共振
モード
OFF range
オフ幅
monitoring
監視
timer
タイマ
T(bottom skip start)
T(bottom skip stop)
T(bottom skip start)
Sequence of MS1003SH
SHINDENGEN ELECTRIC MFG. CO. , LTD
10/41
MS1003SH・MS1004SH
Application Note Ver.2.2
3.2.5 Output voltage control
The MS1003SH and MS1004SH control the output
voltage with the ON range proportional to the voltage at
the F/B pin.
The latch count start voltage (VF/B (latch count))
is set up for the F/B pin. When the voltage exceeds
the set level, the timer begins counting. After
maintaining this state for approximately 2 s (latch
count), the IC is latched.
ON
rangetton
[s]
オン幅
on[µs]
The output voltage is controlled linearly so that the ON
range is at its minimum when the F/B pin voltage is 1.5
V and at its maximum when the voltage is 4.5 V. The
IF/B current flows from the F/B pin. The impedance of
the photocoupler transistor externally connected between
the F/B pin and the GND pin is varied by a control signal
from the secondary output detection circuit, thereby
controlling the ON range of the main switching device to
produce a constant voltage.
Controlling output
voltage with
photocoupler
F/B pin
Output voltage error
detection feedback
signal
ton
(max)
0
1.5
4.5
VF/B(latch count)
Feedback voltage
フィードバック電圧
VF/B[V]
3.3 Burst mode oscillation
3.3.1 AutoStby function
The MS1003SH and MS1004SH switch between normal mode and burst mode automatically. This enables
low standby power consumption with no other components required for standby mode.
1) Switching from normal mode to burst mode
The IC switches from normal mode to burst mode when the load becomes lighter and the OCL pin
detects a drain current at the VOCL (stby) = 45 mV (TYP) or less for longer than Tstby = 250 ms (TYP).
VOCL (stby) =
45 mV or less
Operating
mode
The IC enters standby mode when the
drain current stays at the burst
switching current or below for longer
than Tstby = 250 ms.
Normal
Burst
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11/41
MS1003SH・MS1004SH
Application Note Ver.2.2
2) Burst mode control
In burst mode, the OCL pin detects the drain current, and every pulse is limited to VTH (stby) = 60 mV
(TYP) to control oscillation.
Output voltage is controlled linearly in normal mode. In burst mode, oscillation begins when the F/B pin
voltage VF/B reaches the VF/B (stby start) = 1.8 V (TYP) and stops when the voltage falls to the VF/B
(stby stop) = 0.8 V (TYP). This control causes voltage ripples and intermittent oscillation, reducing
switching loss per unit time and thereby reducing standby power consumption.
The following thresholds also change from normal mode:
 The thresholds for oscillation stop voltage and the startup circuit on voltage are reduced by 1 V
from normal mode.
VCC (stop normal) = 8 V (TYP)  VCC (stop stby) = 7 V (TYP)
VCC (startup on normal) = 9 V (TYP)  VCC (startup on stby) = 8 V (TYP)
These allow easy adjustment of the Vcc setting in standby mode and further reduce power consumption.
3) Switching from burst mode to normal mode
The IC switches automatically to normal mode when the load becomes heavier and the VF/B voltage
rises and exceeds VF/B (stby reset) = 3V (TYP).
The thresholds changed at standby return to previous levels when the IC returns from burst mode to
normal mode. At the same time, soft start activates for approximately 1/70 of the normal startup to
prevent jitter and other problems during mode switching.
Soft start for approx. 1/70 of normal startup
Operating
mode
Burst
Normal
SHINDENGEN ELECTRIC MFG. CO. , LTD
12/41
MS1003SH・MS1004SH
Application Note Ver.2.2
3.3.2 Super standby mode
Super standby mode is an intermittent oscillation mode that minimizes power losses under micro loads. The
function helps reduce input power.
1) Switching from normal mode or auto burst mode to super standby mode
The IC switches from normal mode or auto burst mode to super standby mode by stopping the external
clamp of the Z/C pin voltage using a signal and by applying 3 V or more per cycle.
In super standby mode, the IC promptly lowers the
Vcc voltage to VCC (sp stby start) to shift seamlessly
from direct control to indirect control.
Standby signal ON (Photocoupler lights up):
6
VCC端子
VCC
pin
Z/C
pin 1
Z/C端子
Z/C pin voltage clamp 
Normal mode or auto burst mode
GND pin
GND端子
3
Standby signal OFF (Photocoupler goes out):
Z/C pin voltage clamp released  Super standby mode
Standby signal
スタンバイ信号
(external
signal)
(外部信号)
2) Super standby control
In super standby mode, control shifts from direct control using the F/B pin to indirect control using the
Vcc pin.
Super standby oscillation start VCC voltage: VCC (sp stby start) = 8.7 V (TYP)
Super standby oscillation stop VCC voltage: VCC (sp stby stop) = 9.3 V (TYP)
Control is implemented with a lower voltage than VCC during normal operations. Output voltage is kept
below regulation voltage, thereby bypassing activation of the feedback photocoupler and reducing
power consumption.
3V
Z/C
スーパースタンバイ
Super standby
start
切替
Super
standby
スーパースタンバイ
stop
解除
ID
Super
スーパー
standby
スタンバイ
Normal
ノーマル
Vcc(sp stby stop)=9.3V
Vcc(sp stby start)=8.7V
Super
standby
スーパースタンバイ
Normal
ノーマル
Indirect
control with Vcc
Vcc電圧による間接制御
VCC
Vout
SHINDENGEN ELECTRIC MFG. CO. , LTD
13/41
MS1003SH・MS1004SH
Application Note Ver.2.2
3) Switching from super standby mode to normal mode
The IC exits super standby mode by clamping the Z/C pin voltage at 3 V or less using an external signal.
3.4 Protection functions
3.4.1 Vcc overvoltage protection latch
The MS1003SH and MS1004SH incorporate an overvoltage protection circuit (OVP).
The IC is latched when the control coil voltage exceeds the VOVP to provide indirect overvoltage
protection for the secondary output. The IC is unlatched by momentarily dropping the VCC pin voltage to
the VUL (unlatch voltage) or below.
Vin
Nc
coil
Nc巻線
backup
バックアップ
OFF
なし
ON
あり
ON
あり
OFF
なし
Deliberately increasing
出力検出オープン等
Vcc voltage (e.g., output
わざとVCC電圧上昇
detection open)
VOVP=26V
Vcc(start)=12V
Vcc(stop on stby)
or Vcc(stop on normal)
VUL=3.2V
Vcc
VccUVLO
Startup
起動
UVLO
UVLO
Latched
ラッチ停止
Latch
ラッチ
Unlatched
ラッチ解除
Unlatched
ラッチ解除
VULVUL信号
signal
3.4.2 Overcurrent protection
NP
A current detection resistor is connected between the
OCL pin and the GND pin to detect the source current
of the main switching device. The main switching
device current is limited by pulse-by-pulse operation
using a threshold voltage that varies with ON range.
8
Vin pin
Vin端子
5
Current
電流検出
detection
resistor
抵抗
OCL
pin
OCL端子
4
3
GND pin
GND端子
SHINDENGEN ELECTRIC MFG. CO. , LTD
14/41
MS1003SH・MS1004SH
Application Note Ver.2.2
Output
voltage
出力電圧
VoVo
This current limit protection function incorporates a function to correct dependence on input voltage. The
function changes the OCL threshold on the IC from the VTH (OCL start) of approximately 0.35 V to the
VTH (OCL) clamp of approximately 0.55 V linearly with time. Since the slope (di/dt) of the drain current
of the main switching device is proportional to the input voltage, when the input voltage increases, the
current reaches the OCL threshold with smaller IDP, and the droop is corrected.
VGS
VTH(OCL)clamp
VTH(OCL start)
VOCL level
Vin
Vin
Large
大
Output
current
出力電流
Io Io
TOCL
大
Large
Small
小
小
Small
3.4.3 Overload protection (timer latch function)
If the load exceeds the VTH (OCL) droop
VTH(OCL)垂下電力制限以上に
power
limit, the output voltage falls; after
負荷を取ると、出力電圧が降下し
Tlatch
count = 2 s (TYP) has elapsed, the
IC
is latched.
Tlatch
count=2秒(TYP)経過でラッチ停止
The power limit for protection is activated if power
exceeds the droop power set as the overcurrent
limit VTH (OCL), and the output voltage begins to
fall. The feedback voltage increases beyond the
control limit, and the VF/B voltage increases to the
VF/B (latch count) = 4.6 V or more. The timer
detects this voltage and begins counting.
When the increase in voltage is detected
continuously for Tlatch count = 2 seconds, the IC
is latched to prevent a persisting overload. The
timer is set for 2 seconds to avoid false detection.
Output
voltage
Vo (V)
出力電圧
Vo(V)
The overload timer latch function is a protection
function that latches the IC when the F/B pin
voltage stays at the VF/B (latch count) = 4.6 V or
more for more than Tlatch count = 2 seconds.
0
Latched
ラッチ停止
Output
current
Io (A)
出力電流
Io(A)
The timer is reset if the F/B pin voltage drops below the VF/B (latch count) = 4.6 V or if the VCC voltage
drops below the VUL as the timer counts. After the IC is latched, the bias assist function of the startup
circuit turns off to reduce heat buildup in the IC.
SHINDENGEN ELECTRIC MFG. CO. , LTD
15/41
MS1003SH・MS1004SH
Application Note Ver.2.2
Overload beyond the droop setting
Output current Io
Main SW device
current ID
The bias assist function turns off after the IC is latched.
Control voltage
Vcc
Feedback voltage
VF/B
3.4.4 VCC-GND short circuit protection
If Vcc and GND short-circuit, current flows continuously to the startup circuit, and heat builds up in the IC.
A function reduces Icc in the event of short circuits to prevent excessive heat buildup.
3.4.5 Leading edge blank (LEB)
The MS1003SH and MS1004SH incorporate a leading edge blank function, which rejects trigger signals
from the drain current detection circuit for a certain period of time after the main switching device is turned
on to improve the noise margin.
This function prevents false detection due to a gate drive current generated the moment the main switching
device is turned on or to a current discharged from the resonating capacitor.
The on-trigger is disabled
オントリガ禁止期間
during this period.
3.4.6 On-trigger malfunction prevention circuit
At startup or in the event of a load short circuit, the output
voltage drops to levels significantly below the set voltage.
Since the control coil voltage is proportional to the output
voltage, it drops significantly as well. In this case, a false
on-trigger timing may be detected due to the ringing voltage
while the device is off. The device may switch before the
current critical point.
To address this problem, the MS1003SH and MS1004SH
incorporate a circuit for preventing on-trigger malfunctions at
startup or in the event of short circuits.
Approx.
約0.25V
Tondead
tondead
0.25 V
VZ/C
ID
Secondary
rectification diode current
2次整流ダイオード電流
This function disables the on-trigger during the period Tondead after the main switching device in the IC is
turned off. This prevents false detection due to the ringing voltage while the device is off.
3.4.7 TSD
The MS1003SH and MS1004SH incorporate a thermal shutdown circuit. The IC is latched at 150°C (TYP),
and oscillation is stopped. The IC is unlatched by momentarily dropping the VCC pin voltage to the VUL
(unlatch voltage) or below.
SHINDENGEN ELECTRIC MFG. CO. , LTD
16/41
MS1003SH・MS1004SH
Application Note Ver.2.2
4. Pin functions
4.1 Z/C pin
The Z/C pin detects the NC coil voltage and outputs a turn-on signal. The pin has the following functions:
1) Gate on-trigger
2) Prevention of false turn-on (Tondead)
3) Trough skip
4.2 F/B pin
The F/B pin determines the ON range during constant voltage control. The pin has the following functions:
1) Determination of ON range for the F/B pin voltage (gate off-trigger)
2) Timer latch protection during no control or drooping
4.3 GND pin
The GND pin is used as the ground reference of the IC.
4.4 OCL pin
The OCL pin uses a detection resistor to limit the primary current. The pin has the following functions:
1) Determination of the maximum primary current peak (pulse-by-pulse)
2) Determination of the primary current peak during the four-step soft start
3) Determination of the primary current peak during the AutoStby
4) Leading edge blank function
4.5 VG pin
The VG pin outputs a gate voltage and has the following functions:
1) Output of gate signal
2) Soft drive
4.6 Vcc pin
The Vcc pin is the IC power terminal and has the following functions:
1) UVLO
2) OVP latch
3) Vcc assist
4) ON/OFF of the startup circuit
5) Unlatching
6) Vcc-GND short circuit protection
7) Indirect control in super standby mode
4.7 Vin pin
The Vin pin is connected to the positive side of the input capacitor and is used to power on the IC.
SHINDENGEN ELECTRIC MFG. CO. , LTD
17/41
MS1003SH・MS1004SH
Application Note Ver.2.2
5. Design procedure
The design procedure presented in this section is intended to illustrate an example of electrical design procedure.
Make sure insulation materials, insulation configuration, and structure meet the safety standards set forth by the
relevant authorities. The following table shows the units for the parameters used in the formulas encountered in
this section:
 List of units used in the formulas in this section
Description
Unit
Description
Unit
s (second)
Voltage
V (volt)
Time
Current
A (ampere)
Length
mm (millimeter)
2
Power
W (watt)
Area
mm (square millimeter)
Capacitance
F (farad)
Current density
A/mm2
(ampere per square millimeter)
Inductance
H (henry)
Magnetic flux
density
mT (millitesla)
Resistance
Ω (ohm)
Number of turns
turn
5.1 Design flow chart
Determine
specifications.
Design the main transformer.
Review
Check each
operating point.
Select the primary circuit
components.
[5.2 Example of main transformer design conditions]
 P. 19
[5.3 Formulas for main transformer design]
 P. 19
[5.4 Checking the operating points]
 P. 21
[5.5 Pin design]
 P. 27
Produce a prototype.
Check function.
Completion
SHINDENGEN ELECTRIC MFG. CO. , LTD
18/41
MS1003SH・MS1004SH
Application Note Ver.2.2
5.2 Example of main transformer design conditions
The values below are provided as guideline values only. Make the appropriate adjustments to suit specific
load conditions.
Description
Symbol
Unit
Reference value
VAC
[V]
85–276

-
0.80–0.85
f(min)
[kHz]
35–50
On duty ratio
D
-
0.4–0.6
Capacity of resonating capacitor
Cq
[pF]
100–3300
Control coil voltage
VNC
[V]
15–20
Magnetic flux density variation
B
[mT]
Input voltage range
Efficiency
Minimum oscillation frequency

Coil current density
250–300
2
[A/mm ]
4–6
* If the output capacity of the main switching device Coss is significant relative to the
capacity setting of the resonating capacitor, Cq must be the capacity of the resonating
capacitor plus Coss.
5.3 Formulas for main transformer design
1
Minimum DC input
voltage
VDC (min)  1.2  V AC (min)
[V]
2
Maximum DC input
voltage
VDC (max)  2 VAC (max)
[V]
3
Maximum oscillation cycle
T(max) 
4
Maximum ON period
ton (max)1 
5
Maximum OFF period
t off (max) 
6
Quasi-resonance period
tq    Lp  Cq
[s]
7
Maximum load power
PO (max)  Vo  I O (max)
[W]
8
Maximum output power
(reference value)
PL  1.2  PO (max)
[W]
9
Main SW device peak
current
I DP 
1
[s]
f (min)
D
[s]
f (min)
N S1  VDC (min)  t on (max)1
Np  (VO1  VF 1 )
2  PL
  VDC (min)  D
 tq
[s]
[A]
SHINDENGEN ELECTRIC MFG. CO. , LTD
19/41
MS1003SH・MS1004SH
Application Note Ver.2.2
VDC (min)  t on (max)1
10
Primary coil inductance
Lp 
11
Number of turns in primary
coil
Np 
12
Core gap
lg 
[H]
I DP
VDC (min)  t on (max)1  10 9
[Turn]
B  Ae
4    Ae  Np 2  10 10
Lp
* Ae: Sectional area
of core
[mm]
* The gap Ig must be the center gap value.
* If the Ig is 1 mm or greater, review the transformer core size and oscillation frequency and
consider a redesign.
Np  (VO1  VF 1 )  (
Number of turns in
control output coil
N S1 
14
Number of turns in
non-control output coil
N S 2  N S1 
15
Number of turns in
control coil
Nc  N S1 
13
1
f (min)
 t on (max)1  tq )
[Turn]
VDC (min)  t on (max)1
VO 2  VF 2
VO1  VF 1
[Turn]
VNC  VFNC
VO1  VF 1
[Turn]
* Symbols used in formulas 13 to 15
Control output coil: Output
voltage 1
VO1
Output of control output coil:
Rectification diode forward
voltage
VF1
Non-control
output
Output voltage 2
VO 2
Output of non-control output coil:
Rectification diode forward
voltage
VF 2
V NC
Output of control coil:
Rectification diode forward
voltage
VFNC
coil:
Control coil: Output voltage 1
* If the control coil voltage VNC is not well regulated, set a lower value. To make the most of the
super standby function, set the voltage higher.
16
Primary coil sectional
area
17
Secondary coil sectional
area
ANP 
2  D  Po
  3  VDC (min)  t on (max)1  f (min)
ANS 
2  Io  1  D  (tq  f (min) )
  3  (t off (max)  tq )  f (min)
[mm2]
[mm2]
* We recommend a wire diameter of 0.2 mm or greater for the Nc coil to simplify calculations.
SHINDENGEN ELECTRIC MFG. CO. , LTD
20/41
MS1003SH・MS1004SH
Application Note Ver.2.2
5.4 Checking the operating points
The MS1003SH and MS1004SH have points of change at which the oscillation frequency changes
according to the functions of the control IC.
Identifying each point helps predict the behavior of a prototype power supply. The following chart shows a
model of operating frequency characteristics relative to output power. Knowing each operating point will
provide approximate levels of the power, hysteresis width and droop point at these points of change.
MS1003SH and MS1004SH
operating frequency
characteristic model
Operating
frequency [kHz]
動作周波数
[kHz]
Auto burst start point
Auto burst end point
Trough skip start point
Auto burst
hysteresis
Trough skip end
point
Trough skip
hysteresis
Droop point
Output power [W]
The operating points to be calculated in this section are circled on the chart above.
 Trough skip start and end points
 Auto burst start and end points
 Droop point
Obtain these points to check the following:
Is the standby operation properly performed in standby mode?
Is the trough skip hysteresis sufficient?
Is the droop point sufficiently greater than the output?
SHINDENGEN ELECTRIC MFG. CO. , LTD
21/41
MS1003SH・MS1004SH
Application Note Ver.2.2
5.4.1 Variables in formulas
Description
Symbol
Unit
DC input voltage setting
VDC
[V]
ON range under each condition
ton
[s]
OFF range under each condition
toff
[s]
Main SW device peak current under
each condition
IDP
[A]
Output power under each condition
Po
[W]
Primary current detection resistance
R(ocl)
[Ω]
OCL pin auto burst threshold voltage
Vburst
[V]
OCL pin current detection threshold
voltage
Vth(ocl)
[V]
Operating
cycle
動作周期
オフ幅
OFF
range
オン幅
ON
range
Skipping
谷飛び1回
1 trough
The diagram to the right shows switching waveform models,
including numbers of troughs to skip and tq.
For other symbols, see Section 5.3 and the specification.
tq
Skipping
no trough
谷飛び0回
Skipping no trough
谷飛び0回
Skipping
谷飛び1回
1 trough
Skipping
谷飛び2回
2 troughs
Switching
waveform model
スイッチング波形モデル図
5.4.2 Formulas for obtaining trough skip start power
Np  (T(bottom_sk ip_start)  tq )  (VO1  V F 1 )
18
ON range
ton 
19
OFF range
toff  T(bottom_sk ip_start)  ton
20
Main SW device peak
current
I DP 
Trough skip start power
V DC  ton 2  
Po 
2  Lp  T(bottom_skip_start)
N S 1  V DC  Np  (VO1  V F 1 )
V DC  ton
Lp
[s]
[s]
[A]
2
21
[W]
If the trough skip start power obtained by the formulas above is greater than the trough skip end power
obtained in Section 5.4.3, the hysteresis is insufficient; redesign the transformer.
5.4.3 Formulas for obtaining trough skip end power
The trough skip function ends when either Condition 1 or Condition 2 is met. The trough skip end power
will be the “trough skip end power 1 of the formula 25 of Condition 1” or the “trough skip end power 2 of
the formula 30 or the trough skip end power 3 of the formula 34 of Condition 2,” whichever is smaller.
(Depending on the input voltage you want to calculate, compare either the trough skip end power 2 or 3 of
Condition 2 to trough skip end power 1.)
The chart below shows model curves of trough skip start and end power levels relative to input voltage.
SHINDENGEN ELECTRIC MFG. CO. , LTD
22/41
Trough skip start/end power [W]
MS1003SH・MS1004SH
Application Note Ver.2.2
Calculation line of
trough skip end power
condition 1
Calculation line of trough skip
end power condition 2
Trough skip hysteresis
with input voltage of
VDC (clamp) or above
Calculation line of
trough skip start
power
Trough skip hysteresis
with input voltage of
VDC (clamp) or below
Input voltage VDC [V]
[Condition 1] The operating frequency fulfills T (bottom_skip_stop).
* In place of coefficient A in the formulas, substitute 1 for the MS1003SH and 2 for the MS1004SH.
Np  (T(bottom_sk ip_stop)  tq )  (VO1  V F 1 )
22
ON range
ton 
23
OFF range
toff  T(bottom_sk ip_stop)  2 A  tq  ton
24
Main SW device peak
current
I DP 
Trough skip end power 1
V DC  ton 2  
Po 
2 Lp  (T(bottom_skip_stop)  2 A  tq)
N S 1  V DC  Np  (VO1  V F 1 )
V DC  ton
Lp
[s]
[s]
[A]
2
25
[W]
[Condition 2] The OCL pin voltage reaches the current detection threshold voltage in trough skip mode.
Under this condition, Vth (ocl) varies with input voltage. First, calculate the input voltage V DC (clamp) at
the point of change in Vth (ocl). If VDC does not exceed VDC (clamp), apply the formulas in 1). If VDC
exceeds VDC (clamp), apply the formulas in 2).
The input voltage at the point of change in Vth (ocl) is obtained with the following formula.
26
Input voltage at the point of
change in Vth (ocl)
V DC ( clamp ) 
Lp  Vth(OCL ) clamp
TOCL  R(OCL )
[V]
SHINDENGEN ELECTRIC MFG. CO. , LTD
23/41
MS1003SH・MS1004SH
Application Note Ver.2.2
1) VDC < VDC (clamp)
* In place of the coefficient A in the formulas, substitute 1 for the MS1003SH and 2 for the MS1004SH.
Lp  Vth(OCL ) clamp
27
ON range
ton 
28
OFF range
toff 
29
Main SW device peak
current
I DP 
30
Trough skip end power 2
Po 
[s]
V DC  R( OCL )
VDC  N S1  ton
 (2 A  1)  tq
Np  (VO1  VF 1 )
Vth(OCL ) clamp
[s]
[A]
R(OCL )
V DC  Vth( OCL ) clamp    ton
[W]
2  R( OCL )  (ton  toff )
2) VDC > VDC (clamp)
* In place of the coefficient A in the formulas, substitute 1 for the MS1003SH and 2 for the MS1004SH.
ton 
31
ON range
VDC  R(OCL )
Lp

Vth(OCLstart )
(Vth( OCL ) clamp  Vth(OCLstart ) )
[s]
T( ocl )
32
OFF range
toff 
VDC  N S1  ton
 (2 A  1)  tq
Np  (VO1  VF 1 )
33
Main SW device peak
current
I DP 
V DC  ton
Lp
Trough skip end power 3
V DC  ton 2  
Po 
2  Lp  (ton  toff )
[s]
[A]
2
34
[W]
5.4.4 Formulas for obtaining auto burst start/end power
For Vburst in the formulas, substitute the VOCL (stby) or VTH (stby) indicated under “Automatic standby”
of “Electric/thermal characteristics” in the specification.
To obtain auto burst start power, substitute VOCL (stby) = 0.045 V in place of Vburst.
To obtain the auto burst end power, substitute VTH (stby) = 0.060 V in place of Vburst.
SHINDENGEN ELECTRIC MFG. CO. , LTD
24/41
MS1003SH・MS1004SH
Application Note Ver.2.2
* In place of the coefficient A in the formulas, substitute 1 for the MS1003SH and 2 for the MS1004SH.
Lp  Vburst
VDC  R(OCL )
35
ON range
ton 
36
OFF range
toff 
VDC  N S1  ton
 (2 A  1)  tq
Np  (VO1  VF 1 )
37
Main SW device peak current
I DP 
Vburst
R(OCL )
[A]
38
Auto burst start/end power
Po 
VDC  Vburst    ton
2  R(OCL )  (ton  toff )
[W]
[s]
[s]
5.4.5 Formulas for obtaining droop point power
Vth (ocl) varies with input voltage. First, calculate the input voltage VDC (clamp) at the point of change in Vth
(ocl). If VDC does not exceed VDC (clamp), apply the formulas in 1). If VDC exceeds VDC (clamp), apply the
formulas in 2).
Just as in Section 5.4.3, use the following formula to obtain the input voltage at the point of change in Vth
(ocl).
26
Input voltage at the point of
change in Vth (ocl)
V DC ( clamp ) 
Lp  Vth(OCL ) clamp
TOCL  R(OCL )
[V]
Droop point power PL [W]
The chart below shows a model curve of the relationship between input voltage and droop point power.
Calculated droop point
power determined by
OCL resistance
Calculated droop point
power corrected by the
OCL correction function
OCL correction
starts at this point.
Input voltage VDC [V]
SHINDENGEN ELECTRIC MFG. CO. , LTD
25/41
MS1003SH・MS1004SH
Application Note Ver.2.2
1) VDC < VDC (clamp)
Lp  Vth(OCL ) clamp
39
ON range
ton 
40
OFF range
toff 
41
Main SW device peak
current
I DP 
Droop point power
VDC  ton 2 
PL 
2  Lp  (ton  toff )
[s]
V DC  R( OCL )
VDC  N S 1  ton
 tq
Np (VO1  VF 1 )
[s]
Vth(OCL ) clamp
[A]
R(OCL )
2
42
[W]
2) VDC > VDC (clamp)
43
ON range
ton 
VDC  R(OCL )
Lp

Vth( OCLstart )
(Vth(OCL ) clamp  Vth( OCLstart ) )
44
OFF range
toff 
VDC  N S1  ton
 tq
Np  (VO1  VF 1 )
45
Main SW device peak
current
I DP 
V DC  ton
Lp
46
Droop point power
PL 
47
Vth (ocl) at droop point
Vth( ocl ) 
[s]
TOCL
[s]
[A]
VDC  ton 2 
2  Lp  (ton  toff )
2
[W]
(Vth( OCL ) clamp  Vth( OCLstart ) )
TOCL
 ton  Vth(OCLstart )
[V]
The results of calculations for the operating points above are provided as guidelines. They may differ
from actual power supply characteristics for various reasons, including power supply efficiency, filter
circuit, and control IC signal delays.
SHINDENGEN ELECTRIC MFG. CO. , LTD
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MS1003SH・MS1004SH
Application Note Ver.2.2
5.5 Pin design
5.5.1 Design procedure for the Z/C pin (Pin 1)
The operating mode switching circuit described in this section incorporates a photocoupler that receives
signals from the secondary side. For the secondary circuit configuration, see 6. Example circuit diagram.
(1) Basic circuit
This is the simplest circuit configuration for
designs requiring only normal mode. Since
auto burst mode is available, it is the easiest
design for a power supply featuring standby
mode.
(2) Circuit for using super standby mode
The diagram to the right shows the basic
circuit for using super standby mode. A
photocoupler is added to switch the Z/C pin
between high and low levels. If the
photocoupler activates, the circuit operates in
normal mode. If the photocoupler deactivates,
the circuit operates in super standby mode.
The photocoupler current must be carefully set so that the Z/C pin voltage falls sufficiently low.
 Protection for this circuit configuration
Protect with a zener diode if the insulation
appears likely to break down between the
photocoupler PH102 and the primary or
secondary side, as shown to the right.
MS1003SH
MS1004SH
3
1
R105
R106
Nc
D102
DZ301
PH102
C108
(3) Circuit for operating the photocoupler at low
current
This circuit uses less power to operate the
PH102 in auto burst mode, thereby slightly
enhancing efficiency in auto burst mode
compared to circuit (2).
SHINDENGEN ELECTRIC MFG. CO. , LTD
27/41
MS1003SH・MS1004SH
Application Note Ver.2.2
(4) Setting components
1) R105 + R106
The absolute maximum rating of the Z/C pin is ±5 mA. A zener diode is mounted for protection
between the Z/C pin (Pin 1) and the GND pin (Pin 3). This diode determines the absolute maximum
current rating. Set resistance so that the current does not exceed this level.
The diagram to the right shows a model
circuit, which is a basic circuit with an
onboard protection element (zener diode)
added. I(1) and I(2) represent currents
flowing to this onboard protection element.
The current I(1) flows when the Nc coil
output is a positive voltage. I(2) flows
when the Nc coil output is a negative
voltage.
Onboard protection
element
I(1)
I(2)
I(1) and I(2) must not exceed the absolute
maximum rating. In ordinary designs, set resistance so that these currents do not exceed 80% of the
absolute maximum rating (± 4 mA).
The following table gives formulas for calculating the resistance R105 + R106:
48
Resistance assuming a
positive voltage for Nc
coil
49
Resistance assuming a
negative voltage for Nc
coil
Nc  (VO1  V F 1 )
 VCL( H )
N S1
R105  R106 
I①
Nc  VDC (max)
R105  R106 
Np
 VCL( L)
[Ω]
[Ω]
 I②
VCL(H) and VCL(L) are the clamping voltages of the onboard protection element, a protective zener
diode. The specification gives these values.
If the basic circuit configuration shown in Section (1) is used, I(1) flows to the D102. In this case,
formula 48 may be disregarded.
2) R106 and C108
These components set up the partial resonance period tq.
Adjust to the partial resonance troughs while monitoring actual waveforms.
Initial design value
C108
100 pF
R106
1 kΩ or greater
SHINDENGEN ELECTRIC MFG. CO. , LTD
28/41
MS1003SH・MS1004SH
Application Note Ver.2.2
3) D102
This diode sets the Z/C pin to low to activate normal mode.
As described in Section 3.2.1, the on-trigger circuit detects the Z/C pin voltage when it reaches VZ/C
(0.25 V). Thus, the diode should not reduce the voltage below VZ/C. Make sure the diode has
adequate VF to secure VZ/C.
5.5.2 Design procedure for F/B pin
(1) Basic circuit
The diagram to the right shows the basic circuit. PH101 is
a photocoupler for constant voltage control. R107 and
C107 are noise reduction components.
C107 has a capacitance between 470 pF and 2,200 pF. Set
the initial design value to 1,000 pF. R107 is set between 39
kΩ and 47 kΩ. Normally, it should be set to 47 kΩ. If the
resistance falls below 39 kΩ, the timer latch function may
be disabled.
(2) Protection
PH101 may exhibit insulation breakdown during a short
circuit test. If so, protect the circuit using a zener diode, as
shown to the right. A zener diode for 10 V or greater
should have negligible effect on IC functions for normal
use.
(3) Phase compensation of F/B pin
C107 is used not just to reduce noise, but to adjust
feedback response. However, in a large-capacity or
multi-output power supply, phase compensation by the
secondary control circuit may be inadequate.
If so, add a circuit between the F/B pin and the GND pin,
as shown to the right. Doing so can resolve various issues,
including hunting.
Refer to the following table to determine constants.
Initial design value
R303
4.7 kΩ
C301
0.1 F
SHINDENGEN ELECTRIC MFG. CO. , LTD
29/41
MS1003SH・MS1004SH
Application Note Ver.2.2
(4) Additional circuit to F/B pin
When adding a circuit to the power supply circuit due to load setting conditions or for other reasons, be
careful to avoid disabling the timer latch function. Disabling the timer latch will affect power supply
performance.
5.5.3 Design of OCL pin
(1) Basic circuit
The diagram to the right shows the basic circuit.
The circuit consists of R104 for primary current
detection and a filter circuit comprising R103 and C106.
R104: Resistance required in Section 5.4
C106: Initial design value of 220 pF
Design values from 220 pF to 3,300 pF
R103: Initial design value of 100 Ω
Design values from 100 to 470 Ω
Increase the constants if switching noise is significant
and may lead to malfunctions.
(2) Protection for large output power
If switching noise is significant—for instance, because output power is large—a high negative voltage
may be applied to the OCL pin. Since the MS100xSH series are single power supply ICs, a negative
voltage may damage the IC or cause malfunctions.
The following diagram shows a circuit that incorporates a feature to protect the OCL pin against
negative voltages. The added diode D301 should have small VF (a Schottky barrier diode is
recommended) and should be connected as close as possible to the pin.
SHINDENGEN ELECTRIC MFG. CO. , LTD
30/41
MS1003SH・MS1004SH
Application Note Ver.2.2
5.5.4 Design of VG pin
(1) Basic circuit
The VG pin outputs switching signals. It can be used when
the main switching device is a voltage-driven element.
The diagram to the right shows the basic circuit
configuration. The initial design values should be 10 Ω for
the gate resistor R102 and 33 kΩ for the resistor R101
between the gate and the source.
(2) Circuit requiring a drive circuit
The main switching device driving performance of
the MS100x series is specified under “Soft drive” of
“Electric/thermal characteristics” in the
specification. A circuit for enhancing the driving
performance is required between the VG pin and the
main SW device as shown to the right if the main
switching device cannot be driven directly by the
VG pin in the basic circuit (1).
6
MS1003SH
MS1004SH
Q302
5
3
R102
100Ω
Q303
Refer to the diagram to the right to determine
constants.
R304
100Ω
Q101
R305
10Ω
R306
10kΩ
R104
Use the gate total charge quantity Qg of the main switching device as a guide for determining whether a
driving circuit is required.
Qg of main SW device > 20 nC to 25 nC
Driving circuit required
QG of main SW device < 20 nC
No driving circuit required
(3) Handling high power
Design the drive circuit as shown below if a power supply circuit requires more than one main switching
device. The diagram illustrates an example of a circuit using two main SW devices. For configurations
involving three main SW devices, connect the devices in parallel based on the example. Use the
constants shown in the diagram as initial design values and evaluate to determine optimal constants.
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MS1003SH・MS1004SH
Application Note Ver.2.2
5.5.5 Design of Vcc pin
(1) Basic circuit
The diagram to the right is the basic circuit. The circuit
consists of D103 and C109 for rectifying the Nc coil
output and C110 for noise reduction between Vcc and
GND.
For C110, use a capacitor with good frequency
characteristics. Design around 0.22 μF.
(2) Measure  against poorly regulated Vcc voltage
If the Vcc voltage is not well regulated due to design conditions, such as the load specification, add R110
as shown below to the left. This is generally the most cost-effective way to improve regulation. The chart
to the right shows model lines of Vcc voltage regulation relative to output power. The red line represents
Vcc voltage regulation with the basic circuit (1). The measure adjusts behavior to the black line.
Previous Vcc
regulation
Vcc
voltage
Vcc電圧
OVP voltage
Improved Vcc
regulation
Output power
(3) Measure  against poorly regulated Vcc voltage
The diagram below shows a circuit that improves regulation more effectively than measure (2).
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MS1003SH・MS1004SH
Application Note Ver.2.2
Initial design value
Recommended value
R310
560 
220 –1 k
DZ303
18 V
16 V–22 V
* Keep in mind potential losses associated with R310.
OVP voltage
Vcc
voltage
Vcc電圧
This measure will improve the regulation
(represented by the red line) and move it to the
black line on the chart to the right. The voltage
setting of DZ303 is the operating point of DZ303, as
shown to the right.
Previous Vcc
regulation
Operating point of
DZ303
This circuit incorporating this measure is the most
effective circuit available when using super standby
mode. No losses occur in super standby mode.
Output power
(4) Measure  against poorly regulated Vcc voltage
If the measures described in Section (2) and (3) above do not work, use a dropper circuit as shown below
to stabilize Vcc. Use the constants given below as guidelines.
When selecting DZ304, note the withstand voltage between Q306 and EB.
If the withstand voltage between Q306 and EB is 5 V, select 22 V or greater.
If the withstand voltage between Q306 and EB is 7 V, select 20 V or greater.
The chart to the right shows a Vcc regulation model
after implementing the measures above. Activating the
dropper circuit stabilizes the voltage. When DZ305
activates, the voltage becomes the OVP voltage.
Previous Vcc
regulation
OVP voltage
Vcc
voltage
Vcc電圧
This measure stabilizes the Vcc pin voltage to the zener
voltage of DZ304 plus VBE of Q306. Unless DZ305 is
added as shown in the diagram above, OVP of the Vcc
pin cannot be used. Set the zener voltage of DZ305 so
that the OVP functions properly.
Operating point of
dropper circuit
Operating point of
DZ305
Output power
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MS1003SH・MS1004SH
Application Note Ver.2.2
(5) Circuit protection
The Vcc pin may break down during a short circuit test.
If so, protect the circuit using a zener diode (DZ306), as
shown to the right. A zener diode for 30 V or greater
should have negligible effect on IC functions for normal
use.
5.5.6 Setting resonating capacitor
The capacitance set for the resonating capacitor should be between 100 pF and 3,300 pF for real-world
applications. No other restrictions apply.
(1) Conditions under which a relatively large capacitance is selected
 The partial resonance trough is close to 0 V because, for example, input voltage is low and switching
loss is expected to be very small.
 The conducted emissions are high.
 The surge voltage is large relative to the withstand voltage of the main switching device, and there is
no margin.
(2) Conditions under which a relatively small capacitance is selected
 The main switching device generates significant heat.
 Standby power must be minimized.
The following table lists the effects of changes in the capacitance of the resonating capacitor on power
supply performance.
Reduce capacitance.
Item
⇔
Increase capacitance.
Rise
⇔
Fall
Droop point power
Increase
⇔
Decrease
Heat buildup in the main SW
Decrease
⇔
Increase
Main SW device current immediately after
powering on
Decrease
⇔
Increase
Main SW peak current under the same output
power conditions
Decrease
⇔
Increase
Regulation of output voltage
Decline
⇔
Improve
Regulation of Vcc voltage
Decline
⇔
Improve
Power supply efficiency
Improve
⇔
Decline
Rising tendency
⇔
Declining tendency
Main SW device peak voltage
Noise
In efforts to optimize power supply performance, changes in the capacitance of the resonating capacitor
often involve trade-offs. Carefully examine the advantages and disadvantages of the change when
determining the constants. It may be possible to improve the trade-offs by redesigning the transformer.
Consider redesigning the transformer to optimize power supply performance.
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MS1003SH・MS1004SH
Application Note Ver.2.2
6. Example circuit diagram
6.1 Circuit diagram
L101
HF2316-A103Y1R0
F101
10mH
AC250V 1.6A
1A
C102
AC250V
1000pF
C101
AC250V
0.1μF
AC
AC
C103
AC250V
1000pF
AC85~132V
D201
SG5S6M
T101
ECO2219
D101
S1WB80
C105
1kV
470pF
R104
0.39Ω 2W
C104
200V
100μF
L201
2.6A
4.7μH
Np
GND
C201
16V
1500μF
R102
10Ω
0.5W
R101
33kΩ
R201
3.3kΩ
0.25W
R202
2.2kΩ
PC101
PC123
R110
D103
1Ω 0.5W M1FL20U
IC111
MS1003SH
8
1
Vin
7
2
Z/C
NC
F/B
6
3
Vcc
GND
4
R107
47kΩ
Nc
R109
150kΩ
IC201
HA17431HLTP
R207
10kΩ
±0.5%
R208
6.8kΩ
0.25W
スーパースタンバイ
Super
standby mode
モード切り替え回路
switching circuit
R209
100kΩ
PC102
PC123
Q201
DTC114EUA
High
signal: NormalMode
Mode
High信号:Normal
Low
signal: SP Stby
Stby Mode
Low信号:SP
R106
12kΩ
PH102
PC123
PH101
PC123
R205
36kΩ
±0.5%
R206
2.2kΩ
±0.5%
C203 R203
50V 4.7kΩ
0.047μF
C109
50V
100μF
OCL
C107
50V
1000p
Q102
2SC4081
C110
50V
0.1μF
VG
C106
50V
220pF
R105
10kΩ
D102
M1FL20U
5
+Vo
12V/2.1A
Ns
Q101
F5B52HPⅡ
R103
100Ω
0.25W
C202
16V
470μF
C151
AC250V
2200pF
C108
50V
100p
R108
68kΩ
This circuit is based on the results of calculations described in Section 6.2
後述の6.2項より算出した計算値により設計した回路です。
below. Actual values may differ from calculations due to differences in
計算値と実機では効率や応答系による結果の違い、
efficiency and in the response system, variance in IC thresholds, temperature
ICのしきい値のばらつき・各部品の温度ドリフトなどの要因があり
drifts for each component, and various other factors. Use the results of
同じ数値になりません。計算値はあくまで参考値となります。
calculations
as guidelines. In the example circuit, the OCL resistance (R(OCL))
参考回路においては、OCL抵抗(R
(OCL)
)について実機と計算値の
is changed
from 0.37 Ω to 0.39 Ω due to
discrepancies
between the actual
ズレから0.37Ω→0.39Ω・トランスのインダクタンス値は
device and calculations. The transformer inductance at AL-value = 140 has
トランスメーカー情報よりAL-value=140時のインダクタンス値は
been
changed from 0.656 mH to 0.647 mH based on information from the
0.656mHとなり0.647mHから変更しています。
transformer
manufacturer.
6.2 Calculations for example circuit design
This section discusses the design procedure for the example circuit shown in Section 6.1.
(1) I/O specification and transformer
Control IC
MS1003SH
Input specification
AC85–132V
Output specification
12V/2.1A
Transformer
ECO2219 (made by TDK)
(2) Initial design value list
VDC(min)
102 [V]
D
0.47
Cq
470 pF
VDC(max)
187 [V]
Po
25.2 [W]
PL
Po  1.2 [W]
f(min)
50 [kHz]

0.85
Ae
46.4 [mm2]
VO1
12 [V]
VNC
15 [V]
B
300 mT
Vo1 rectification diode forward voltage: VF1
0.8 [V]
VNC rectification diode forward voltage: VFNC
0.6 [V]
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MS1003SH・MS1004SH
Application Note Ver.2.2
* Setting the on duty ratio (D)
The on duty ratio D is determined primarily by the withstand voltage of the main switching device and
the corresponding heat buildup. The following table lists changes in characteristics resulting from
changes in D.
⇔
Increase
Fall
⇔
Rise
Main SW device peak current
Increase
⇔
Decrease
Main SW device switching loss
Increase
⇔
Decrease
Main SW device conduction loss
Increase
⇔
Decrease
Operating frequency fluctuation range
Decrease
⇔
Increase
Decrease
On duty ratio (D)
Voltage applied to the main SW device
(3) Calculating the primary inductance and the main switch peak current
Substitute
0.47
=9.4[μs] and
50  10 3
2  25.2  1.2
Formula 9: I DP 
=1.484[A] into Formula 10.
0.85  102  0.47
102  9.4  10 6
Formula 10: Lp 
=0.646[mH]
1.484
Formula 4: t on (max)1 
(4) Calculating the number of turns in the primary coil
Substitute
Formula 4: t on (max)1 
Formula 11: Np 
D
f (min)

0.47
=9.4[μs] into Formula 11.
50  10 3
VDC (min)  t on (max)1 10 7
B  Ae

102  9.4  10 6  10 7
=68.88[Turn]
300  0.464
Round the result to the nearest integer, i.e., Np = 68 turns.
(Round up the result when adjusting D upwards. In the example, the result is rounded down to adjust it
downwards.)
(5) Calculating the number of turns in the control output coil
 470  10 12 =1.73[μs]
1
(12  0.6)  68  (
 9.4  10 6  1.73  10 6 )
3
50  10

=7.76[Turn]
102  9.6  10  6
Formula 6: tq  3.14  0.646  10
Formula 13: N S 1
3
Round the result to the nearest integer, i.e., NS1 = 8 turns.
(Round down the result when adjusting D upwards. In the example, the result is rounded up to adjust it
downwards.)
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MS1003SH・MS1004SH
Application Note Ver.2.2
(6) Calculating the number of turns in the control coil
Formula 15: Nc  8 
15  0.8
=10.03[Turn]
12  0.6
Round the result to the nearest integer, i.e., Nc = 10 turns.
(Round up the result when adjusting the voltage upwards. When adjusting it downwards, round it
down.)
(7) Recalculating the transformer design
The actual design values of a transformer differ from initial design values because results are rounded
to integers during the design process and because actual resistances and inductances differ from
calculations.
The differences are corrected and the OCL resistance R(OCL) and transformer core gap are determined as
follows:
1) Correcting the main SW peak current and determining OCL resistance R(OCL)
Calculate R(OCL) based on the relationship between the main SW peak current obtained in Section
(3) and the VTH (OCL) clamp.
R(OCL ) 
0.54
=0.3638[Ω]
1.484
To adjust resistance, change R(OCL) to 0.37 Ω (e.g., 0.22 Ω + 0.15 Ω).
The main SW peak current changes to I DP 
0.54
=1.46[A].
0.37
2) Determining the core gap and correcting the inductance
To specify the core gap when ordering a transformer, you can use the result of Formula 12 in
Section 5.3. Note that using the inductance coefficient “AL-value” is more common.
The AL-value is among the key parameters that determine transformer core performance, together
with the NI-limit expressed in [
nH
] and magnetic saturation condition.
N2
The inductance is corrected based on the assumption that the AL-value is 140.
(Standard AL-values vary from manufacturer to manufacturer. Contact the transformer manufacturer
to obtain more information.)
Since the AL - value 
nH
2
, the result is 140  68 = 647360 nH.
2
N
The inductance Lp is corrected to 0.647 mH.
3) Correcting initial design values
From the IDP and Lp obtained in Sections 1) and 2), the initial design values are corrected as
follows:
Formula 10:
t on (max)1 
Lp  I DP 0.647  10 3  1.46

=9.26 [μs]
V DC (min)
102
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Application Note Ver.2.2
Formula 6:
Formula 5:
tq  3.14  0.647  10 3  470  10 12 =1.73[μs]
t off (max)
On duty ratio: D 
8  102  9.26  10 6

 1.73  10 6 =10.55[μs]
68  (12  0.6)
t on (max)1
t on (max)1  t off (max)
9.26
=0.467
9.26  10.55

Minimum oscillation frequency: f (min) 
Formula 9:
PL 
I DP    VDC (min)  D
2
1
1

=50.48[kHz]
t on (max)1  t off (max) 9.26  10.55

1.46  0.85  102  0.467
=29.56[W]
2
The preceding calculation shows that the droop point power is 1.173 times the maximum power; i.e.,
PL  1.173  PO (max) .
The following formula gives ΔB:
B 
V DC (min)  t on (max)1  10 7
Np  Ae

102  9.26  10 6  10 7
=299.35[mT]
68  0.464
The result indicates whether ΔB presents any problems.
 Corrected parameters
f(min)
50.48 [kHz]
D
0.467
ΔB
299.4mT
Lp
0.647 [mH]
tq
1.73 [μs]
PL
Po×1.173[W]
Np
68 [Turn]
NS1
8 [Turn]
Nc
10 [Turn]
Check to determine whether these corrected values are adequate. In particular, make sure P L is not
too large (the output current is not too large) or too small (there is sufficient margin relative to load)
and that the resulting conditions do not lead to saturation of ΔB.
(8) Estimating the voltage applied to the main switching device
After finalizing the transformer design, estimate the
withstand voltage of the main switching device and
check to determine whether the selected main
switching device has sufficient withstand voltage.
The diagram to the right shows a model waveform of
the main switching device when the main switching
device is off. The maximum voltage of the main
switching device is estimated by calculating (1) to
(4).
(3)
(2)
(1)
(4)
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Application Note Ver.2.2
1) VDC voltage
This is the same as the input capacitor voltage. Formula 2 gives the maximum value. In this
example, the maximum value is 186.7 V.
2) Flyback voltage
This is the transformer’s flyback voltage:
Np  (VO1  VF 1 )
N S1
The following formula gives the voltage:
68  (12  0.6)
=107.1[V]
8
3) Surge voltage
This surge voltage attributable to leakage inductance varies from specification to specification and
from transformer to transformer. In this example, it is estimated to be 150 V at maximum. This
parameter must be confirmed using actual equipment.
4) Quasi-resonance trough voltage
The higher this voltage, the greater the switching loss. This is obtained by subtracting (2) from (1)
above. In this example, it is 186.7 V – 107.1 V = 79.6 V.
The maximum voltage of the main switching device is 186.7 V + 107.1 V + 150 V = 443.8 V. For
instance, a MOSFET capable of withstanding 500 V is suitable for use with a margin exceeding 10%
(450 V). If the withstand voltage is too low, reduce on duty ratio D. Increase the on duty ratio D to
make the most of quasi-resonance effects.
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MS1003SH・MS1004SH
Application Note Ver.2.2
(8) Checking operating points
When checking the operating points, use the design values corrected in Section 6.2 (7)-3).
Work out the operating points of the example power supply in accordance with Section 5.4.
The following table gives the results of calculations based on an input voltage of DC 120 V:
(1)
Trough skip start power
9.33[W]
(2)
Operating frequency at trough skip start
(3)
Trough skip end power
Trough skip end power 1 from Formula 25 of [Condition 1]
.................................................................................... 16.23[W]
As DC 120 V = VDC < VDC (clamp) = 129.4 V;
Trough skip end power 2 from Formula 30 of [Condition 2]-1)
.................................................................................... 26.77[W]
Trough skip end power 1 < Trough skip end power 2
Trough skip end power 1 is used.
16.23[W]
(4)
Operating frequency at trough skip end
Calculated from Formulas 22 and 23 for trough skip end
power 1.
60.74[kHz]
(5)
Auto burst start power
(6)
Operating frequency immediately before auto burst start
(7)
Auto burst end power
(8)
Operating frequency immediately after auto burst end
(9)
Droop point power
Calculated from Formula 30 as DC 120 V = VDC < VDC
(clamp) = 129.4 V.
(10)
Operating frequency at droop point
133.3[kHz]
0.62[W]
151.86[kHz]
1.03[W]
141.87[kHz]
31.8[W]
54.3[kHz]
Operating frequency [kHz]
The chart below shows a model of the operating frequency characteristics relative to output power
indicating each operating point. Check the operating points (1) to (10).
(6)
(8)
(2)
(4)
(10)
(5)(7)
(1)
(3)
Output power [W]
(9)
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MS1003SH・MS1004SH
Application Note Ver.2.2
MS1003SH/MS1004SH
Application note
Ver.2.2
Issued by: Devices development department 2,
Electronic device division
Issued:
April 13, 2012
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