STR2W152D, STR2W153D Application Note

Application Information
STR2W100D Series PWM Off-Line Switching Regulators
General Description
STR2W100D series are power ICs for switching power supplies, incorporating a power MOSFET and a current mode
PWM controller IC in one package.
Including a startup circuit and a standby function in the controller, the product achieves low power consumption, low
standby power, and high cost-effectiveness in power supply
systems, while reducing external components.
Features and Benefits
• Current mode PWM control
• Built-in Random Switching function: reduces EMI noise,
simplifies EMI filters, and cuts cost by external part
reduction
• Built-in Slope Compensation function: avoids
subharmonic oscillation
• Built-in Leading Edge Blanking (LEB) function
• Auto Standby function:
▫ Input power, PIN < 25 mW at no load
▫ Normal load operation: PWM switching
▫ Light load operation: Standby mode (Burst oscillation)
• Soft Start function: reduces stress on internal power
MOSFET and output rectifier diode
• Protection Functions:
▫ Overcurrent Protection function (OCP); Pulse-by-pulse,
built-in compensation circuit to minimize OCP point
variation on AC input voltage
▫ Overload Protection function (OLP); Auto restart,
built-in timer, reduces heat during overload condition,
and no external components required
Figure 1. STR2W100D series packages are fully molded
TO-220 package types. Pin 2 is deleted for greater isolation.
▫ Overvoltage Protection function (OVP); Auto restart
▫ Thermal Shutdown function (TSD); Auto restart
Applications
Switching power supplies for electronic devices such as:
• Home appliances
• Digital appliances
• Office automation (OA) equipment
• Industrial apparatus
• Communication facilities
The product lineup for the STR2W100D series provides the following options:
POUT*
(W)
MOSFET
Part Number
STR2W152D
STR2W153D
fOSC
(kHz)
67
VDSS(min)
(V)
650
RDS(on)
(max)
(Ω)
230 VAC
85 to 265 VAC
3.0
60
40
1.9
90
60
*The listed output power is based on the package thermal ratings, and the peak
output power can be 120% to 140% of the value stated here. At low output voltage
and short duty cycle, the output power may be less than the value stated here.
STR2W100D-AN Rev.3.1
SANKEN ELECTRIC CO., LTD.
Functional Block Diagram
4
VCC
Startup
UVLO
7
Reg
VREG
OVP
D/ST
1
TSD
NC
PWM
Oscillator
DRV
SQ
R
OCP
VCC
Drain peak current
compensation
OLP
Feedback
control
FB/OLP
6
Slope
compensation
Pin-out Diagram
D/ST
S/OCP
1
3
VCC
GND
4
5
FB/OLP
NC
3
S/OCP
GND
5
STR2W100D Pin List Table
Number
Name
1
D/ST
3
S/OCP
Function
MOSFET drain pin and input of the startup current
MOSFET source and input of Overcurrent Protection (OCP) signal
4
VCC
Power supply voltage input for Control Part and input of Overvoltage
Protection (OVP) signal
5
GND
Ground
6
FB/OLP
7
NC
6
7
LEB
Feedback signal input for constant voltage control signal and input of
Overload Protection (OLP) signal
No connection
Table of Contents
Functional Description
8
Startup Operation
8
Startup Period
Undervoltage Lockout (UVLO) Circuit
Bias Assist Function
Auxiliary Winding
Soft-Start Function
Constant Output Voltage Control
Automatic Standby Mode Function
STR2W100D-AN Rev.3.1
8
8
9
9
10
11
12
Random Switching Function
Overcurrent Protection Function (OCP)
Overvoltage Protection Function (OVP)
Overload Protection Function (OLP)
Thermal Shutdown Function (TSD)
Design Notes
12
12
13
14
14
15
Peripheral Components
15
Phase Compensation
15
PCB Trace Layout and Component Placement 15
SANKEN ELECTRIC CO., LTD.
2
Package Outline Drawing, TO-220F-6L
10.0±0.2
4.2±0.2
Gate burr
Ø3.2±0.2
7.9±0.2
16.9±0.3
4±0.2
0.5
2.8±0.2
STR
a
b
5.0±0.5
6-0.74±0.15
6-0.65 +0.2
-0.1
(5.4)
R-end
)
-R1
(2
6×P1.27±0.15=7.62±0.15
10.4±0.5
2.8
2.6±0.1
Dimensions from root
0.45 +0.2
-0.1
Dimensions between roots
5.08±0.6
Dimensions between tips
0.5
1 2 3 4 5 6 7
Unit: mm
Dashed line at gate burr indicates
protrusion of 0.3 mm (maximum)
Leadform: LF2003
Pin 2 is deleted in order to ensure creepage and
clearance of the high voltage pin (pin 1) and low
voltage pin (pin 3)
0.5
Front view
0.5
0.5
Side view
a. Type Number: 2W1xxD
b. Lot Number:
1st and 2nd letter: Control number
3rd letter: Last digit of year (0-9)
4th letter: Month
1 to 9 for Jan. to Sept.
O for Oct.
N for Nov.
D for Dec.
5th and 6th letter: Day of month (01-31)
7th and 8th letter: Control number
Pin treatment Pb-free. Device composition
compliant with the RoHS directive.
STR2W100D-AN Rev.3.1
SANKEN ELECTRIC CO., LTD.
3
Electrical Characteristics
• Refer to the datasheet of each product for these details.
• The polarity value for current specifies a sink as "+ ," and a source as “−,” referencing the IC.
Absolute Maximum Ratings Unless specifically noted, TA is 25°C
Characteristic
Symbol
Drain Peak Current
IDPEAK
Maximum Switching Current
IDMAX
EAS
Avalanche Energy
ILPEAK
Notes
STR2W152D
STR2W153D
STR2W152D
STR2W153D
Pins
Single pulse
1−3
TA = −20°C to 125°C
1−3
STR2W152D
STR2W153D
STR2W152D
Single pulse, VDD = 99 V,
L = 20 mH
1−3
STR2W153D
S/OCP Pin Voltage
VOCP
3−5
Rating
Unit
6.0
A
9.5
A
6.0
A
9.5
A
62
mJ
86
mJ
2.3
A
2.7
A
−2 to 6
V
Control Part Input Voltage
VCC
4−5
32
V
FB/OLP Pin Voltage
VFB
6−5
−0.3 to 14
V
FB/OLP Pin Sink Current
IFB
6−5
STR2W152D
MOSFET Power Dissipation
PD1
STR2W153D
With infinite heatsink
1.0
mA
23.8
W
26.5
W
1.3
W
4−5
0.13
W
−20 to 115
°C
1−3
Without heatsink
VCC × ICC
Control Part Power Dissipation
PD2
Internal Frame Temperature In
Operation*
TF
–
Operating Ambient Temperature
TOP
–
−20 to 115
°C
Storage Temperature
Tstg
–
−40 to 125
°C
Channel Temperature
Tch
–
150
°C
*The recommended internal frame temperature, TF , is 105°C (max).
STR2W100D-AN Rev.3.1
SANKEN ELECTRIC CO., LTD.
4
Electrical Characteristics of Control Part Unless specifically noted, TA is 25°C, VCC = 18 V
Characteristic
Symbol
Operation Start Voltage
VCC(ON)
Operation Stop Voltage*
VCC(OFF)
Circuit Current in Operation
ICC(ON)
Test Conditions
VCC = 12 V
Pins
Min.
Typ.
Max.
Unit
4–5
13.8
15.3
16.8
V
4–5
7.3
8.1
8.9
V
4–5
−
−
2.5
mA
Minimum Start Voltage
VST(ON)
4–5
−
40
−
V
Startup Current
ISTARTUP
VCC = 13.5 V
4–5
−3.9
−2.5
−1.1
mA
Startup Current Threshold Biasing
Voltage*
VCC(BIAS)
ICC = –100 μA
4–5
8.5
9.5
10.5
V
Average Operation Frequency
fOSC(AVG)
1–5
60
67
74
kHz
Frequency Modulation Deviation
Maximum Duty Cycle
Leading Edge Blanking Time
Δf
1–5
−
5
−
kHz
DMAX
1–5
65
74
83
%
tBW
–
−
390
−
ns
OCP Compensation Coefficient
DPC
–
−
17
−
mV/μs
OCP Compensation Duty Cycle Limit
DDPC
–
−
36
−
%
OCP Threshold Voltage at
Zero Duty Cycle
VOCP(L)
3–5
0.69
0.78
0.87
V
OCP Threshold Voltage at
36% Duty Cycle
VOCP(H)
3–5
0.79
0.88
0.97
V
Maximum Feedback Current
IFB(MAX)
Minimum Feedback Current
IFB(MIN)
FB/OLP Oscillation Stop Threshold
Voltage
VFB(OFF)
OLP Threshold Voltage
OLP Operation Current
6–5
−280
−170
−90
μA
6–5
−30
−15
−7
μA
VCC = 32 V
6–5
1.3
1.4
1.5
V
VFB(OLP)
VCC = 32 V
6–5
7.3
8.1
8.9
V
ICC(OLP)
VCC = 12 V
4–5
−
230
−
μA
tOLP
1–5
54
68
82
ms
FB/OLP Clamp Voltage
VFB(CLAMP)
6–5
11
12.8
14
V
OVP Threshold Voltage
VCC(OVP)
4–5
26
29
32
V
TJ(TSD)
−
130
−
−
°C
OLP Delay Time
Thermal Shutdown Activating
Temperature
VCC = 12 V
*VCC(BIAS) > VCC(OFF) always.
STR2W100D-AN Rev.3.1
SANKEN ELECTRIC CO., LTD.
5
Electrical Characteristics of MOSFET Unless specifically noted, TA is 25°C
Characteristic
Symbol
Drain-to-Source Breakdown Voltage
VDSS
Drain Leakage Current
IDSS
On-Resistance
RDS(ON)
Switching Time
tf
Thermal Resistance*
Rθch-F
Test Conditions
STR2W152D
STR2W153D
Pins
Min.
Typ.
Max.
Unit
1–5
650
–
–
V
1–5
–
–
300
μA
–
–
3.0
Ω
–
–
1.9
Ω
–
–
250
ns
1–5
1–5
STR2W152D
STR2W153D
–
–
–
2.48
°C/W
–
–
1.95
°C/W
*The thermal resistance between the channels of the MOSFET and the internal frame.
STR2W100D-AN Rev.3.1
SANKEN ELECTRIC CO., LTD.
6
Typical Application Circuit
CRD Clamp Snubber Circuit
D1
VAC
C5
L2
D4
T1
R3
R9
PC1
P
C1
D3
R8
S
C8
C6
C7
D2
U2
R2
D
R6
R7
GND
D/ST
2
S/OCP
V CC
GND
FB/OLP
NC
C2
R4
R5
U1
STR
2W100D
VOUT
1
C4
C, RC
Damper
Snubber
Circuit
3 4 5 6 7
C3
PC1
ROCP
C9
The following design features should be observed:
• The PCB traces from the D/ST pin should be as wide as possible, in order to enhance thermal dissipation.
• In applications having a power supply specified such that VDS has large transient surge voltages, a clamp
snubber circuit of a capacitor-resistor-diode (CRD) combination should be added on the primary winding P, or
a damper snubber circuit of a capacitor (C) or a resistor-capacitor (RC) combination should be added between
the D/ST pin and the S/OCP pin.
STR2W100D-AN Rev.3.1
SANKEN ELECTRIC CO., LTD.
7
Functional Description
All of the parameter values used in these descriptions are typical
values, according to the STR2W153D specification, unless they
are specified as minimum or maximum.
With regard to current direction, "+" indicates sink current
(toward the IC) and "–" indicates source current (from the IC).
D1
T1
VAC
C1
Startup Operation
Startup Period
Figure 2 shows the VCC pin peripheral circuit. The built-in
startup circuit is connected to the D/ST pin, and it generates a
constant current, ISTARTUP = –2.5 mA to charge capacitor C2 connected to the VCC pin. During this process, when the VCC pin
voltage reaches VCC(ON) = 15.3V, the control circuit starts operation. After that, the startup circuit stops automatically, in order to
eliminate its own power consumption.
1
D/ST
VCC
D2
4
STR2W100D
GND
P
R2
C2
5
D
The approximate startup time, tSTART , is calculated as follows:
tSTART
z
C2 ×
where:
VCC(ON) – VCC(INT)
|ISTARTUP|
(1)
Figure 2. VCC pin peripheral circuit
tSTART is the startup time in s, and
C2 should be an electrolytic capacitor, in the range 10 to 47 μF,
for general power supply applications.
ICC
ICC(ON) (max)
= 2.5 mA
In operation, when the VCC pin voltage decreases to VCC(OFF) =
8.1 V, the control circuit stops operation, by the UVLO (Undervoltage Lockout) circuit, and reverts to the state before startup.
The voltage from the auxiliary winding, D, in figure 2 becomes
a power source to the control circuit after the operation start. The
auxiliary winding voltage is targeted to be about 15 to 20 V, taking
account of the winding turns of the D winding, so that the VCC
pin voltage should become as follows within the specification of
input voltage range and the output load range of power supply:
VCC(BIAS)(max) < VCC < VCC(OVP)(min)
Stop
Undervoltage Lockout (UVLO) Circuit
Figure 3 shows the relationship of VCC and ICC . When the VCC
pin voltage increases to VCC(ON) = 15.3 V, the control circuit starts
operation and the circuit current, ICC , increases.
Start
VCC(INT) is the initial voltage of the VCC pin in V.
8.1 V
VCC(OFF)
15.3 V VCC pin voltage
VCC(ON)
Figure 3. VCC versus ICC
(2)
10.5 (V) < VCC < 26.0 (V)
STR2W100D-AN Rev.3.1
SANKEN ELECTRIC CO., LTD.
8
Bias Assist Function
Figure 4 shows the VCC pin voltage behavior during the startup
period. When the VCC pin voltage reaches VCC(ON) = 15.3 V, the
control circuit starts operation, the circuit current, ICC , increases,
and thus the VCC pin voltage begins dropping. At the same time,
the auxiliary winding voltage increases in proportion to the output
voltage rise. And thus, the VCC pin voltage is set by the balance
between dropping by the increase of ICC and rising by the increase
of the auxiliary winding voltage.
Just at the turning-off of the power MOSFET, a surge voltage
occurs at the output winding. If the feedback control is activated
by the surge voltage on light load condition at startup, and the
VCC pin voltage decreases to VCC(OFF) = 8.1 V, a startup failure
can occur, because the output power is restricted and the output
voltage decreases.
In order to prevent this, during a state of operating feedback
control, when the VCC pin voltage falls to the Startup Current
Threshold Biasing Voltage, VCC(BIAS) = 9.5 V, the Bias Assist
function is activated. While the Bias Assist function is operating,
the decrease of the VCC voltage is suppressed by a supplementary current from the Startup circuit.
VCC
pin voltage
Target
Operating
Voltage
Increasing by
output voltage rising
Bias Assist period
VCC(ON) =
15.3 V
VCC(BIAS) =
9.5 V
VCC(OFF) =
8.1 V
Startup failure
Time
Figure 4. VCC during startup period
Without R2
VCC
pin voltage
By the Bias Assist function, the use of a small value C2 capacitor
is allowed, resulting in shortening startup time. Also, because the
increase of VCC pin voltage becomes faster when the output runs
with excess voltage, the response time of the OVP function can
also be shortened. It is necessary to check and adjust the process
so that poor starting conditions may be avoided.
Auxiliary Winding
In actual power supply circuits, there are cases in which the VCC
pin voltage fluctuates in proportion to the output of the SMPS
(see figure 5). This happens because C2 is charged to a peak voltage on the auxiliary winding D, which is caused by the transient
surge voltage coupled from the primary winding when the power
MOSFET turns off.
For alleviating C2 peak charging, it is effective to add some value
R2, of several tenths of ohms to several ohms, in series with D2
(see figure 6). The optimal value of R2 should be determined
using a transformer matching what will be used in the actual
application, because the variation of the auxiliary winding voltage
is affected by the transformer structural design.
Startup success
IC startup
With R2
IOUT
Figure 5. VCC versus IOUT with and without resistor R2
D2
4
VCC
STR2W100D
Added
R2
D
C2
GND
5
Figure 6. VCC pin peripheral circuit with R2
STR2W100D-AN Rev.3.1
SANKEN ELECTRIC CO., LTD.
9
Bobbin
Barrier
P1 S1 P2 S2 D
The variation of VCC pin voltage becomes worse if:
• The coupling between the primary and secondary windings of
the transformer gets worse and the surge voltage increases (low
output voltage, large current load specification, for example).
Barrier
• The coupling of the auxiliary winding, D, and the secondary
side stabilization output winding (winding of the output line
which is controlling constant voltage) gets worse and it is subject to surge voltage.
In order to reduce the influence of surge voltages on the VCC pin,
alternative designs for the auxiliary winding, D, can be used; as
examples of transformer structural designs see figure 7.
• Winding structural example (a): Separating the auxiliary winding D from the primary side windings P1 and P2.
The primary side winding is divided into two windings,
P1 and P2.
P1, P2 Primary side winding
S1 Secondary side winding, of which the
output voltage is controlled constant
S2 Secondary side output winding
D Auxiliary winding for VCC
Bobbin
Barrier
• Winding structural example (b): Placing the auxiliary winding D within the secondary winding S1 in order to improve the
coupling of those windings.
P1 S1 D S2 S1 P2
The output winding S1 is a stabilized output winding, controlled
to constant voltage.
Soft-Start Function
Figure 8 shows the behavior of VCC pin voltage and the drain
current during the startup period.
The IC activates the soft start function during the startup period.
The soft start operation period is internally fixed to approximately
7 ms, and the overcurrent protection (OCP) threshold voltage
steps up in five steps during this period. This reduces the voltage and current stress on the internal power MOSFET and on
the secondary-side rectifier. Because the Leading Edge Blanking
function (refer to the Constant Output Voltage Control section) is
disabled during the soft start period, the on-time may be the LEB
time, tBW = 390 ns or less. It is necessary to check and adjust the
OLP delay time and the VCC pin voltage during startup in actual
operation.
Barrier
Figure 7. Winding structural examples
VCC pin
voltage
Start up
Steady operation
VCC(ON)
VCC(OFF)
Time
Drain
Current,
ID
This ID is limited by
OCP operation
Time
Soft-start period with
7 ms fixed internally
Figure 8. Soft-start operation waveforms at startup
STR2W100D-AN Rev.3.1
SANKEN ELECTRIC CO., LTD.
10
Constant Output Voltage Control
For enhanced response speed and stability, current mode control
(peak current mode control) is used for constant voltage control
of the output voltage. This IC compares the voltage, VROCP , of
a current detection resistor with the target voltage, VSC , by the
internal FB comparator, and controls the peak value of VROCP so
that it gets close to VSC . VSC is generated by inputting the FB/
OLP pin voltage to the feedback control (see functional block
diagram) and adding the slope compensation value (refer to
figures 9 and 10).
• Light load conditions When load conditions become lighter,
the output voltage, VOUT , rises, and the feedback current from the
error amplifier on the secondary side also increases. The feedback
current is sunk at the FB/OLP pin, transferred through a photocoupler, PC1, and the FB/OLP pin voltage decreases. Thus, VSC
decreases, the peak value of VROCP is controlled to be low, and
3
5
FB/OLP
GND
S/OCP
STR2W100D
6
ROCP
VROCP
PC1
the peak drain current, ID , decreases. This control prevents the
output voltage from increasing.
• Heavy load conditions When load conditions become
greater, the control circuit performs the inverse operation to that
described above. Thus, VSC increases and the peak drain current
of ID increases. This control prevents the output voltage from
decreasing.
In the current-mode control method, when the drain current
waveform becomes trapezoidal in continuous operating mode,
even if the peak current level set by the target voltage is constant,
the on-time fluctuates based on the initial value of the drain
current. This results in the on-time fluctuating in multiples of
the fundamental operating frequency as shown in figure 11. It is
called the subharmonics phenomenon.
In order to suppress the subharmonics phenomenon, the IC
incorporates a slope compensation signal to the target voltage,
Vsc. Because the compensation signal is a down slope signal,
Vsc output on the FB/OLP pin goes down as the duty cycle rises,
reducing the controlled drain peak current. Even if subharmonic
oscillations occur when the IC has some excess supply being out
of feedback control, such as during startup and load shorted, this
does not affect performance during normal operation.
IFB
C3
Figure 9. FB/OLP peripheral circuit
VSC
–
VSC
VROCP
+ V
ROCP
S/OCP signal
voltage across ROCP
FB Comparator
ton1
Drain
Current,
ID
T
Figure 10. Drain current, ID, and FB comparator operation in
steady operation
STR2W100D-AN Rev.3.1
Target voltage without Slope Compensation
Target voltage including
Slope Compensation
ton2
T
T
Figure 11. Drain current, ID, waveform in subharmonic oscillation
SANKEN ELECTRIC CO., LTD.
11
In the current-mode control method, the FB comparator and/or
the OCP comparator may respond to the surge voltage resulting
from the drain surge current in turning-on the power MOSFET,
and may turn off the power MOSFET irregularly. Leading Edge
Blanking, tBW (390 ns), is built-in to prevent malfunctions caused
by surge voltage in turning-on the power MOSFET.
Automatic Standby Mode Function
Automatic Standby mode is activated automatically when the
drain current, ID , reduces under light load conditions at which ID
is less than 25% to 30% of the maximum drain current (it is in the
Overcurrent Protection state). The operation mode becomes burst
oscillation, as shown in figure 12.
Burst oscillation reduces switching losses and improves power
supply efficiency because of periodic non-switching intervals.
Generally, to improve efficiency under light load conditions, the
frequency of the burst oscillation becomes just a few kilohertz.
During the transition to burst-oscillation, if the VCC pin voltage decreases to VCC(BIAS) (9.5 V), the Bias Assist function is
activated and stabilizes the Standby mode operation, because
ISTARTUP is provided to the VCC pin so that the VCC pin voltage
does not decrease to VCC(OFF).
However, if the Bias Assist function is always activated during
Standby mode, the power loss increases. Therefore, the VCC pin
voltage should be more than VCC(BIAS) , for example, by adjusting the turns ratio between the auxiliary winding and secondary
winding and/or reducing the value of R2 in figure 6.
Random Switching Function
The IC modulates its switching frequency randomly within
Δf (5 kHz) superposed on the Average Operation Frequency,
fOSC(AVG) = 67 kHz. The conduction noise with this function is
smaller than that without this function, and this function can simplify noise filtering of the input lines of power supply.
Overcurrent Protection Function (OCP)
Overcurrent Protection Function (OCP) detects each peak drain
current level of the power MOSFET on pulse-by-pulse basis,
and limits the output power. This function incorporates the Input
Compensation function to reduce OCP point variation for the AC
input voltage, without any additional external components. This
OCP function detects the drain current by the current detection
resistor, ROCP , which is connected between the S/OCP pin and
the GND pin. When the voltage drops on both sides of ROCP
increase to the OCP threshold voltage, VOCP , the power MOSFET
is turned off.
Burst Oscillation mode
Output Current, IOUT
Less than a few kilohertz
Drain Current, ID
Normal Load
Standby Load
Normal Load
Figure 12. Automatic Standby mode operation
STR2W100D-AN Rev.3.1
SANKEN ELECTRIC CO., LTD.
12
ICs with PWM control usually have some detection delay time on
OCP detection. The steeper the slope of the actual drain current
at a high AC input voltage is, the later the actual detection point
is, compared to the internal OCP threshold voltage, VOCP . And
thus the actual OCP point limiting the output current usually has
some variation depending on the AC input voltage, as shown in
figure 13.
The IC incorporates a built-in Input Compensation function that
superposes a signal with a defined slope onto the detection signal
on the S/OCP pin as shown in figure 14. When AC input voltage
is lower and the duty cycle is longer, the OCP compensation level
increases. Thus the OCP point in low AC input voltage increases
to minimize the difference of OCP points between low AC input
voltage and high AC input voltage.
Because the compensation signal level is designed to depend
upon the on-time of the duty cycle, OCP threshold voltage after
compensation, VOCP(ontime) , is calculated as below. When the duty
cycle becomes 36% or more, OCP threshold voltage after compensation remains at VOCP(H) = 0.88 V, constantly.
VOCP(ontime) (V) = VOCP(L)(V) + DPC (mV/μs)
× On Time (μs).
(3)
where:
VOCP(L) is the OCP threshold voltage at zero duty cycle (V),
DPC is the OCP compensation coefficient (mV/μs), and
On Time is the the on-time of the duty cycle (μs): On Time =
(D / fOSC(AVG) )
When the auxiliary winding supplies the VCC pin voltage, the
OVP function is able to detect an excessive output voltage, such
as when the detection circuit for output control is open on the
secondary side, because the VCC pin voltage is proportional to
the output voltage.
The output voltage of the secondary side at OVP operation,
VOUT(OVP) , is calculated approximately as follows:
VOUT(OVP) =
VOUT(normal operation)
× 29 (V)
VCC(normal operation)
Variance resulting from
propagation delay
IOUT
Figure 13. Output current at OCP without input compensation
(4)
265VAC (as an example)
85VAC (for example)
0.88 V
0.9V
About 0.82V
ut
inp
C
A
t
Low
npu
Ci
A
h
Hig
STR2W100D-AN Rev.3.1
While OVP is active, because the Bias Assist function is disabled,
the VCC pin voltage falls below the Operation Stop Voltage,
VCC(OFF) (8.1 V). At that time, the UVLO (Undervoltage Lockout) circuit becomes active, stopping the control circuit and then
restarting it. Then, when the VCC pin voltage rises due to the
startup current and reaches the Operation Start Voltage, VCC(ON)
(15.3 V), the control circuit will return to normal operation again.
In this manner, the intermittent oscillation mode is operated by
the UVLO circuit repeatedly while there is an excess voltage
condition. By this intermittent oscillation operation, stress on the
internal and external circuits, such as the power MOSFET and the
secondary rectifier diode, is reduced. Furthermore, because the
switching period is shorter than an oscillation stop period, power
consumption under intermittent operation can be minimized.
When the fault condition is removed, the IC returns to normal
operation automatically.
VOCP(ontime) (Typical) (V)
VOUT
Overvoltage Protection Function (OVP)
When the voltage between the VCC pin and the GND pin
increases to VCC(OVP) = 29 V or more, the OVP function is activated and stops switching operation.
0.5V
0
0%
15%
36%
80%
Duty Cycle, D (%)
100%
Figure 14. Relationship of duty cycle and VOCP at fOSC(AVG) = 67 kHz
SANKEN ELECTRIC CO., LTD.
13
Overload Protection Function (OLP)
When the drain peak current is limited by OCP operation, the
output voltage, VOUT , decreases and the feedback current from
the secondary photo-coupler, IFB (see figure 15), becomes zero.
As a result, the FB/OLP pin voltage increases. When the FB/OLP
pin voltage increases to VFB(OLP) (8.1 V) or more, and remains at
that level for the OLP Delay Time, tOLP (68 ms) or more, the OLP
function is activated. It stops switching operation and reduces
stress on the power MOSFET, secondary rectifier, and so on.
When the OLP function is activated, the Bias Assist function is
disabled, as mentioned in the Overvoltage Protection Function
(OVP) section, and intermittent mode operation by the UVLO
circuit is performed repeatedly. When the fault condition is
removed, the IC returns to normal operation automatically.
Thermal Shutdown Function (TSD)
If the temperature of the Control Part of the IC reaches more than
the Thermal Shutdown Activating Temperature TJ(TSD) = 130°C
(min), the Thermal Shutdown function (TSD) is activated.
During TSD operation, the Bias Assist function is disabled, and
intermittent mode operation by the UVLO circuit is performed
repeatedly. If the factor causing the overheating condition is
removed, and the temperature of the Control Part falls below
TJ(TSD) , the IC returns to normal operation automatically.
Switching turns off
VCC Pin
Voltage
VCC(OFF)= 8.1V
VFB(OLP)= 8.1V
FB/OLP Pin
Voltage
Drain Current,
Switching
stopped
interval
GND FB/OLP
5
6
PC1
OLP Delay Time, tOLP
ID
C3
IFB
Figure 15. OLP operation waveforms (left), and FB/OLP pin peripheral circuit (right)
STR2W100D-AN Rev.3.1
SANKEN ELECTRIC CO., LTD.
14
Design Notes
Peripheral Components
Take care to use properly rated and proper type of components.
compensation. The value for C3 is recommended to be about
2200 pF to 0.01 μF.
• Input and output electrolytic capacitors
▫ Apply proper design margin to ripple current, voltage, and
temperature rise.
▫ Use of high ripple current and low impedance types, designed
for switch-mode power supplies, is recommended, depending
on their purposes.
• Transformer
▫ Apply proper design margin to core temperature rise by core
loss and copper loss.
▫ Because switching currents contain high frequency currents, the
skin effect may become a consideration.
▫ In consideration of the skin effect, choose a suitable wire gauge
in consideration of rms current and a current density of about
3 to 4 A/mm2.
▫ If measures to further reduce temperature are still necessary,
use paralleled wires or litz wires to increase the total surface
area of the wiring.
• Current detection resistor, ROCP
▫ A high frequency switching current flows to ROCP , and may cause
poor operation if a high inductance resistor is used.
▫ Choose a low inductance and high surge-tolerant type.
C3 should be connected close to the FB/OLP pin and the GND
pin, and should be selected based on actual operation in the
application.
PCB Trace Layout and Component Placement
PCB circuit trace design and component layout significantly
affect operation, EMI noise, and power dissipation. Therefore,
pay extra attention to these designs. In general, where high frequency current traces form a loop, as shown in figure 18, wide,
short traces, and small circuit loops are important to reduce line
impedance. In addition, earth ground traces affect radiated EMI
noise, and the same measures should be taken into account.
Switch-mode power supplies consist of current traces with high
frequency and high voltage, and thus trace design and component layouts should be done to comply with all safety guidelines.
Furthermore, because the incorporated power MOSFET has a
positive thermal coefficient of RDS(ON) , consider it when preparing a thermal design.
D2
Phase Compensation
A typical phase compensation circuit with a secondary shunt
regulator (U2) is shown in figure 16. The value for C7 is recommended to be about 0.047 to 0.47 μF, and should be selected
based on actual operation in the application.
Place C3 between the FB/OLP pin and the GND pin, as shown in
figure 17, to perform high frequency noise reduction and phase
1
D/ST
NC
4
V CC
C2
R2
T1
D
STR2W100D
S/OCP
3
ROCP
GND FB/OLP
5
6
C3
PC 1
L2
D4
T1
VOUT
Figure 17. FB/OLP peripheral circuit
R9
R4
PC1
R8
C6
S
R5
C8
C7
U2
R6
R7
GND
Figure 16. Peripheral circuit around secondary shunt regulator
STR2W100D-AN Rev.3.1
Figure 18. High-frequency current loops (hatched areas)
SANKEN ELECTRIC CO., LTD.
15
Figure 19 shows a circuit layout design example.
• ROCP Trace Layout
• S/OCP Trace Layout: S/OCP pin to ROCP to C1 to T1 (winding
P) to D/ST pin
ROCP should be placed as close as possible to the S/OCP pin. The
connection between the power ground of main trace and the control circuit ground should be connected by a single point ground
(A in figure 19) to remove common impedance, and to avoid
interference from switching currents to the control circuit.
This is the main trace containing switching currents, and thus it
should be as wide and short as possible.
If C1 and the IC are distant from each other, an electrolytic
capacitor or film capacitor (about 0.1 μF and with proper voltage
rating) near the IC or the transformer is recommended to reduce
impedance of the high frequency current loop.
Figure 19 also shows a circuit layout design example for the
secondary side.
• GND Trace Layout: GND pin to C2 (negative pin) and T1
(winding D) to R2 to D2 to C2 (positive pin) to VCC pin
This trace should be as wide as possible.
(1) Secondary Smoothing Circuit Trace Layout: T1 (winding S)
to D4 to C6
This trace also must be as wide and short as possible.
If the loop distance is lengthy, leakage inductance resulting from
the long loop may increase surge voltage at turning off a power
MOSFET.
If C2 and the IC are distant from each other, placing a capacitor
(approximately 0.1 to 1.0 μF (50 V) film capacitor) close to the
VCC pin and the GND pin is recommended.
Proper secondary trace layout helps to increase margin against
the power MOSFET breakdown voltage, and reduces stress on
the clamp snubber circuit and losses in it.
D4
T1
C5
R3
P
C1
D3
S
D2
D/ST
2
S/OCP
VCC
GND
FB/OLP
NC
STR
2W100D
1
C2
R2
D
C3
Main power circuit trace
GND trace for the IC
3 4 5 6 7
C4
C6
PC 1
ROCP
C9
A
Figure 19. Peripheral circuit example around the IC
STR2W100D-AN Rev.3.1
SANKEN ELECTRIC CO., LTD.
16
• The contents in this document are subject to changes, for improvement and other purposes, without notice. Make sure that this is the
latest revision of the document before use.
• Application and operation examples described in this document are quoted for the sole purpose of reference for the use of the products herein and Sanken can assume no responsibility for any infringement of industrial property rights, intellectual property rights or
any other rights of Sanken or any third party which may result from its use.
• Although Sanken undertakes to enhance the quality and reliability of its products, the occurrence of failure and defect of semiconductor products at a certain rate is inevitable. Users of Sanken products are requested to take, at their own risk, preventative measures
including safety design of the equipment or systems against any possible injury, death, fires or damages to the society due to device
failure or malfunction.
• Sanken products listed in this document are designed and intended for the use as components in general purpose electronic equipment or apparatus (home appliances, office equipment, telecommunication equipment, measuring equipment, etc.).
When considering the use of Sanken products in the applications where higher reliability is required (transportation equipment and
its control systems, traffic signal control systems or equipment, fire/crime alarm systems, various safety devices, etc.), and whenever
long life expectancy is required even in general purpose electronic equipment or apparatus, please contact your nearest Sanken sales
representative to discuss, prior to the use of the products herein.
The use of Sanken products without the written consent of Sanken in the applications where extremely high reliability is required
(aerospace equipment, nuclear power control systems, life support systems, etc.) is strictly prohibited.
• In the case that you use Sanken products or design your products by using Sanken products, the reliability largely depends on the
degree of derating to be made to the rated values. Derating may be interpreted as a case that an operation range is set by derating the
load from each rated value or surge voltage or noise is considered for derating in order to assure or improve the reliability. In general,
derating factors include electric stresses such as electric voltage, electric current, electric power etc., environmental stresses such
as ambient temperature, humidity etc. and thermal stress caused due to self-heating of semiconductor products. For these stresses,
instantaneous values, maximum values and minimum values must be taken into consideration.
In addition, it should be noted that since power devices or IC's including power devices have large self-heating value, the degree of
derating of junction temperature affects the reliability significantly.
• When using the products specified herein by either (i) combining other products or materials therewith or (ii) physically, chemically
or otherwise processing or treating the products, please duly consider all possible risks that may result from all such uses in advance
and proceed therewith at your own responsibility.
• Anti radioactive ray design is not considered for the products listed herein.
• Sanken assumes no responsibility for any troubles, such as dropping products caused during transportation out of Sanken's distribution network.
• The contents in this document must not be transcribed or copied without Sanken's written consent.
STR2W100D-AN Rev.3.1
SANKEN ELECTRIC CO., LTD.
17