VISHAY SILICONIX Power ICs and Power MOSFETs Application Note 836 Selection of MOSFETs for DC/DC Synchronous Buck Controllers: SiP12201 Single 10 A Controller and SiP12203 Triple Step Down Controller IC for 2 Synchronous and 1 Linear Power Rail Simon Foley This application note is intended to help designers select the best MOSFETs to use with the SiP12201 and SiP12203 synchronous buck dc-to-dc controller ICs. an input voltage range of 4.2 V to 26 V, an output voltage range of 0.6 V to 20 V, and a 500 kHz fixed switching frequency. The dead time and MOSFET driving capabilities of both ICs are similar as well. Thus the choice of MOSFETs for a particular dc-to-dc conversion application will be similar for each IC. The SiP12201 is a single 10 A controller (fig. 1a). The SiP12203 is a triple step down controller IC for 2 synchronous and 1 linear power rail (fig. 1b). Both a have V IN VL VIN BST DH LX V OUT DL Compensation Shutdown COMP/SD FB AGND AGND PGND PGND GND Document Number: 68952 02-Oct-08 www.vishay.com 1 APPLICATION NOTE Fig. 1a Application Note 836 Vishay Siliconix Selection of MOSFETs for DC/DC Synchronous Buck Controllers: SiP12201 Single 10 A Controller and SiP12203 Triple Step Down Controller IC for 2 Synchronous and 1 Linear Power Rail VL VIN EN2 D1 C1 C3 R4 D2 C2 C4 R3 C5 R2 Q1 R5 L1 Vo_2 AGND < 5.5 V R11 1 3 2 LX2 5 6 4 VL PG iSENSE2 iSENSE1 14 DH1 LX1 28 C6 R8 27 C9 26 25 R9 24 Q3 23 L2 22 Vo_1 C10 21 D3 DL1 BST1 PGND 13 DL2 20 FB3 U1 SiP12203 EN1 SYNC 12 15 FB1 16 CL1 SYNC_IN VIN 11 DH2 C7 + Q2 VIN R7 BST2 19 10 VIN FB2 AGND 17 AGND 18 COMP1 8 9 EN2 CL2 C8 COMP2 7 R6 R10 Q4 R12 C12 + C11 C14 C13 R15 Q5 R14 R18 C17 + C15 R16 Vo_LDO R17 C16 EN1 C18 APPLICATION NOTE Fig. 1b For the most efficient solution (duty cycle (δ) < 0.5), the high-side MOSFET would have the lowest Qg and Qgd rating (for the lowest VI power losses) and the low-side MOSFET would have the lowest RDS(on) and Qrr rating (for the lowest I²R losses). When the duty cycle is 0.5 then the RDS(on) and Qg values would be the same. However, this is not always practical, and the selection of high- and low-side MOSFETs thus depends on five key factors - input voltage, efficiency, size, output current, and cost. AN607 and AN608 covers gate losses and the switching characteristics of MOSFETs extensively. 1. Input voltage - this determines the max. VDS of MOSFET needed. 5 V input - VDS = 12 V or 20 V needed 12 V input - VDS = 20 V, 25 V, or 30 V needed etc….. 2. Efficiency - switching loses VI losses (Qgd) and conduction losses I²R losses (RDS(on)). This is covered comprehensively in Vishay's application note AN607. 3. Size - this depends on the current output, duty cycle and thermal properties of the MOSFET (Rth(j-c)) and pcb board (Rth(c-a)). www.vishay.com 2 4. Output current - this determines the package and RDS(on) needed and is covered below in "Choosing the Correct MOSFET" below. 5. Cost - this depends on the package, die size, and production volume. CHOOSING THE CORRECT MOSFETS Once the MOSFET VDS is chosen from the input voltage range, there is now a huge range of MOSFETs to choose from. To narrow the choice, follow these steps, each of which is described in further detail below: 1. Calculate the current requirement of the high- and low-side MOSFET. This will give an idea of smallest package needed. 2. Consider and calculate the thermal values from junction to ambient. 3. Calculate the maximum RDS(on) for the MOSFET at the required VGS, for the current handling required. 4. Considering Qg, Qgs, Qgd ratings for the high side MOSFET Q1. Document Number: 68952 02-Oct-08 Application Note 836 Vishay Siliconix Selection of MOSFETs for DC/DC Synchronous Buck Controllers: SiP12201 Single 10 A Controller and SiP12203 Triple Step Down Controller IC for 2 Synchronous and 1 Linear Power Rail 5. Determine requirements for shoot-through immunity. 6. Choose a device that improves efficiency at higher switching frequencies and light loads. 1. Calculating the Current Requirement of the MOSFET: High Side (Q1) and Low Side (Q2) Consider 12 V is converted to 3 V out at 10 A. A. Calculating the Duty Cycle: VOUT = VIN x t(on)/T = VIN δ e.g. a 12 V input with 3 V output would have a δ = 0.25 B. Calculating the Current Requirement of the MOSFET: High-side (controlling MOSFET) Q1 requirement = Io√δ e.g. RMS current = 10 A x √0.25 = 5 A RMS current Low-side (freewheel MOSFET) Q2 RMS current requirement = Io√1-δ e.g. RMS current = 10A x √1 - 0.25 = 8.66 A From this we can see that the smaller the duty cycle, the less RMS current the high-side MOSFET and the more the low-side MOSFET needs to handle. The RMS current requirement will give you an idea of the package needed. The following specifications are package limited: 60 A = PowerPAK® SO-8 and PolarPAK®50 A = PowerPAK 1212-8 3. Calculating the Max. RDS(on) at the required VGS The choice of RDS(on) value will depend on your requirements for efficiency, cost, and size. The lower the RDS(on), the higher the cost of the MOSFET, but the more efficient the dc-to-dc conversion. The bigger the package, the bigger the die which can fit into the package and therefore the bigger packages have the lowest RDS(on) ratings. We first need to calculate the highest RDS(on) for the application and consider that a lower RDS(on) will offer a more efficient solution. tj – ta R DS(on) max. = --------------------------------------------------------------------------------------------------------------------------------2 I max. × RK × R th(j-a) × δ K (duty cycle constant) For a rough RDS(on) this calculation can be used: tj – ta R DS(on) max. = -------------------------------------------------------2 I max. × 1.7 × R th(j-a) A. Tamb = ambient temperature (usually 25 °C for calculation) B. RK = increase in RDS(on) factor with respect to temperature (normally 1.6 to 1.8) (fig. 2). C. Rth(j-a) = thermal impedance junction to ambient for the MOSFET - controlled by package type and pcb (Rth(c-a)). There is a typical Rth(j-a) depending on the package preferred (fig. 3). Vishay recommends using the max. Rth(j-a) steady-state, to allow a safety margin. 12 A = PowerPAK ChipFET® 2. Consider and Calculate the Thermal Values from Junction To Ambient D. Max. junction temperature of the MOSFET (normally 150 °C). Junction to ambient thermal rating (Rth(j-a)) is the sum of the thermal rating junction to case (Rth(j-c) and case to ambient (Rth(c-a)). Rth(j-c) can be found on the MOSFET datasheet. This rating is fixed. However, the Rth(c-a) depends on the pcb and amount of copper used. The lower the Rth(j-a), the more current and more power dissipation the MOSFET can handle.* E. δ K = normal thermal impedance duty cycle constant depending on pulse duration (fig. 4). (Normalized) VGS = 10 V 1.3 VGS = 4.5 V 1.1 0.9 Pd Pd = 1.5 RDS(on) - On-Resistance tj ID = 15 A tj - ta R th(j-a) R th(j - a) 0.7 - 50 - 25 0 25 50 75 100 125 150 TJ - Junction Temperature (°C) ta Document Number: 68952 Revision: 02-Oct-08 Fig. 2 www.vishay.com 3 APPLICATION NOTE *The only figures that are "arbitrary" are when manufacturers use different Rth(j-a) for calculations. Although nominally based on the data sheet on a 1" copper PCB variation in this value is often seen. The only true thermal (Rth) figurers to compare different MOSFETs is the junction to case rating (Rth(j-c)). 1.7 Application Note 836 Vishay Siliconix Selection of MOSFETs for DC/DC Synchronous Buck Controllers: SiP12201 Single 10 A Controller and SiP12203 Triple Step Down Controller IC for 2 Synchronous and 1 Linear Power Rail THERMAL RESISTANCE RATINGS PARAMETER SYMBOL TYPICAL MAXIMUM t ≤ 10 s RthJA 19 24 Steady State RthJC 1.2 1.8 Maximum Junction-to-Ambient Maximum Junction-to-Case (Drain) UNIT °C/W Fig. 3 1 Normalized Effective Transient Thermal Impedance Duty Cycle = 0.5 0.2 0.1 Notes: 0.1 PDM 0.05 t1 t2 1. Duty Cycle, D = t1 t2 2. Per Unit Base = RthJA = 65 °C/W 0.02 3. TJM - TA = PDMZthJA(t) Single Pulse 4. Surface Mounted 0.01 10 -4 10 -3 10 -2 1 10 -1 Square Wave Pulse Duration (s) 10 100 1000 Fig. 4 Considering 12 V is converted to 3 V out at 10 A (50 °C ambient) and the low-side (freewheel MOSFET) RMS current requirement is 8.66 A 150 – 50 R DS(on) max. = ---------------------------------75 × 1.7 × 24 The rise in VGS during t2 (fig. 5) is brought about by charging Cgs and Cgd. During this time VDS does not change and as such Cgd and Cgs stay relatively constant, since they vary as a function of VDS. At this time Cgs is generally larger than Cgd and therefore the majority of the drive current flows into Cds rather than into Cgd. This current through Cgd and Cds depends on the time derivative of the product of the capacitance and its voltage. The gate charge can therefore be assumed to be Qgs. RDS(on) max. = 32.7 mΩ 3 Gate-Source Voltage (V) APPLICATION NOTE 4. Using Gate Charge to Determine Switching Time Qg VGS Qgd 1 Qgs 2 VGP Miller Plateau Gate Charge (nC) Fig. 5 www.vishay.com 4 Looking at the gate charge waveform in fig. 5, Qgs is defined as the charge from the origin, to the start of the Millar Plateau VGP. Qgd is defined as the charge from VGP to the end of the plateau. Qg is defined from the origin, to the point on the curve at which the driving voltage equals the actual gate voltage of the device. The next part of the waveform is the Miller Plateau. It is generally accepted that the point at which the gate charge figure goes into the plateau region coincides with the peak value of the peak current. However, the knee in the gate charge depends on the product of CgdVgd = Qgd, with respect to time. This means that there is a very small value of drain current and a large value of output impedance; thus the IDS can actually reach its maximum value after the knee occurs. Once the plateau is finished (when VDS reaches its on-state value), Cgd becomes constant again and the bulk of the Document Number: 68952 02-Oct-08 Application Note 836 Vishay Siliconix Selection of MOSFETs for DC/DC Synchronous Buck Controllers: SiP12201 Single 10 A Controller and SiP12203 Triple Step Down Controller IC for 2 Synchronous and 1 Linear Power Rail current flows into Cgs again. The gradient is not as steep as it was in the first period (t2), because Cgd is much larger and closer in magnitude to that of Cgs. IDS VGP VDS Second, there is a time when the transformer current travels through the bdd, before the low-side MOSFET turns on. At this time, there will be power losses in the diode (P = VI). Reducing the VF of the body drain diode, reduces this power loss. Vishay's SkyFETs offer a 38 % reduction in VF to 0.44 V, compared to 0.72 V for a standard TrenchFET. t3 t1 There is a demand for higher efficiency in point-of-load (POL) converters, especially at higher switching frequencies and light loads. One solution is to use a low-side MOSFET in parallel with a Schottky diode. This allows the current to flow through the diode before the low-side MOSFET turns on, reducing the losses of the body drain diode (bdd) in the MOSFET. Vishay's SkyFET® Power MOSFETs combine the MOSFET and Schottky in one monolithic die, with two major benefits over two-component (MOSFET and Schottky) solutions. First, the power losses associated with the reverse-recovery current in the low-side MOSFET are defined as VIN x Qrr x fsw. Therefore a reduction in Qrr (reverse recovery charge) reduces the power losses, proportional to the switching frequency. The Qrr of Vishay Siliconix SkyFETs is about 40 % lower than traditional trench MOSFETs. VGS Vth 6. Improving Efficiency at Higher Switching Frequencies and Light Loads t2 Fig. 6 5. Shoot-Through Immunity 93 The lower the Qgd/Qgs ratio in the low-side MOSFET, the more robust the synchronous buck will be to dV/dt shoot-through. A ratio of < 1 is a good indicator. 92 VGS, HS 91 90 Efficiency (%) VIN dV/dt Si4642DY, MOSFET with Integrated Schottky 89 88 87 Standard Trench MOSFET 86 85 84 83 mid-point 82 3 6 9 12 15 18 21 Load Current, I OUT (A) VGS, LS Cgs Fig. 7 Fig. 8 MOSFET with Integrated Schottky as Low Side Switch Efficiency Performance Comparison, 300 kHz VIN = 19 V, VOUT = 1.3 V At a 300 kHz switching frequency, the Si4624DY SkyFET, used as a low-side MOSFET, delivers improved efficiency compared to a standard trench MOSFET. (Fig. 8). Figure 9 highlights the improvement of efficiency at 550 kHz. Document Number: 68952 Revision: 02-Oct-08 www.vishay.com 5 APPLICATION NOTE Cgd Application Note 836 Vishay Siliconix Selection of MOSFETs for DC/DC Synchronous Buck Controllers: SiP12201 Single 10 A Controller and SiP12203 Triple Step Down Controller IC for 2 Synchronous and 1 Linear Power Rail 90 Si4642DY, MOSFET with Integrated Schottky 89 88 Efficiency (%) 87 86 85 84 83 Standard Trench MOSFET 82 81 80 79 78 3 6 9 12 15 18 21 Load Current, I OUT (A) Fig. 9 - MOSFET with Integrated Schottky as Low Side Switch Efficiency Performance Comparison, 550 kHz VIN = 19 V, VOUT = 1.3 V SUGGESTED DUAL VDS = 30 V MOSFET FOR < 6.5 A OUTPUT (PER CHANNEL) APPLICATION NOTE DEVICE PKG POL Si7994DP PowerPAK SO8 Dual N Si7218DN PowerPAK 1212-8 Dual N Si4816BDY SO8 Dual N Si4618DY SO8 Dual N Si4622DY SO8 Dual N Si4618DY SO8 Dual N VDS (V) VGS (V) RDS(ON) MAX. AT VGS (mΩ) QG TYP. AT 4.5 V (nC) QGS TYP. (nC) QGD TYP. (nC) 30 20 33 5 2.3 1.6 30 20 33 5 2.3 1.6 High Side 30 20 22.5 7.8 2.9 2.3 Low Side and Schottky 30 20 16 11.4 4.8 3.7 High Side 30 12 19.5 12.5 4.1 3.4 Low Side and Schottky 30 12 11.5 17 5.6 4 High Side 30 20 18.6 19 8 6 Low Side SKYFET 30 16 29 6 2.1 1.4 30 20 22 10.5 5 2.5 CONFIG. High Side Low Side High Side Low Side High Side www.vishay.com 6 Low Side and Schottky Document Number: 68952 02-Oct-08