LT3965 - 8-Switch Matrix LED Dimmer

LT3965
8-Switch Matrix LED
Dimmer
FEATURES
DESCRIPTION
Eight Independent 17V 330mΩ NMOS Switches
n Independent On/Off/Dimming Control of 1 to 4 LEDs
for Each Switch
n I2C Multidrop Serial Interface with Programmable
Open LED and Shorted LED Fault Reporting
n16 Unique I2C Addresses
n V
DD Range: 2.7V to 5.5V and VIN Range: 8V to 60V
n Digital Programmable 256:1 PWM Dimming
n Fade Transition Between PWM Dimming States
n Optional Internal Clock Generator or External Clock
Source for PWM Dimming
n Open LED Overvoltage Protection
n Flicker Free PWM Dimming
The LT®3965 is an LED bypass switching device for
dimming individual LEDs in a string using a common
current source. It features eight individually controlled
floating source 17V/330mΩ NMOS switches. The eight
switches can be connected in parallel and/or in series to
bypass current around one or more LEDs in a string. The
LT3965 uses the I2C serial interface to communicate with
the microcontroller. Each of the eight channels can be
independently programmed to bypass the LED string in
constant on or off, or PWM dimming with or without fade
transition. Using the fade option provides 11-bit resolution logarithmic transition between PWM dimming states.
The LT3965 provides an internal clock generator and also
supports external clock source for PWM dimming. The
LT3965 reports fault conditions for each channel such as
open LED and shorted LED. The four address select pins
allow 16 LT3965 devices to share the I2C bus. The device
is available in a 28-lead TSSOP package
n
APPLICATIONS
n
n
n
n
Automotive LED Headlight Clusters
Large LED Displays
Automated Camera Flash Equipment
RGBW Color Mixing Lighting
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
TYPICAL APPLICATION
Matrix LED Dimmer Powered by a Buck Mode LED Driver
750Ω
Q1
0.5Ω
VIN
40V
BIAS UVLO DETECT
Q2
BIAS
1k
49.9k
M1
1k
LED+
D4
BIAS
LED+
1µF
100V
D2
VIN
ISP
EN/UVLO
INTVCC
SYNC
LT3955
VREF
VMODE
FB
500mA
VLED
26V
GNDK
PGND
RT
28.7k
375kHz
DIM/SS
0.1µF
SW
VC
0.01µF
D1
IN4148
DRN8
SRC8
DRN7
SRC7
DRN6
SRC6
DRN5
SRC5
DRN4
SRC4
DRN3
SRC3
DRN2
SRC2
DRN1
1µF
GND
CTRL
1µF
50V
D3
0.1µF
100V
PWMOUT
PWM
2.2nF
28k
Q3
EN/UVLO
9.09k
20k
ISN
1k
L1
33µH
D5
LED–
SRC1
VIN
0.1µF
LT3965
VCC
5V
VDD
10k
10k
10k
SDA
SDA
SCL
SCL
ALERT
ALERT
EN/UVLO
RTCLK
EN/UVLO
28k
500Hz DIMMING FREQUENCY
ADDR1
ADDR2
ADDR3
ADDR4
GND
LEDREF
L1: WURTH 744066330
D1: DFLS260
D2, D3: CMSD6263S 2 IN 1 PACKAGE
D4, D5: PMEG6010CEH
M1: VISHAY Si7309DN
Q1, Q3: ZETEX FMMT593
Q2: ZETEX FMMT493
3965 TA01
3965f
For more information www.linear.com/LT3965
1
LT3965
ABSOLUTE MAXIMUM RATINGS
(Note 1)
VIN.............................................................................60V
VIN-SRC[8:1]...........................................................–0.3V
DRN[8:1]....................................................................60V
SRC[8:1].....................................................................60V
LEDREF......................................................................60V
DRN[8:1]-SRC[8:1] (Each Channel).................–0.3V, 25V
EN/UVLO....................................................................12V
VDD..............................................................................6V
SDA, SCL, ALERT............................. –0.3V to VDD + 0.3V
RTCLK..........................................................................6V
ADDR[4:1]....................................................................6V
Operating Junction Temperature Range (Note 2)
LT3965E/LT3965I................................... –40 to 125°C
Storage Temperature Range................... –65°C to 150°C
PIN CONFIGURATION
TOP VIEW
DRN8
1
28 SRC8
VIN
2
27 DRN7
EN/UVLO
3
26 SRC7
ALERT
4
25 DRN6
SCL
5
24 SRC6
SDA
6
23 DRN5
VDD
7
RTCLK
8
ADDR1
29
GND
22 SRC5
21 DRN4
9
20 SRC4
ADDR2 10
19 DRN3
ADDR3 11
18 SRC3
ADDR4 12
17 DRN2
LEDREF 13
16 SRC2
SRC1 14
15 DRN1
FE PACKAGE
28-LEAD PLASTIC TSSOP
θJC = 10°C/W
EXPOSED PAD (PIN 29) IS GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LT3965EFE#PBF
LT3965EFE#TRPBF
LT3965FE
28-Lead Plastic TSSOP
–40°C to 125°C
LT3965IFE#PBF
LT3965IFE#TRPBF
LT3965FE
28-Lead Plastic TSSOP
–40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. Some packages are available in 500 unit reels through
designated sales channels with #TRMPBF suffix.
3965f
2
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LT3965
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 40V, VDD = EN/UVLO = 5V, LEDREF = 3V, SRC = 0V, ADDR[4:1] not
connected, unless otherwise noted.
PARAMETER
CONDITIONS
VDD Input Supply Voltage
UNITS
1.3
1.8
mA
0.1
1
8
µA
µA
60
V
1
1.4
mA
All Channels VOTH[1:0] = VSTH[1:0] = “11”, LED OFF
2.5
3.3
mA
All Channels VOTH[1:0] = “11”, VSTH[1:0] = “00”,
LED ON (After Power-On Reset)
1.5
2
mA
EN/UVLO < 1.15V
0.1
1
µA
VIN – 3V
V
VDD Shutdown IQ
EN/UVLO < 0.4V
EN/UVLO = 1.15V
VIN Operating Voltage
All Channels VOTH[1:0] = VSTH[1:0] = “00” (Note 3)
VIN Operating IQ (Channel Not Switching)
All Channels VOTH[1:0] = VSTH[1:0] = “00”, LED ON
l
DRN[8:1] Operating Voltage
l
SRC[8:1] Operating Voltage
l
Channel LED Is On (Channel Switch Is Off)
Channel LED Is Off (Channel Switch Is On)
2.7
MAX
V
VDD Operating IQ
Current Out of SRC[8:1] Pins (Each Channel)
TYP
5.5
l
SCL = SDA =5V (I2C Bus Idle), RTCLK = 28k
VIN Shutdown IQ
MIN
8
9
40
l
l
Switch On-Resistance
VIN – 7.1V
V
13
55
µA
µA
330
Switch Leakage Current
DRN = 16V, VOTH[1:0] = 11
Switch Transition Time (tr/tf)
DRN to 10V through 50Ω Resistor
DRN[8:1] to SRC[8:1] Crowbar Protection
Clamp Voltage
LED or Switch Bypass Current is 500mA
Response Time from SW Crowbar Protection
to SW Secure Protection
mΩ
5
µA
0.5
0.65
µs
l
22
25
V
LED or Switch Bypass Current is 500mA
l
1
1.6
µs
Programmable Open LED Threshold (VOTH)
VOTH[1:0] = “00” (Note 3)
VOTH[1:0] = “01”
VOTH[1:0] = “10”
VOTH[1:0] = “11”
l
l
l
l
4.25
8.5
12.75
17
4.5
9
13.5
18
4.75
9.5
14.25
19
V
V
V
V
Programmable Shorted LED Threshold (VSTH)
for LEDREF = 0V
VSTH[1:0] = “00” (Note 3)
VSTH[1:0] = “01”
VSTH[1:0] = “10”
VSTH[1:0] = “11”
l
l
l
l
0.85
0.85
0.85
0.85
1
1
1
1
1.15
1.2
1.25
1.3
V
V
V
V
Programmable Shorted LED Threshold (VSTH)
for LEDREF = 3V
VSTH[1:0] = “00” (Note 3)
VSTH[1:0] = “01”
VSTH[1:0] = “10”
VSTH[1:0] = “11”
l
l
l
l
0.85
3.8
6.7
9.6
1
4
7
10
1.15
4.2
7.3
10.4
V
V
V
V
Programmable Shorted LED Threshold (VSTH)
for LEDREF ≥ 4V
VSTH[1:0] = “00” (Note 3)
VSTH[1:0] = “01”
VSTH[1:0] = “10”
VSTH[1:0] = “11”
l
l
l
l
0.85
4.7
8.5
12.3
1
5
9
13
1.15
5.3
9.5
13.7
V
V
V
V
l
1.15
1.24
1.35
EN/UVLO Threshold Voltage Falling
0.35
EN/UVLO Threshold Voltage Rising Hyst.
10
EN/UVLO Input Bias Current Low
EN/UVLO = 1.15V
EN/UVLO Input Bias Current High
EN/UVLO = 1.33V
2.2
V
mV
2.7
3.2
µA
10
100
nA
3965f
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3
LT3965
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 40V, VDD = EN/UVLO = 5V, LEDREF = 3V, SRC = 0V, ADDR[4:1] not
connected, unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
170
450
950
195
500
1090
220
550
1250
Hz
Hz
Hz
0.83
0.88
0.93
V
0.4
V
RTCLK Programmable Internal Oscillator or External Clock Source
LED PWM Dimming Frequency
(=RTCLK Programmed Oscillator
Frequency/2048 or External Clock
Frequency/2048)
RTCLK = 80.6kΩ
RTCLK = 28kΩ
RTCLK = 10kΩ
RTCLK Output Voltage (Using Internal
Oscillator)
RTCLK = 28kΩ
l
l
l
RTCLK Input Low Threshold
l
RTCLK Input High Threshold
l
1.5
V
RTCLK Input Clock Frequency
2.5
MHz
RTCLK Input Clock Pulse Width High
100
ns
RTCLK Input Clock Pulse Width Low
100
ns
Address Select
ADDR[4:1] Input Low
l
ADDR[4:1] Input High
l
0.25VDD
0.75VDD
300
ADDR[4:1] Pull-Up Resistance to VDD
V
V
500
700
kΩ
0.3
0.4
V
0.1
µA
Alert Status Output
ALERT Output Low Voltage
IALERT = 3mA
ALERT Output High Leakage Current
ALERT = 5.5V
External LED Reference Voltage for Shorted LED Detection
LEDREF Input Linear Range
LEDREF Input Bias Current
0V ≤ LEDREF ≤ 4V
0
4
V
–100
100
nA
I2C Port (See Note 5 for I2C Timing Diagram)
SDA and SCL Input Threshold Rising
l
SDA and SCL Input Threshold Falling
l
SDA and SCL Input Hysteresis
l
SDA and SCL Input Current
SDA = SCL = 0V to 5.5V
SDA Output Low Voltage
ISDA = 3mA
0.7VDD
V
0.25VDD
V
250
nA
0.4
V
400
kHz
0.05VDD
–250
l
V
SCL Clock Operating Frequency
l
(Repeated) Start Condition Hold Time (tHD_STA)
l
0.6
μs
Repeated Start Condition Set-Up Time (tSU_STA)
l
0.6
µs
Stop Condition Setup Time (tSU_STO)
l
0.6
Data Hold Time Output (tHD_DAT(O))
l
0
Data Hold Time Input (tHD_DAT(I))
l
0
ns
Data Set-Up Time (tSU_DAT)
l
100
ns
SCL Clock Low Period (tLOW)
l
1.3
µs
SCL Clock High Period (tHIGH)
l
μs
900
0.6
ns
μs
Data Rise Time (tr)
CB = Capacitance of One BUS Line (pF) (Note 4)
20 + 0.1CB
300
ns
Data Fall Time (tf)
CB = Capacitance of One BUS Line (pF) (Note 4)
20 + 0.1CB
300
ns
50
ns
1.3
µs
Input Spike Suppression Pulse Width (tSP)
Bus Free Time (tBUF)
l
3965f
4
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LT3965
ELECTRICAL CHARACTERISTICS
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LT3965E is guaranteed to meet performance specifications
from the 0°C to 125°C junction temperature. Specifications over the –40°C
to 125°C operating junction temperature range are assured by design,
characterization and correlation with statistical process controls. The
LT3965I is guaranteed over the full –40°C to 125°C operating junction
temperature range. High junction temperatures degrade operating
lifetimes. Operating lifetime is derated at junction temperatures greater
than 125°C.
Note 3: VOTH[1:0] and VSTH[1:0] register bits are set by LT3965 I2C
commands. VOTH/VSTH programmed by VOTH[1:0]/VSTH[1:0] refer to the
open/shorted LED threshold between DRN and SRC of a channel. For
a channel, VIN > VSRC + VOTH + 2.5V is required for accurate open LED
detection.
Note 4: Rise and fall times are measured at 30% and 70% levels.
Note 5: I2C interface timing diagram.
SDA
tSU,DAT
tSU,STA
tHD,DATO
tHD,DATI
tSP
tHD,STA
tSP
tBUF
tSU,STO
3965 TD
SCL
tHD,STA
REPEATED START
CONDITION
REPEATED START
CONDITION
TYPICAL PERFORMANCE CHARACTERISTICS
1.8
VIN Quiescent Current
vs Temperature
2.8
VDD = 5V
2.6
VIN, IQ (mA)
VDD, IQ (mA)
1.2
ALL SWITCHES ARE OFF
2.0
1.8
VOTH[1:0] = 11, VSTH[1:0] = 00,
SWITCHES ARE OFF
1.6
1.4
1.0
VOTH[1:0] = VSTH[1:0] = 00,
SWITCHES ARE OFF
1.2
1.0
0
1.27
VOTH[1:0] = VSTH[1:0] = 11,
SWITCHES ARE ON
2.2
ALL SWITCHES ARE ON
1.4
EN/UVLO Threshold
vs Temperature
VIN = 40V, LEDREF = 3V
2.4
1.6
0.8
–50 –25
TA = 25°C, unless otherwise noted.
25 50 75 100 125 150
TEMPERATURE (°C)
3965 G01
0.8
–50 –25
0
25 50 75 100 125 150
TEMPERATURE (°C)
3965 G02
1.26
EN/UVLO THRESHOLD (V)
VDD Quiescent Current
vs Temperature
START
CONDITION
STOP
CONDITION
1.25
RISING
1.24
FALLING
1.23
1.22
1.21
–50 –25
0
25 50 75 100 125 150
TEMPERATURE (°C)
3965 G03
3965f
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5
LT3965
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C, unless otherwise noted.
RTCLK vs PWM Dimming
Frequency
EN/UVLO Hysteresis Current
vs Temperature
3.0
PWM Dimming Frequency
vs Temperature
160
540
RTCLK = 28k
120
2.6
RTCLK (kΩ)
EN/UVLO CURRENT (µA)
2.8
DIMMING FREQUENCY (Hz)
140
2.4
100
80
60
40
2.2
520
500
480
20
2.0
–50 –25
0
0
25 50 75 100 125 150
TEMPERATURE (°C)
0
200
400
600
800
DIMMING FREQUENCY (Hz)
3965 G04
Shorted LED Threshold Falling vs
LEDREF
600
14
350
300
SHORTED LED THRESHOLD (V)
500
TRANSITION TIME (ns)
SWITCH ON-RESISTANCE (mΩ)
550
400
550
RISING
500
FALLING
450
250
200
–50 –25
0
400
–50 –25
25 50 75 100 125 150
TEMPERATURE (°C)
3965 G07
1.15
1.10
1.05
1.00
–50 –25
6
VSTH[1.0] = 01
4
VSTH[1.0] = 00
2
0
1
4.8
SRC = 0V
4.6
4.5
4.4
4.3
4.2
4
5
Open LED Threshold Rising vs VIN,
Temperature for VOTH[1:0] = 01
10
–50°C
25°C
150°C
4.7
2
3
LEDREF (V)
3965 G09
OPEN LED THRESHOLD (V)
1.35
4.9
OPEN LED THRESHOLD (V)
5.0
1.20
VSTH[1.0] = 10
8
0
25 50 75 100 125 150
TEMPERATURE (°C)
VSTH[1.0] = 11
10
Open LED Threshold Rising vs VIN,
Temperature for VOTH[1:0] = 00
1.40
1.25
0
VIN – SRC > 15V
12
3965 G08
Switch Open LED Protection
Response Time vs Temperature
1.30
25 50 75 100 125 150
TEMPERATURE (°C)
3965 G06
Switching Transition Time
vs Temperature
450
0
3965 G05
Switch On-Resistance
vs Temperature
RESPONSE TIME (µs)
460
–50 –25
1000
SRC = 0V
–50°C
25°C
150°C
9
8
7
4.1
0
25 50 75 100 125 150
TEMPERATURE (°C)
3965 G10
4.0
5 10 15 20 25 30 35 40 45 50 55 60
VIN VOLTAGE (V)
3965 G11
6
5 10 15 20 25 30 35 40 45 50 55 60
VIN VOLTAGE (V)
3965 G12
3965f
6
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LT3965
TYPICAL PERFORMANCE CHARACTERISTICS
18
OPEN LED THRESHOLD (V)
12.0
10.5
9.0
–50°C
25°C
150°C
7.5
6.0
16
14
12
10
6
5 10 15 20 25 30 35 40 45 50 55 60
VIN VOLTAGE (V)
3965 G13
4.1
4.0
3.9
3.8
7.5
6.5
6.0
3965 G15
Shorted LED Threshold Falling vs
VIN, Temperature for VSTH[1:0] = 11
11
SWITCH IS ON
30
20
10
SWITCH IS OFF
25 50 75 100 125 150
TEMPERATURE (°C)
3965 G19
LEDREF = 3V
SRC = 0V
10
9
8
7
6
10 15 20 25 30 35 40 45 50 55 60
VIN VOLTAGE (V)
3.0
RTCLK INPUT CLOCK FREQUENCY (MHz)
50
CURRENT OUT OF SRC (µA)
3965 G15
RTCLK Input Clock Frequency vs
Fading Time
40
5 10 15 20 25 30 35 40 45 50 55 60
VIN VOLTAGE (V)
–50°C
25°C
150°C
15
20
25
3965 G17
Current Out of SRC Pin vs
Temperature
0
–50°C
25°C
150°C
LEDREF = 3V
SRC = 0V
7.0
5.5
5 10 15 20 25 30 35 40 45 50 55 60
VIN VOLTAGE (V)
0
–50 –25
0.9
Shorted LED Threshold Falling vs
VIN, Temperature for VSTH[1:0] = 10
SHORTED LED THRESHOLD (V)
SHORTED LED THRESHOLD (V)
–50°C
25°C
150°C
LEDREF = 3V
SRC = 0V
1.0
0.8
5 10 15 20 25 30 35 40 45 50 55 60
VIN VOLTAGE (V)
55
PWM DIMMING END POINTS
0.4% AND 99.6%
2.6
50
30 35 40 45
VIN VOLTAGE (V)
50
55
60
3965 G18
RTCLK vs Fading Time
PWM DIMMING END POINTS
0.4% AND 99.6%
45
2.2
40
1.8
FADING UP
1.4
35
FADING DOWN
30
25
FADING UP
20
1.0
FADING DOWN
15
0.6
0.2
300
–50°C
25°C
150°C
LEDREF = 3V
SRC = 0V
1.1
3965 G14
Shorted LED Threshold Falling vs
VIN, Temperature for VSTH[1:0] = 01
4.2
–50°C
25°C
150°C
8
SHORTED LED THRESHOLD (V)
OPEN LED THRESHOLD (V)
13.5
1.2
SRC = 0V
SHORTED LED THRESHOLD (V)
20
SRC = 0V
Shorted LED Threshold Falling vs
VIN, Temperature for VOTH[1:0] = 00
Open LED Threshold Rising vs VIN,
Temperature for VOTH[1:0] = 11
RTCLK (kΩ)
15.0
Open LED Threshold Rising vs VIN,
Temperature for VOTH[1:0] = 10
TA = 25°C, unless otherwise noted.
10
450
750
600
900
FADING TIME (ms)
1050
1200
3965 G20
5
300
450
750
600
900
FADING TIME (ms)
1050
1200
3965 G21
3965f
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7
LT3965
PIN FUNCTIONS
VIN: Input Supply Pin for LED Bypass Switches and Fault
Detectors. Must be locally by-passed with a 1µF (or larger)
capacitor placed close to this pin. For proper channel switch
bypass operation, VIN must be at least 7.1V higher than
channel source voltage.
EN/UVLO: Shutdown and Undervoltage Detect Pin. An
accurate 1.24V (nominal) falling threshold with externally programmable hysteresis detects when VIN – SRC
is okay to enable the part. Rising hysteresis is generated
by an external resistor and an accurate internal 2.7µA
pull-down current. EN/UVLO going high (from below the
falling threshold to above the rising threshold) resets the
device to an initial power-on condition, which all registers
are loaded with a default value. Tie to 0.4V, or less, to disable the device and reduce VDD and VIN quiescent current
below 1µA. Typically this pin is tied to a PNP based level
shifter to ensure the part is enabled only when VIN is at
least 7.1V higher than channel source voltage.
ALERT: Alert Output for Fault Condition Report. ALERT pin
is asserted (pulled low) to indicate that an open LED fault
condition or/and a shorted LED fault condition or/and an
overheat fault condition are detected. The ALERT pin is
deasserted (released to high) after the part sends its Alert
Response Address successfully or the fault condition is
cleared by an I2C write command.
RTCLK: External PWM Clock Input and Internal Oscillator
Frequency Programming Pin. Set the internal oscillator
frequency using a resistor to GND if the internal oscillator
is used for PWM dimming. An external clock source able
to sink 500µA at 0.4V can be used for PWM dimming by
driving RTCLK above and below VIH and VIL respectively
to override the internal oscillator. Do not leave the RTCLK
pin open. Place the resistor close to the IC if a resistor is
used to set the internal oscillator frequency. LED PWM
dimming frequency equals the programmed internal oscillator frequency divided by 2048 or the external clock
frequency divided by 2048.
LEDREF: LED Reference Voltage Input. This pin is used to
set the normal operating VF of the LED. The shorted LED
threshold VSTH can be programmed through I2C Serial
Interface to one of the following four values: 1V, VLEDREF
+ 1V, 2 • VLEDREF + 1V and 3 • VLEDREF + 1V. Connecting
this pin to GND sets the shorted LED threshold to 1V.
The internal value of VLEDREF becomes fixed at 4V if more
than 4V is applied to this pin. Do not leave this pin open.
VDD: Supply Voltage for I2C Serial Port and Input Supply
Pin for Internal Bias and Logic. This pin sets the logic
reference level of I2C SCL and SDA pins. SCL and SDA
logic levels are scaled to VDD. When the VDD pin is 2.7V
or above, the I2C interface is active. The LT3965 will
acknowledge communications to its address and data
can be written to and read back from LT3965 registers.
This is true even if EN/UVLO is low. However, when EN/
UVLO goes high, the LT3965 resets all registers to default
values. Connect a 0.1μF (or larger) decoupling capacitor
from this pin to ground.
SCL: Clock Input Pin for the I2C Serial Port. The I2C logic
levels are scaled with respect to VDD.
SDA: Data Input and Output Pin for the I2C Serial Port. The
I2C logic levels are scaled with respect to VDD.
ADDR[4:1]: Programmable Address Select Pins. The device
address is 010xxxx0 for all channel mode (ACMODE) write,
010xxxx1 for all channel mode (ACMODE) read, 101xxxx0
for single channel mode (SCMODE) write, and 101xxxx1
for single channel mode (SCMODE) read. ADDR[4] is MSB
and ADDR[1] is LSB. A total of 16 LT3965 devices can
be connected to the same I2C bus. ADDR[4:1] are pulled
up to VDD through a 500k resistor inside the LT3965, so
ADDR[4:1] default value is 1111. Each bit of ADDR[4:1]
default value can be overwritten by connecting the pin to
the ground. For robust design, use an external resistor to
connect ADDR pins to VDD or to GND.
DRN[8:1]: Floating N-Channel FET Drain Side Pins. Tie to
VDD with a 100k resistor if not used.
SRC[8:1]: Floating N-Channel FET Source Side Pins. The
channel source voltage (SRC[8:1]) must be at least 7.1V
lower than VIN for proper channel switch bypass operation.
Tie to GND if not used.
GND: Exposed Pad Pin. Solder the exposed pad directly
to ground plane (GND).
3965f
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LT3965
BLOCK DIAGRAM
VIN
40V
2
LED+
VIN
CH8
C1
R3
LED
SW FAULT
8
R1
LED+
3
R2
+
–
CH7
1.24V
LED
SW FAULT
BANDGAP
REFERENCE
INTERNAL
BIAS
VDD
5V
7
6
SDA
DRN7
SRC7
CH6
LED
SW FAULT
VDD
DRN6
SRC6
CH5
R5
5
SCL
ADDR1
9
ADDR2
10
ADDR3
11
ADDR4
12
DRN5
SCL
I2C
SERIAL
INTERFACE
ADDR1
ADDR2
LED
SW FAULT
8
REGISTERS
AND
CONTROL
LOGIC
ADDR4
SRC5
CH4
LED
SW FAULT
DRN4
ALERT
4
ALERT
SRC4
CH3
LED
SW FAULT
SET LED FAULT
1.2V
0.6V
DRN3
SRC3
CH2
+
–
LED
SW FAULT
0
PWMCLK
DRN2
0.88V
DRIVER
SRC2
CH1
8
RT
RTCLK
LED
SW FAULT
+
–
DRN1
Figure 1. Block Diagram
For more information www.linear.com/LT3965
22
21
20
19
18
17
16
15
FAULT
DETECTOR
DRIVER
29
23
FAULT
DETECTOR
1
INTERNAL
OSCILLATOR
24
FAULT
DETECTOR
DRIVER
+
–
25
FAULT
DETECTOR
DRIVER
TSD SET OVERHEAT FAULT
–170°C
26
FAULT
DETECTOR
DRIVER
ADDR3
27
FAULT
DETECTOR
DRIVER
SDA
28
FAULT
DETECTOR
DRIVER
C2
R4
SRC8
EN/UVLO
IS1
2.7µA
1
FAULT
DETECTOR
DRIVER
Q1
R6
DRN8
LED FAULT
SRC1
LEDREF
13
14
3965 F01
LED–
3965f
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LT3965
APPLICATIONS INFORMATION
OVERVIEW
The LT3965 is an 8-channel LED bypass switching device with I2C serial interface, designed for dimming LED
strings using a common current source. Each of the eight
channels can be independently programmed to bypass
the LED string in constant on or off, or dimming with or
without fade transition. Operation can be best understood
by referring to the block diagram in Figure 1.
The LT3965 operates over the VDD input supply range
of 2.7V to 5.5V. The eight channel switches are powered
by the VIN input supply and can be connected in parallel
and/or in series. Each of the eight channel switches can
bypass one or more LEDs up to 17V in a string.
Each channel has an LED fault detector which can be programmed to detect an open LED fault at one of the four
threshold levels: 4.5V, 9V, 13.5V and 18V (default setting).
If EN/UVLO is high, when an open LED fault is detected in
a channel, the channel switch will be turned on to bypass
the faulty LED to maintain the continuity of the string and
for self protection. The PWM dimming for this channel is
interrupted until reset by the serial interface. With a proper
LED reference voltage (<4V) applied to the LEDREF pin, each
channel LED fault detector can be programmed to detect a
single-shorted LED fault (default setting), a 2-shorted LED
fault, a 3-shorted LED fault or a 4-shorted LED fault in a
multi-LED segment. When a shorted LED fault is detected
in a channel, the channel switch will continue with the programmed PWM dimming. Besides LED faults, the LT3965
also detects and reports an overheat fault condition (≥170°C).
The LT3965 asserts (pulls down) the ALERT pin to interrupt
the bus master when an LED fault and/or an overheat fault
is detected. The master can use the alert response address
(ARA) to determine which device is sending the alert.
The LT3965 I2C serial interface contains nine command
registers for configuring channel switches and LED fault
detectors. It also contains two read-only fault status registers for reporting the LED and overheat faults.
The I2C serial interface supports random addressing of any
register. The LT3965 address select pins ADDR4, ADDR3,
ADDR2 and ADDR1 allow up to 16 LT3965 devices to
share the I2C bus.
If a resistor is connected between the RTCLK pin and the
ground, the internal oscillator is chosen and the LED dimming
frequency is set by the resistor. If the RTCLK pin is driven by
an external clock source, the external clock source is used to
override the internal oscillator and the dimming frequency
equals the external clock frequency divided by 2048.
Details of the LT3965 operation are found in the following
sections.
EN/UVLO SHUTDOWN
The EN/UVLO pin resets the internal logic and controls
whether the LT3965 is enabled or is in shutdown state. In
the shutdown state, the serial interface is alive as long as
VDD is applied. Any data written while EN/UVLO is low will
be reset when it transitions high. The eight channel switches
are off and the alert function is disabled in shutdown condition. Because VIN must be at least 7.1V higher than the
channel source voltage for proper channel switch bypass
operation, it is recommended to enable the IC when VIN is
at least 7.1V higher than VLED+. The PNP based level shifter
shown in Figure 1 can be used to generate EN/UVLO input
signal. A micropower 1.24V reference, a comparator and
controllable current source, IS1, allow the user to accurately
program the VIN – VLED+ voltage at which the IC turns on
and off (see Figure 1). When EN/UVLO is above 0.7V, and
below the 1.24V threshold, the small pull-down current
source, IS1, (typical 2.7μA) is active. The purpose of this
current is to allow the user to program the rising hysteresis.
The typical falling threshold voltage and rising threshold
voltage can be calculated by the following equations:
(VIN – VLED+ )(FALLING) =1.24 •
R1
+ VBE
R2
(VIN – VLED+ )(RISING) = 2.7µA •R1+(VIN – VLED+ )(FALLING)
Typically VBE is 0.6V. The recommended value of R1 is 49.9k
and therefore the rising hysteresis is 0.14V. Then the value
of R2 can be chosen to ensure that (VIN – VLED+)(FALLING)
is greater than 7.1V when the part is enabled.
POWER-ON RESET AND DIMMING CYCLE
INITIALIZATION
When the EN/UVLO pin is toggled high, an internal poweron reset (POR) signal is generated to set all registers to
their default states. The eight channel switches are in off
3965f
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LT3965
APPLICATIONS INFORMATION
DIMMING WITHOUT FADE TRANSITION VS DIMMING
WITH FADE TRANSITION
The number of the transitional steps depends on the
distance between the initial value and the target value.
The maximum number of transitional steps from 1(/256)
dimming to 255(/256) dimming is 100 (see Figure 3) and
the maximum number of transitional steps from 255(/256)
dimming to 1(/256) dimming is 92 (see Figure 4). Each
step runs 4 PWM dimming cycles, and each dimming
cycle consists of 2048 RTCLK clock cycles. Then TSTEP =
TPWM • 4 = TRTCLK • 8192
256
100%
224
87.5%
192
75.0%
160
62.5%
128
50.0%
96
37.5%
64
25.0%
32
12.5%
0
0
20
40
60
NUMBER OF STEPS
80
PWM DIMMING (0.4% TO 99.6%)
Each channel of the LT3965 can be independently programmed to perform dimming without fade transition or
dimming with fade transition. For dimming without fade
transition, the dimming changes from the initial value to
the target value in one dimming cycle. For dimming with
fade transition, the dimming changes transitionally from the
initial value to the target value step by step in multiple dimming cycles, following a predetermined logarithmic curve,
which can favor the approximately logarithmic response of
the human eye to brightness. The initial value is an existing
8-bit dimming value stored in channel SCMREG register.
The target value comes from a SCMODE long format write
command and will be stored in the register to replace the
initial value when the STOP condition is received. For dim-
ming with fade transition, each transitional step value is
calculated using 11 bits according to the following formula:
DVNEXT = DVPRESENT • CF, where DV represents a transitional
step dimming value, CF is a constant factor. CF is 1.0625
for up transition and 0.9375 for down transition. The transition process begins with the initial value served as the first
DVPRESENT, and ends with the target value when the last
DVNEXT is no less than the target value in up transition or
no more than the target value in down transition.
DIMMING VALUE (1 TO 255)
state (all channel LEDs are on) upon the POR. The POR
also initializes each channel’s PWM dimming counter with
one-eighth dimming cycle shift, which can avoid simultaneous channel switching at the beginning of dimming
cycle to reduce switching transients (see Figure 2). When
in PWM dimming mode (with or without fade transition),
the channel LED string is always being turned on at the
beginning of its dimming cycle. The channel LED string
will be turned off if the value of the channel counter, which
is clocked by the internal oscillator or an external clock
source, equals the dimming value stored in the channel
SCMREG command register. Once the channel LED string is
turned off, it remains off until its next dimming cycle starts.
0%
100
3865 F03
Figure 3. LT3965 Up Transition Dimming Curve
POR
1 DIMMING CYCLE = 2048 RTCLK CLOCK CYCLES
1/256 DIMMING (8 CLOCK CYCLES)
CH1
PHASE SHIFT OF 1/8 DIMMING CYCLE = 256 CLOCK CYCLES
CH2
CH3
CH4
CH5
CH6
CH7
CH8
3965 F02
Figure 2. POR Dimming Cycle Initialization Diagram
3965f
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11
LT3965
256
100%
224
87.5%
192
75.0%
160
62.5%
128
50.0%
96
37.5%
64
25.0%
32
12.5%
0
0
20
40
60
NUMBER OF STEPS
80
PWM DIMMING (99.6% TO 0.4%)
DIMMING VALUE (255 TO 1)
APPLICATIONS INFORMATION
0%
100
3865 F04
Figure 4. LT3965 Down Transition Dimming Curve
LT3965 I2C REGISTERS
The LT3965 has nine command registers (see Table 1
and Table 2) and two read-only fault status registers (see
Table 3). The command registers are used to store the
configuration bits sent by a master. The fault status registers are used to store the LED/overheat fault status bits.
Both the command registers and the fault status registers
can be read by the master.
LT3965 COMMAND REGISTERS AND CHANNEL
CONTROL
Upon the POR with EN/UVLO, all eight channel switches are
set to off, which is controlled by the ACMREG register. After
data is written, each channel switch is controlled either by
the ACMODE register or by the channel SCMREG register,
depending on which register has been last updated (see
Figure 5). If SCMODE registers are dominant, the data in
the ACMODE register is retained until it is overwritten or
a POR occurs.
I2C SERIAL INTERFACE
The LT3965 communicates through an I2C serial interface.
The I2C serial interface is a 2-wire open-drain interface
supporting multiple slaves and multiple masters on a single
bus. Each device on the I2C bus is recognized by a unique
address stored in the device and can only operate either
as a transmitter or receiver, depending on the function of
the device. A master is the device which initiates a data
transfer on the bus and generates the clock signals to
permit the transfer. Devices addressed by the master are
considered slaves. The LT3965 can only be addressed as
a slave. Once addressed, it can receive configuration data
or transmit register contents. The serial clock line (SCL)
is always an input to the LT3965 and the serial data line
(SDA) is bidirectional. The LT3965 can only pull the serial
data line (SDA) LOW and can never drive it HIGH. SCL and
SDA are required to be externally connected to the VDD
supply through a pull-up resistor. When the data line is
not being driven LOW, it is HIGH. Data on the I2C bus can
be transferred at rates up to 100kbits/s in the standard
mode and up to 400kbits/s in the fast mode.
THE START AND STOP CONDITIONS
When the bus is idle, both SCL and SDA must be HIGH. A
bus master signals the beginning of a transmission with a
START condition by transitioning SDA from HIGH to LOW
while SCL is HIGH. When the master has finished communicating with the slave, it issues a STOP condition by
transitioning SDA from LOW to HIGH while SCL is HIGH.
The bus is then free for another transmission. However,
if the master still wishes to communicate on the bus, it
can generate a repeated START condition (Sr) and address the same or another slave without first generating
a STOP condition. When the bus is in use, it stays busy
if a repeated START (Sr) is generated instead of a STOP
condition. The repeated START (Sr) conditions are functionally identical to the START (S). Various combinations
of read/write commands are then possible within such
a transfer, except that the BCMODE write command for
dimming cycle synchronization and the BCMODE read command for alert inquiry and the ACMODE write command
for clearing the overheat fault bits must be self-contained
with a terminating STOP condition.
I2C SERIAL PORT DATA TRANSFER
After the START condition, the I2C bus is busy and data
transfer can begin between the master and the addressed
LT3965 slave. Data is transferred over the bus in group of
nine bits, one byte followed by one acknowledge (ACK) bit.
The acknowledge signal is used for handshaking between
the master and the slave.
When the LT3965 is written to, it acknowledges its device
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LT3965
APPLICATIONS INFORMATION
Table 1. All Channel Mode (ACMODE) Command Register (8 Bits Long. See All Channel Mode (ACMODE) Command section for how to
access this register).
NAME
ACMREG
B[7]
Control Bit
for CH8
B[6]
Control Bit
for CH7
B[5]
Control Bit
for CH6
B[4]
Control Bit
for CH5
B[3]
Control Bit
for CH4
B[2]
Control Bit
for CH3
B[1]
Control Bit
for CH2
B[0]
Control Bit
for CH1
1: LED On
0: LED Off
1: LED On
0: LED Off
1: LED On
0: LED Off
1: LED On
0: LED Off
1: LED On
0: LED Off
1: LED On
0: LED Off
1: LED On
0: LED Off
1: LED On
0: LED Off
DEFAULT
11111111
Table 2. Single Channel Mode (SCMODE) Command Registers (14 Bits Long. See Single Channel Mode (SCMODE) Command section for
how to access these register bits).
B[11:10]
B[13:12]
SHORTED LED
OPEN LED
B[9:8]
THRESHOLD PRO- THRESHOLD
B[7:0]
GRAMMABLE BITS PROGRAMMABLE BITS MODE CONTROL BITS
NAME
DIMMING VALUE
DEFAULT
VSTH[1:0] =
110001 00000001
SCMREG1
VOTH[1:0] =
MC[1:0] =
DV[7:0] =
“00”: 4.5V
“00”: 1V
“00”: LED Off
“00000001”: 1/256 Dimming
(for CH1,
“01”: 9.0V
“01”: VLEDREF + 1V
“01”: LED On
“00000010”: 2/256 Dimming
the channel
“10”: 2 • VLEDREF + 1V “10”: LED Dimming without Fade Transition …….
address: 000) “10”: 13.5V
“11”: 18.0V
“11”: 3 • VLEDREF + 1V “11”: LED Dimming with Fade Transition
“11111111”: 255/256 Dimming
SCMREG2
VSTH[1:0] =
110001 00000001
VOTH[1:0] =
DV[7:0] =
MC[1:0] =
“00”: 4.5V
“00”: 1V
“00000001”: 1/256 Dimming
“00”: LED Off
(for CH2,
“01”: 9.0V
“01”: VLEDREF + 1V
“00000010”: 2/256 Dimming
“01”: LED On
the channel
“10”: 2 • VLEDREF + 1V “10”: LED Dimming without Fade Transition …….
address: 001) “10”: 13.5V
“11”: 18.0V
“11”: 3 • VLEDREF + 1V “11”: LED Dimming with Fade Transition
“11111111”: 255/256 Dimming
SCMREG3
VSTH[1:0] =
110001 00000001
VOTH[1:0] =
MC[1:0] =
DV[7:0] =
“00”:
4.5V
“00”:
1V
“00”:
LED
Off
“00000001”:
1/256
Dimming
(for CH3,
“01”: 9.0V
“01”: VLEDREF + 1V
“01”: LED On
“00000010”: 2/256 Dimming
the channel
“10”:
13.5V
“10”:
“10”:
2
•
V
LED
Dimming
+
1V
without
Fade
Transition
…….
LEDREF
address:
“11”: 18.0V
“11”: 3 • VLEDREF + 1V “11”: LED Dimming with Fade Transition
“11111111”: 255/256 Dimming
010 )
VSTH[1:0] =
110001 00000001
VOTH[1:0] =
SCMREG4
MC[1:0] =
DV[7:0] =
“00”: 4.5V
“00”: 1V
“00”: LED Off
“00000001”: 1/256 Dimming
(for CH4,
“01”: 9.0V
“01”: VLEDREF + 1V
“01”: LED On
“00000010”: 2/256 Dimming
the channel
“10”: 2 • VLEDREF + 1V “10”: LED Dimming without Fade Transition …….
address: 011) “10”: 13.5V
“11”: 18.0V
“11”: 3 • VLEDREF + 1V “11”: LED Dimming with Fade Transition
“11111111”: 255/256 Dimming
SCMREG5
VSTH[1:0] =
110001 00000001
VOTH[1:0] =
MC[1:0] =
DV[7:0] =
“00”: 4.5V
“00”: 1V
“00”: LED Off
“00000001”: 1/256 Dimming
(for CH5,
“01”: 9.0V
“01”: VLEDREF + 1V
“01”: LED On
“00000010”: 2/256 Dimming
the channel
“10”: 2 • VLEDREF + 1V “10”: LED Dimming without Fade Transition …….
address: 100) “10”: 13.5V
“11”: 18.0V
“11”: 3 • VLEDREF + 1V “11”: LED Dimming with Fade Transition
“11111111”: 255/256 Dimming
SCMREG6
VSTH[1:0] =
110001 00000001
VOTH[1:0] =
MC[1:0] =
DV[7:0] =
“00”:
4.5V
“00”:
1V
“00”:
LED
Off
“00000001”:
1/256
Dimming
(for CH6,
“01”: 9.0V
“01”: VLEDREF + 1V
“01”: LED On
“00000010”: 2/256 Dimming
the channel
“10”:
13.5V
“10”:
“10”:
2
•
V
LED
Dimming
+
1V
without
Fade
Transition
…….
LEDREF
address: 101)
“11”: 18.0V
“11”: 3 • VLEDREF + 1V “11”: LED Dimming with Fade Transition
“11111111”: 255/256 Dimming
SCMREG7
VSTH[1:0] =
110001 00000001
VOTH[1:0] =
MC[1:0] =
DV[7:0] =
“00”: 4.5V
“00”: 1V
“00”: LED Off
“00000001”: 1/256 Dimming
(for CH7,
“01”: 9.0V
“01”: VLEDREF + 1V
“01”: LED On
“00000010”: 2/256 Dimming
the channel
“10”: 2 • VLEDREF + 1V “10”: LED Dimming without Fade Transition …….
address: 110) “10”: 13.5V
“11”: 18.0V
“11”: 3 • VLEDREF + 1V “11”: LED Dimming with Fade Transition
“11111111”: 255/256 Dimming
SCMREG8
VSTH[1:0] =
110001 00000001
VOTH[1:0] =
MC[1:0] =
DV[7:0] =
“00”:
4.5V
“00”:
1V
“00”:
LED
Off
“00000001”:
1/256
Dimming
(for CH8,
“01”: 9.0V
“01”: VLEDREF + 1V
“01”: LED On
“00000010”: 2/256 Dimming
the channel
“10”:
13.5V
“10”:
“10”:
2
•
V
LED
Dimming
+
1V
without
Fade
Transition
…….
LEDREF
address: 111)
“11”: 18.0V
“11”: 3 • VLEDREF + 1V “11”: LED Dimming with Fade Transition
“11111111”: 255/256 Dimming
Note: The dimming value range is 00000001 to 11111111. If the invalid dimming value 00000000 is received, 00000001 will be written to the register instead.
3965f
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13
LT3965
APPLICATIONS INFORMATION
Table 3. Read-Only Fault Status Register (See All Channel Mode (ACMODE) Command section and Single Channel Mode (SCMODE)
Command section for how to access these register bits).
NAME
OLFREG
B[7]
B[6]
1: Fault
0: No Fault
SLFREG
B[5]
B[4]
B[3]
B[2]
B[1]
B[0]
DEFAULT
Open LED
Open LED
Open LED
Open LED
Open LED
Open LED
Open LED
Open LED
00000000
Status Bit for Status Bit for Status Bit for Status Bit for Status Bit for Status Bit for Status Bit for Status Bit for
CH8
CH7
CH6
CH5
CH4
CH3
CH2
CH1
1: Fault
0: No Fault
1: Fault
0: No Fault
1: Fault
0: No Fault
1: Fault
0: No Fault
1: Fault
0: No Fault
1: Fault
0: No Fault
1: Fault
0: No Fault
Shorted LED Shorted LED Shorted LED Shorted LED Shorted LED Shorted LED Shorted LED Shorted LED 00000000
Status Bit for Status Bit for Status Bit for Status Bit for Status Bit for Status Bit for Status Bit for Status Bit for
CH8
CH7
CH6
CH5
CH4
CH3
CH2
CH1
1: Fault
0: No Fault
1: Fault
0: No Fault
1: Fault
0: No Fault
1: Fault
0: No Fault
1: Fault
0: No Fault
1: Fault
0: No Fault
1: Fault
0: No Fault
1: Fault
0: No Fault
B[0]
Note: The LT3965 sets all OLFREG and SLFREG register bits high to indicate the overheat fault condition (≥170°C). (See LED/Overheat Fault Detection and
Reporting section for detail.)
SCMREG1 (POR DEFAULT: 11 00 01 00000001)
B[1]
B[13:12]
TO CH2
B[11:10]
VOTH[1:0] VSTH[1:0]
B[9:8]
B[7]-B[0]
MC[1:0]
DV[7:0]
CLK
B[4]
TO CH5
B[5]
TO CH4
TO CH6
TO CH7
2 LED CONSTANT OFF
8
POR
TO CH3
B[6]
B[3]
B[2]
2
CHANNEL
COUNTER
11
LED CONSTANT ON
LED DWOFT
2
CHANNEL
COMPARATOR
DIMMING
CONTROL
LED DWFT
2
S
A
B
C
CHANNEL
LED FAULT
DETECTOR
DRN1
SRC1
S
A
O
O
TO CONTROL
CHANNEL
SWITCH
B
O = A IF S = 0
O = B IF S = 1
D
O = A IF S = 00
O = B IF S = 01
O = C IF S = 10
O = D IF S = 11
DWOFT: DIMMING WITHOUT FADE TRANSITION
DWFT: DIMMING WITH FADE TRANSITION
LEDREF
S = 0 IF POR OR ACMREG IS WRITTEN
S = 1 IF SCMREG1 IS WRITTEN
2
OPEN LED FAULT TO SET OLFREG B[0]
CH1
SHORTED LED FAULT TO SET SLFREG B[0]
CH2
↓
CH7
B[7]
•
•
•
•
•
•
ACMREG
1: LED ON 0: LED OFF
(POR DEFAULT: (11111111)
SCMREG8 (POR DEFAULT: 11 00 01 00000001)
B[13:12]
B[11:10]
VOTH[1:0] VSTH[1:0]
B[9:8]
B[7]-B[0]
MC[1:0]
DV[7:0]
2
CLK
2 LED CONSTANT OFF
8
POR
CHANNEL
COUNTER
11
LED CONSTANT ON
LED DWOFT
CHANNEL
COMPARATOR
2
DIMMING
CONTROL
LED DWFT
2
DWOFT: DIMMING WITHOUT FADE TRANSITION
DWFT: DIMMING WITH FADE TRANSITION
LEDREF
DRN8
SRC8
CHANNEL
LED FAULT
DETECTOR
S = 0 IF POR OR ACMREG IS WRITTEN
S = 1 IF SCMREG8 IS WRITTEN
2
OPEN LED FAULT TO SET OLFREG B[7]
S
A
B
C
O
S
A
O
TO CONTROL
CHANNEL
SWITCH
B
O = A IF S = 0
O = B IF S = 1
D
O = A IF S = 00
O = B IF S = 01
O = C IF S = 10
O = D IF S = 11
SHORTED LED FAULT TO SET SLFREG B[7]
CH8
3965 F05
Figure 5. LT3965 Command Registers and Channel Control Diagram
3965f
14
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LT3965
APPLICATIONS INFORMATION
I2C device address sent by a master. If the master issues
a write command, all the remaining bytes of the command
will be transmitted by the master. Otherwise, all the remaining bytes of the command will be transmitted by the
addressed LT3965 slave. The LT3965 I­2C commands can
be divided into three categories based on their purposes:
write address and subsequent data bytes. The data byte is
transferred to an internal holding latch upon the return of its
acknowledge by the LT3965. If desired a repeated START
(Sr) condition may be initiated by the master to address
another device on the I2C bus for data transfer. The LT3965
remembers the valid data it has received. Once selected
channels of the devices on the I2C bus have been addressed
and sent valid data, the master issues a STOP condition
to finish the communication. The LT3965 will update its
command registers with the data it has received upon the
STOP condition, except that the VOTH[1:0] and VSTH[1:0]
bits are updated in the channel SCMREG command register
upon the return of its acknowledge by the LT3965.
1) All Channel Mode (ACMODE) Command
The ACMODE write command (see Figure 6) is used to set
the ACMREG register bits (see Table 1) to control the eight
channel switches together. The command is two bytes
long. The first byte is the ACMODE device write address
and the second byte is the data byte to be written to the
ACMREG register.
When reading from the LT3965, the LT3965 acknowledges
its device read address and the master acknowledges
subsequent data bytes it has received except the last one
followed by a STOP or a repeated START condition.
The ACMODE read command (see Figure 7) is used to read
back the ACMREG register bits and to get the LED and
overheat fault conditions. The command is four bytes long.
The first byte is the ACMODE device read address followed
by three data bytes read respectively from the ACMREG
register, the OLFREG register and the SLFREG register.
The master can free the I2C bus by issuing a STOP condition after the data transfer. If desired the master can verify
the data bytes written to the internal holding latches prior
to updating them to the command registers by reading
them back before sending a STOP condition.
The LT3965 ACMODE device address is 010A4A3A2A1 followed by an eighth bit which is a data direction bit (R/W)—
a 0 indicates a write transmission (the master writes to
the addressed LT3965), a 1 indicates a read transmission
(the master reads from the addressed LT3965). A4A3A2A1
is an input logic value from the programmable address
select pins ADDR4, ADDR3, ADDR2 and ADDR1.
LT3965 I2C COMMANDS AND WRITE/READ
PROTOCOLS
Only a master can issue an I2C command to start a write
or read operation. The first command byte is always an
ACMODE DEVICE ADDRESS
0
1
0
DATA TO ACMREG
A4 A3 A2 A1 0(W)
B[7] B[6] B[5] B[4] B[3] B[2] B[1] B[0]
SLAVE
ACK
START
SDA
0
1
0
SCL
1
2
3
SLAVE
ACK STOP
0 SA
4
5
6
7
8
SA
9
1
2
3
4
5
6
7
8
9
3965 F06
Figure 6. LT3965 I2C Serial Port ACMODE Write Protocol
ACMODE DEVICE ADDRESS
0
1
0
A4 A3 A2 A1 1(R)
DATA FROM ACMREG
DATA FROM OLFREG
DATA FROM SLFREG
B[7] B[6] B[5] B[4] B[3] B[2] B[1] B[0]
B[7] B[6] B[5] B[4] B[3] B[2] B[1] B[0]
B[7] B[6] B[5] B[4] B[3] B[2] B[1] B[0]
SLAVE
ACK
START
SDA
0
1
0
SCL
1
2
3
MASTER
ACK
MASTER
ACK
MA
MA
1 SA
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
MASTER
NOT ACK STOP
MNA
1
2
3
4
5
6
7
8
9
3965 F07
Figure 7. LT3965 I2C Serial Port ACMODE Read Protocol
3965f
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LT3965
APPLICATIONS INFORMATION
ACMODE Write Command Latency
The SCMODE write command has two formats: short format (see Figure 8) and long format (see Figure 9). Both the
formats configure the channel SCMREG register. Choosing
the short format or the long format depends on which bits
of the channel SCMREG register you want to configure.
The ACMODE write command can be conveniently used
for quick status control of the eight channel LEDs. Each
ACMODE write command is two bytes long and takes
about 47µs to transmit if 400kHz SCL clock is chosen.
The command latency between the STOP condition and
channel switching on (LED turning off) is about 0.3µs,
and the command latency between the STOP condition
and channel switching off (LED turning on) is about 1µs.
Therefore, the minimum time from initiating to executing
an ACMODE write command is about 48µs if 400kHz SCL
clock is used.
The SCMODE write command short format can program
the channel open LED threshold by setting VOTH[1:0]
(B[13:12]) and change the channel switch mode by setting MC[1:0] (B[9:8]). The SCMODE write command long
format can program the channel shorted LED threshold
by setting VSTH[1:0] (B[11:10]) and change the channel
switch mode by setting MC[1:0] (B[9:8]) and set a new
dimming value by updating DV[7:0] (B[7:0]) in the channel
SCMREG register.
ACMODE Write Command and Simultaneous Channel
Switching
The SCMODE write command short format is two bytes
long (see Figure 8). The first byte is the SCMODE device
write address. The second byte consists of 3 sections—the
first section (bit 7) must be 0 to indicate the short format,
the second section (bit 6, bit 5 and bit 4) is the channel
address indicating which channel SCMREG register is
written to, the last section is the configuration data (bit 3,
bit 2 for VOTH[1:0] and bit 1, bit 0 for MC[1:0]).
The ACMODE write command can control all 8 channels
to switch together. It is possible to switch all LEDs from
on/off to off/on simultaneously using a single ACMODE
write command. A fast LED driver can respond well to a
sudden output voltage change caused by simultaneous
channel switching. An LED driver with slower response
may trigger false faults due to large transients in the
string current. When working with a slow LED driver, you
should avoid sending an ACMODE write command which
can cause simultaneous channel switching. Instead you
can use multiple ACMODE write commands, and each of
them makes one channel switch at a time.
The SCMODE write command long format is three bytes
long (see Figure 9). The first byte is the SCMODE device
write address. The second byte consists of 3 sections—the
first section (bit 7) must be 1 to indicate the long format,
the second section (bit 6, bit 5 and bit 4) is the channel
address indicating which channel SCMREG register is
written to, the last section is the configuration data (bit 3,
bit 2 for VSTH[1:0] and bit 1, bit 0 for MC[1:0]). The third
byte is the dimming value DV[7:0].
2) Single Channel Mode (SCMODE) Command
The SCMODE write command is used for setting the addressed channel SCMREG register bits to control the channel
switch and to set the channel LED fault detecting thresholds.
SHORT CHANNEL
FORMAT ADDRESS
SCMODE DEVICE ADDRESS
1
0
1
A4 A3 A2 A1 0(W)
DATA TO SCMREG
0 CA3 CA2 CA1 B[13]B[12] B[9] B[8]
SLAVE
ACK
START
SDA
1
0
1
SCL
1
2
3
4
5
6
7
SLAVE
ACK STOP
0 SA
0
8
1
9
SA
2
3
4
5
6
7
8
9
3965 F08
Figure 8. LT3965 I2C Serial Port SCMODE Write Short Format Protocol
3965f
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LT3965
APPLICATIONS INFORMATION
LONG CHANNEL
FORMAT ADDRESS
SCMODE DEVICE ADDRESS
1
0
1
A4 A3 A2 A1 0(W)
DATA TO SCMREG
SLAVE
ACK
START
SDA
1
0
1
SCL
1
2
3
4
5
6
7
DATA TO SCMREG
1 CA3 CA2 CA1 B[11]B[10] B[9] B[8]
SLAVE
ACK
0 SA
1
8
1
9
B[7] B[6] B[5] B[4] B[3] B[2] B[1] B[0]
SLAVE
ACK STOP
SA
2
3
4
5
6
7
8
9
SA
1
2
3
4
5
6
7
8
9
3965 F09
Figure 9. LT3965 I2C Serial Port SCMODE Write Long Format Protocol
Channel Open LED Threshold (VOTH) Programming
Channel Shorted LED Threshold (VSTH) Programming
By using the SCMODE write command short format, you
can overwrite B[13:12] bits (i.e., VOTH[1:0]) of the channel SCMREG register to program the channel open LED
threshold (refer to Table 2, Figure 8 and Figure 5).
By using the SCMODE write command long format, you
can overwrite B[11:10] bits (i.e., VSTH[1:0]) of the channel
SCMREG register to program the channel shorted LED
threshold (refer to Table 2, Figure 9 and Figure 5).
VOTH = 4.5V • (1 + VOTH[1:0])
VSTH = 1V + (NLED – 1) • VLEDREF
Where VOTH[1:0] represents the possible decimal value
0, 1, 2 or 3 of the two programmable bits. Therefore, the
channel open LED threshold VOTH can be programmed to
one of these four values: 4.5V, 9V, 13.5V and 18V. The
POR default VOTH is 18V.
NLED = 1 + VSTH[1:0]
When programming VOTH, please follow the advice below
to avoid false detection or missed detection of open LED
condition:
1)Do not set VOTH to a threshold equal to or greater than
the VIN supply voltage. It is recommended to set VOTH
to a threshold at least 3V lower than the VIN supply
voltage.
2)Set VOTH to the lowest threshold, but at least one-fifth
of the VOTH higher than the channel LED-on voltage. For
example, if channel LED-on voltage is 3.5V or less, to
set VOTH to 4.5V is preferred. If channel LED-on voltage
is 3.8V, to set VOTH to 9V is preferred.
It is recommended to adjust the VOTH from its default
value (18V) to a proper threshold based on the VIN supply voltage and each channel LED-on voltage, once the
application circuit is powered on.
Where NLED is the number of LEDs in series driven by the
channel, which is programmed by VSTH[1:0], and VLEDREF
is a reference voltage set by the LEDREF pin (refer to the
curve Shorted LED Threshold Falling vs LEDREF in Typical
Performance Characteristics).
If the LEDREF pin is set to a voltage other than 0V, the
channel shorted LED threshold VSTH can be programmed
to one of these four values: 1V, 1V + VLEDREF, 1V + 2 •
VLEDREF and 1V + 3 • VLEDREF. The POR default VSTH is
1V. By using this feature, each channel is able to detect
1, 2, 3, or 4 shorted LEDs.
This feature can be turned off by grounding the LEDREF
pin. When the LEDREF pin is set to 0V, the VSTH will be set
to 1V, no matter how the VSTH[1:0] bits are programmed.
The SCMODE read command (see Figure 10 and Figure 11)
is used to read back the addressed channel SCMREG
register bits and to get the channel LED fault conditions.
The SCMODE read command is three bytes long. The first
byte is the SCMODE device read address. The second byte
comprises (from MSB to LSB) one addressed channel bit
from the OLFREG register, one addressed channel bit from
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LT3965
APPLICATIONS INFORMATION
OPEN LED FAULT BIT FROM OLFREG
SHORTED LED FAULT BIT FROM SLFREG
SCMODE DEVICE ADDRESS
1
0
1
SDA
1
0
1
SCL
1
2
3
DATA FROM SCMREG
SLAVE
ACK
START
DATA FROM SCMREG
OL SL B[13]B[12] B[11]B[10] B[9] B[8]
A4 A3 A2 A1 1(R)
5
6
7
8
9
MASTER
NOT ACK STOP
MASTER
ACK
1 SA
4
B[7] B[6] B[5] B[4] B[3] B[2] B[1] B[0]
MA
1
2
3
4
5
6
7
8
MNA
9
1
2
3
4
5
6
7
8
9
3965 F10
Figure 10. LT3965 I2C Serial Port SCMODE Read Protocol
OPEN LED FAULT BIT FROM OLFREG
SCMODE DEVICE ADDRESS
1
0
1
SHORTED LED FAULT BIT FROM SLFREG
SHORT CHANNEL
FORMAT ADDRESS
A4 A3 A2 A1 0(W)
0 CA3 CA2 CA1 B[13] B[12] B[9] B[8]
1
0
1
SCL
1
2
3
4
5
6
7
0 SA
0
8
1
9
1
0
1
DATA FROM SCMREG
2
3
4
5
6
7
8
SA
1
0
1
9
1
2
3
4
5
6
7
DATA FROM SCMREG
OL SL B[13]B[12] B[11]B[10] B[9] B[8]
A4 A3 A2 A1 1(R)
SLAVE REPEATED
START
ACK
SLAVE
ACK
START
SDA
SCMODE DEVICE ADDRESS
DATA TO SCMREG
B[7] B[6] B[5] B[4] B[3] B[2] B[1] B[0]
SLAVE
ACK
MASTER
ACK
1
SA
MA
8
9
1
2
3
4
5
6
7
8
9
MASTER
NOT ACK STOP
MNA
1
2
3
4
5
6
7
8
9
3965 F11
Figure 11. LT3965 I2C Serial Port SCMODE Write Short Format Followed by SCMODE Read
the SLFREG register, and 6 bits (VOTH[1:0], VSTH[1:0] and
MC[1:0]) from the addressed SCMREG register. The third
byte is the dimming value DV[7:0] from the addressed
SCMREG register.
Unlike the SCMODE write command, the SCMODE read
command does not contain the channel address. Actually the channel address received from the last SCMODE
write command is stored and will be used as the channel
address for incoming SCMODE read operations. In other
words, a SCMODE read command always reads the channel SCMREG register addressed by the last SCMODE write
command. If no SCMODE write command has ever been
received, the default channel address 000 (CH1) is used.
The LT3965 SCMODE device address is 101A4A3A2A1 followed by an eighth bit which is a data direction bit (R/W)—
a 0 indicates a write transmission (the master writes to
the addressed LT3965), a 1 indicates a read transmission
(the master reads from the addressed LT3965). A4A3A2A1
is an input logic value from the programmable address
select pins ADDR4, ADDR3, ADDR2 and ADDR1.
3) Broadcast Mode (BCMODE) Command
The BCMODE write command (see Figure 12) is used
to synchronize the dimming cycles among the multiple
LT3965 slaves on the I2C bus. The LT3965 slaves must
be operating with a common external clock in order to
be synchronized. The BCMODE write command is only
one byte long: 00011000. The command does not modify
any register bits. It only resets each channel counter to
synchronize the dimming cycles.
The BCMODE read command (see Figure 13) is used to
inquire about which LT3965 slave on the bus is sending
the alert (see LT3965 Alert Response Protocol section for
detail). This command is two bytes long. The first byte is
the broadcast read address 00011001. The second byte
010A4A3A2A11 is sent by the alerting slave to indicate its
ACMODE device read address to the master. A4A3A2A1 is
an input logic value from the programmable address select
pins ADDR4, ADDR3, ADDR2 and ADDR1.
If the BCMODE read command is issued when no LT3965
slave on the bus is sending alert, the master receives no
acknowledgement.
3965f
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BCMODE DEVICE ADDRESS
0
0
0
1
1
0
0 0(W)
SLAVE
ACK STOP
START
SDA
0
0
0
1
1
0
0
0
SA
SCL
1
2
3
4
5
6
7
8
9
3965 F12
Figure 12. LT3965 I2C Serial Port BCMODE Write Protocol
ALERT RESPONSE ADDRESS FROM LT3965
BCMODE DEVICE ADDRESS
0
0
0
1
1
0
0
0 1(R)
1
0
A4 A3 A2 A1
SLAVE
ACK
START
1
MASTER
NOT ACK STOP
SDA
0
0
0
1
1
0
0
1
SA
0
1
0
SCL
1
2
3
4
5
6
7
8
9
1
2
3
1 MNA
4
5
6
7
8
9
3965 F13
Figure 13. LT3965 I2C Serial Port BCMODE Read Protocol
LT3965 ALERT RESPONSE PROTOCOL USING ALERT
RESPONSE ADDRESS (ARA)
In a system where several slaves share a common interrupt
line, the master can use the alert response address (ARA) to
determine which device initiated the interrupt. The master
initiates the ARA procedure with a START condition and
the special 7-bit ARA bus address (0001100) followed by
the read bit (R) = 1. If the LT3965 is asserting the ALERT
pin, it acknowledges and responds by sending its 7-bit
bus address (010A4A3A2A1) and a 1. While it is sending its
address, it monitors the SDA pin to see if another device
is sending an address at the same time using standard I2C
bus arbitration. If the LT3965 is sending a 1 and reads a
0 on the SDA pin on the rising edge of SCL, it assumes
another device with a lower address is sending and the
LT3965 immediately aborts its transfer and waits for the
next ARA cycle to try again. If transfer is successfully
completed, the LT3965 will deassert its ALERT pin and
will not respond to further ARA requests until a new alert
event occurs. Please note that the successfully completed
ARA cycle deasserts the ALERT pin only. It does not clear
the fault status bit set in the OLFREG/SLFREG register.
LED/OVERHEAT FAULT DETECTION AND REPORTING
The LT3965 detects and reports open LED, shorted LED
and overheat fault conditions via the ALERT pin and I2C
serial interface. (See the following sections for detail.)
OPEN LED FAULT DETECTION AND ALERT ASSERTION
An open LED fault will be triggered when the voltage
between the channel DRN pin and the channel SRC pin
exceeds 22V (nominal) or when the voltage between
the channel DRN pin and the channel SRC pin exceeds
the programmed open LED threshold but less than 22V
(nominal) for more than 15µs (nominal). Once an open
LED fault is triggered in a channel, the fault status bit
matching the channel will be set in the OLFREG status
register, which will cause the ALERT pin to be asserted
(pulled down) and the channel switch to be turned on for
the switch protection and to maintain continuity of the
string for good LEDs. The switch can be turned off and
PWM dimming reestablished by updating its registers
with the serial interface.
3965f
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LT3965
APPLICATIONS INFORMATION
SHORTED LED FAULT DETECTION AND ALERT
ASSERTION
A shorted LED fault will be triggered when the voltage
between the channel DRN pin and the channel SRC pin
falls below the programmed shorted LED threshold for
more than 15µs (nominal). Once a shorted LED fault is
triggered in a channel, the fault status bit matching the
channel will be set in the SLFREG status register, which
will cause the ALERT pin to be asserted (pulled down).
However, unlike the open LED fault, the channel switch
will continue with the programmed PWM dimming.
LED FAULT STATUS BIT CLEARANCE
The fault status bit set in the OLFREG/SLFREG register
by an open/shorted LED fault can only be cleared by an
ACMODE write command or a SCMODE write command
accessing the channel. If the open/shorted LED fault no
longer exists when the write command is updating the
command register at the I2C STOP condition, the fault
status bit matching the channel will be cleared and the
ALERT pin will be deasserted. Otherwise, the fault status
bit will remain set, and the ALERT pin will remain asserted
or be asserted again if previously deasserted.
and the ALERT pin will be deasserted. Otherwise, the fault
status bits will remain set, and the ALERT pin will remain
asserted or be asserted again if previously deasserted.
ALERT DEASSERTION
The LT3965 deasserts the ALERT pin in either of the following two situations:
1)The LT3965 has successfully completed the ARA
procedure initiated by the master. Please note that the
successfully completed ARA procedure does not clear
fault status bits. It only deasserts the ALERT pin.
2)The LT3965 has received an ACMODE or SCMODE write
command which cleared the fault status bits, resulting
in the ALERT pin deassertion.
PRINTED CIRCUIT BOARD LAYOUT
When laying out the printed circuit board, the following
checklist should be followed to ensure proper operation
of the LT3965:
1.Connect the exposed pad of the package (Pin 29) directly to a large ground plane to minimize thermal and
electrical impedance.
OVERHEAT FAULT DETECTION AND ALERT ASSERTION
2.Keep the LED connection traces as short as possible.
An overheat fault will be triggered when the IC temperature
exceeds 170°C. Once an overheat fault is triggered, all
status bits in both the OLFREG register and the SLFREG
register will be set, which will cause the ALERT pin to be
asserted (pulled down) and all eight channel switches to
be turned on (LEDs to be turned off) for cooling down
the system.
3.Place power supply bypass capacitors as close as possible to the supply pins.
OVERHEAT STATUS BITS CLEARANCE
The fault status bits set in the OLFREG register and the
SLFREG register by an overheat fault can only be cleared
by an ACMODE write command with all 1s in its data byte.
If the IC temperature is below 160°C when the ACMODE
write command is updating the ACMREG register at the
I2C STOP condition, the fault status bits will be cleared
4.Place the RTCLK resistor as close as possible to the IC
if a resistor is used to set LED dimming frequency.
Long Wires or Cables Between LT3965 and LEDs
The best practice is to place the LT3965 and the LEDs it
controls on the same PCB and to keep LED connection
traces as short as possible. Long wires (>>10cm) between
the LT3965 and the LEDs introduce parasitic inductance
that leads to an underdamped RLC response (ringing) in
the switching voltage when channel is switching on and
off. A meter of 30-gage wire can introduce about 1µH of
parasitic inductance. The ringing can trigger open LED
protection due to false open LED detection, and cause the
channel to bypass good LEDs. In extreme cases, the ring3965f
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LT3965
APPLICATIONS INFORMATION
ing may exceed absolute maximum ratings and damage
the part. The parasitic inductance also generates a step
voltage waveform (relative to GND) at the switches at the
frequency of the switching regulator. The magnitude of
this step waveform depends upon the current ripple in
the source and the parasitic inductance. The fast edges
of the step waveform can cause unintended toggling of
the LT3965’s switches.
RC snubber circuits (shown in Figure 14) can suppress
the ringing and allow use of wires up to 1 meter with no
false fault detection. The snubber should be placed close
to the IC. Please note that an 8-LED string requires 9
snubbers: one snubber across each of the 8 switches and
a snubber across all 8 switches (R9, C9). The 9th snubber
(R9, C9) softens the stepped waveform edges. With the
snubbers, the LT3965 can control the LEDs through a 1
meter ribbon cable (9 wires total) passing 0.5A with no
false faults detected. The snubber value shown here is
good for most applications.
Schottky Clamping Diode for LT3965 Protection
A Schottky clamping diode (D1 shown in Figure 15) connecting the top of the LED string (LED+ node) to the VIN
pin is required to guarantee that the absolute maximum
rating VIN – SRC ≥ –0.3V is met.
For the boost-buck configuration, where the voltage at
the LED string bottom (LED– node) may go below 0V, a
Schottky clamping diode (D2 shown in Figure 15) connecting the IC ground to the LED– node is required to
keep SRC ≥ –0.3V.
In applications with wires longer than 30cm, there is
potential for an open or shorted LED to cause ringing at
channel DRN-SRC beyond the absolute maximum rating of
–0.3V. The LT3965 can be protected by placing Schottky
clamping diodes (D3 to D10 shown in Figure 15) near the
IC across channel pins.
D1
LED+
DRN8
SRC8
VIN
C8
10nF
R8
10Ω
D3
SRC7
DRN6
D4
SRC6
DRN5
D5
SRC5
LT3965 DRN4
D6
SRC4
DRN3
D7
SRC3
DRN2
D8
SRC2
DRN1
D9
D7
DRN7
LT3965
SRC3
DRN2
SRC2
DRN1
SRC1
•
• UP TO 1 METER
•
•
•
•
C2
10nF
R2
10Ω
D3
D2
C1
10nF
R1
10Ω
IF NEEDED
SRC8
DRN7
D8
C9
10nF
R9
10Ω
DRN8
D1
LED+
D10
3965 F14
GND
SRC1
LED–
LED–
Figure 14. RC Snubbers In Long Wire Application
D2
3965 F15
Figure 15. Clamping Diode For LT3965 Protection
3965f
For more information www.linear.com/LT3965
21
LT3965
TYPICAL APPLICATIONS
Matrix LED Dimmer Powered by a Dual Buck Mode LED Driver with a Boost Pre-Regulator
BIAS = VOUT + INTVCC + 5V
VOUT
ISP1
5V
ISP2
ALERT SDA SCL
0.50Ω
500mA
22µF
4V
0.50Ω
500mA
10k
ISN1
ISN2
10k
TG1
10k
D6
M4
1µF
50V
D10
D11
D4
D5
500mA
0.1µF
16V
0.1µF
16V
0.1µF
50V
VLED
26V
0.1µF
50V
SYNC
VIN
9V TO 30V
L3
15µH
+
33µF
50V
D3
10µF
50V
10µF
50V
×2
M3
SRC1
LED1–
VDD VIN
10µF
50V
×2
43.2k
D1
SCL
SDA
SDA
ALERT
L1
33µH
ALERT
LT3965
CH1
49.9k
1M
1µF
50V
GATE3 SENSEP3 SENSEN3
VIN
TG3
ISP3 ISN3
LT3965
CH2
VOUT
1k
Q1
EN/UVLO
EN/UVLO
ADDR1
ADDR1
9.09k
ADDR2
ADDR2
ADDR3
ADDR3
ADDR4
ADDR4
LEDREF
LEDREF
RTCLK
RTCLK
5V
M1
VIN
0.1µF
10V
500mA
VLED
26V
SRC1
GND
LED2–
D9
350kHz SYNC
OUT
SET
499k
10k
RT
SENSEN1 SENSEP1 GATE1
SS3
47.5k
SYNC GATE2 SENSEP2 SENSEN2
TG1-2
ISP1-2
FLT1-3 SW1 SW2
L4
47µH
1µF
INTVCC
L1, L2: WURTH ELECTRONICS 7447789133
L3: WURTH ELECTRONICS 7443551151
L4: COOPER BUSSMANN SD25-470-R
10µF
50V
×2
ISN1-2
SS1-2
0.22µF
D2
0.05Ω
LT3797
EN/UVLO
PWM1-3 VREF CTRL3 CTRL1-2
69.8k
44.2k
FBH2
M2
DIV
0.05Ω
FBH3
1M
L2
33µH
LTC6900
GND
60.4k
0.02Ω
LED2+
DRN8
SRC8
DRN7
SRC7
DRN6
SRC6
DRN5
SRC5
DRN4
SRC4
DRN3
SRC3
DRN2
SRC2
DRN1
BIAS
GND
M5
1µF
50V
SCL
D8
44.2k
1M
FBH1
D7
1µF
VIN VDD
DRN8
SRC8
DRN7
SRC7
DRN6
SRC6
DRN5
SRC5
DRN4
SRC4
DRN3
SRC3
DRN2
SRC2
DRN1
TG2
5V
1µF
10V
LED1+
INTVCC
22µF
4V
D1, D2: DIODES DFLS260
D3: DIODES PDS360
D4, D5, D10, D11: CENTRAL SEMI CMSD6263S
2 IN 1 PACKAGE
D6, D7: NXP SEMI PMEG6010CEH
D8, D9: NXP SEMI PMEG4010CEH
Q1: ZETEX FMMT591
M1, M2: VISHAY Si7308DN
M3: VISHAY Si7850DP
M4, M5: VISHAY Si7309DN
BOOST
INTVCC
10µF
0.1µF
INTVCC
GND VC1-2
FBH1-2
VC3
5.7k
2.2nF
15k
1nF
22nF
3965 TA02
3965f
22
For more information www.linear.com/LT3965
LT3965
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/product/LT3965#packaging for the most recent package drawings.
FE Package
28-Lead Plastic TSSOP (4.4mm)
(Reference LTC DWG # 05-08-1663 Rev K)
Exposed Pad Variation EA
9.60 – 9.80*
(.378 – .386)
7.56
(.298)
7.56
(.298)
28 2726 25 24 23 22 21 20 19 18 1716 15
6.60 ±0.10
4.50 ±0.10
3.05
(.120)
SEE NOTE 4
0.45 ±0.05
EXPOSED
PAD HEAT SINK
ON BOTTOM OF
PACKAGE
6.40
3.05 (.252)
(.120) BSC
1.05 ±0.10
0.65 BSC
RECOMMENDED SOLDER PAD LAYOUT
4.30 – 4.50*
(.169 – .177)
0.50 – 0.75
(.020 – .030)
0.09 – 0.20
(.0035 – .0079)
NOTE:
1. CONTROLLING DIMENSION: MILLIMETERS
2. DIMENSIONS ARE IN MILLIMETERS
(INCHES)
3. DRAWING NOT TO SCALE
1 2 3 4 5 6 7 8 9 10 11 12 13 14
0.25
REF
1.20
(.047)
MAX
0° – 8°
0.65
(.0256)
BSC
0.195 – 0.30
(.0077 – .0118)
TYP
0.05 – 0.15
(.002 – .006)
FE28 (EA) TSSOP REV K 0913
4. RECOMMENDED MINIMUM PCB METAL SIZE
FOR EXPOSED PAD ATTACHMENT
*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.150mm (.006") PER SIDE
3965f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection
of its circuits
as described
herein will not infringe on existing patent rights.
For more
information
www.linear.com/LT3965
23
LT3965
TYPICAL APPLICATION
Matrix LED Dimmer Powered by a Boost-Buck LED Driver
D4
D5
D3
BIAS
10V
1µF
50V
0.1µF
100V
VIN
100k
10k
VDD
10µF
10V EN/UVLO
10k
LT3965
EN/UVLO
SDA
SDA
SCL
SCL
ALERT
ALERT
350kHz SYNC
(170Hz PWM)
RTCLK
ADDR1
ADDR2
ADDR3
ADDR4
LEDREF
ISN 4V ISP
22µF
M1
0.25Ω
LED+
DRN8
SRC8
DRN7
SRC7
DRN6
SRC6
DRN5
SRC5
DRN4
SRC4
DRN3
SRC3
DRN2
SRC2
DRN1
SW
5V
TG
BIAS UVLO DETECT
BIAS
49.9k
LED+
8 LEDs
25V
500mA
Q2
EN/UVLO
9.09k
365k
SRC1
GND
1k
LED–
10k
Q1
5V
D6
D2
LT3470
5V REGULATOR
VIN
6V TO 18V
L1
22µH
10µF
25V
EN/UVLO
D1
FB
OVLO
TG
VREF
130k
LT3952
PWM
CTRL
69.8k
1.5k
SYNC/SPRD
IVINCOMP
OPENLED
SHORTLED
INTVCC
SS
RT
0.1µF
6.8nF
ISP
ISN
ISMON
DIM
VC
4.7µF
50V
VIN IVINP IVINN SW
GND
64.9k
0.1µF
SW
1µF
25V
249k
D1, D6: DIODES DFLS260
D2, D3: NXP SEMI PMEG6010CEH
D4, D5: CENTRAL SEMI CMSD6263S
2 IN 1 PACKAGE
L1: WURTH 74437349220 22µH
L2: WURTH 74408943330 33µH
Q1, Q2: ZETEX FMMT591
M1: VISHAY Si7415DN
L2
33µH
340k
14.7k
TG
ISP
ISN
ISMON
350kHz
SYNC
DIV
INTVCC
V+
GND
LTC6900
OUT
SET
0.1µF
60.4k
OPENLED
SHORTLED
INTVCC
100k
100k
2.2µF
3965 TA03
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT3795
High Side 110V, 1MHz LED Driver with 3000:1 PWM
VIN: 4.5V to 110V, VOUT(MAX) = 110V, 3000:1 PWM, 20:1 Analog, ISD < 1µA,
Dimming with Spread Spectrum Frequency Modulation TSSOP-28E Package
LT3952
60V, 4A LED Driver with 4000:1 PWM Dimming with
Spread Spectrum
VIN: 3V to 42V, VOUT(MAX) = 60V, 4000:1 PWM, 20:1 Analog, ISD < 1µA,
TSSOP-28E Package
LT3797
Triple Output LED Driver Controller with 3000:1 PWM
Dimming
VIN: 2.5V to 90V, VOUT(MAX) = 100V, 3000:1 PWM, 20:1 Analog, ISD < 1µA,
7mm × 8mm QFN-52 Package
LT3756/LT3756-1/ High Side 100V, 1MHz LED Controller with 3000:1
LT3756-2
PWM Dimming
VIN: 6V to 100V, VOUT: 5V to 100V, 3000:1 PWM, 20:1 Analog, ISD < µA,
3mm × 3mm QFN-16 and MSOP-16E Packages
3965f
24 Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
For more information www.linear.com/LT3965
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com/LT3965
LT 0216 • PRINTED IN USA
 LINEAR TECHNOLOGY CORPORATION 2016