RFD3055, RFD3055SM, RFP3055
Data Sheet
July 1999
12A, 60V, 0.150 Ohm, N-Channel Power
MOSFETs
• 12A, 60V
Formerly developmental type TA49082.
• rDS(ON) = 0.150Ω
• Temperature Compensating PSPICE® Model
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
• 175oC Operating Temperature
• Related Literature
- TB334 “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
Ordering Information
PACKAGE
3648.2
Features
These are N-Channel enhancement mode silicon gate
power field effect transistors. They are advanced power
MOSFETs designed, tested, and guaranteed to withstand a
specified level of energy in the breakdown avalanche mode
of operation. All of these power MOSFETs are designed for
applications such as switching regulators, switching
convertors, motor drivers, relay drivers, and drivers for high
power bipolar switching transistors requiring high speed and
low gate drive power. These types can be operated directly
from integrated circuits.
PART NUMBER
File Number
D
BRAND
RFD3055
TO-251AA
FD3055
RFD3055SM
TO-252AA
FD3055
RFP3055
TO-220AB
FP3055
G
S
NOTE: When ordering, use the entire part number. Add the suffix 9A,
to obtain the TO-252AA variant in tape and reel, i.e. RFD3055SM9A.
Packaging
JEDEC TO-251AA
JEDEC TO-252AA
SOURCE
DRAIN
GATE
DRAIN (FLANGE)
DRAIN (FLANGE)
GATE
SOURCE
JEDEC TO-220AB
SOURCE
DRAIN
GATE
DRAIN (FLANGE)
4-435
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
PSPICE® is a registered trademark of MicroSim Corporation.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
RFD3055, RFD3055SM, RFP3055
Absolute Maximum Ratings
TC = 25oC, Unless Otherwise Specified
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDSS
Drain to Gate Voltage (RGS = 20KΩ) (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . VDGR
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VGS
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM
Single Pulse Avalanche Rating (Figures 14, 15) . . . . . . . . . . . . . . . . . . . . . . . . . . IAS
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .PD
Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TJ , TSTG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . TL
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg
RFD3055, RFD3055SM, RFP3055
60
60
±20
12
Refer to Peak Current Curve
Refer to UIS Curve
53
0.357
-55 to 175
UNITS
V
V
V
A
A
300
260
oC
oC
W
W/oC
oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. TJ = 25oC to 150oC.
Electrical Specifications
TC = 25oC, Unless Otherwise Specified
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
-
-
V
Drain to Source Breakdown Voltage
BVDSS
ID = 250µA, VGS = 0V (Figure 11)
60
Gate Threshold Voltage
VGS(TH)
VGS = VDS, ID = 250µA (Figure 10)
2
-
4
V
VDS = Rated BVDSS, VGS = 0V
-
-
1
µA
TC = 125oC, VDS = 0.8 x Rated BVDSS
-
-
25
µA
Zero Gate Voltage Drain Current
IDSS
VGS = ±20V
-
-
100
nA
ID = 12A, VGS = 10V (Figure 9) (Note 2)
-
-
0.150
Ω
VDD = 30V, ID = 12A
RL = 2.5Ω, VGS = +10V
RG = 10Ω
(Figure 13)
-
-
40
ns
-
7
-
ns
-
21
-
ns
td(OFF)
-
16
-
ns
tf
-
10
-
ns
tOFF
-
-
40
ns
Gate to Source Leakage Current
IGSS
Drain to Source On Resistance
rDS(ON)
Turn-On Time
tON
Turn-On Delay Time
td(ON)
Rise Time
tr
Turn-Off Delay Time
Fall Time
Turn-Off Time
Total Gate Charge
Qg(TOT)
VGS = 0 to 20V
Gate Charge at 10V
Qg(10)
VGS = 0 to 10V
Threshold Gate Charge
Qg(TH)
VGS = 0 to 2V
Input Capacitance
CISS
Output Capacitance
COSS
Reverse Transfer Capacitance
CRSS
Thermal Resistance Junction to Case
RθJC
Thermal Resistance Junction to Ambient
RθJA
VDD = 48V,ID = 12A,
RL = 4Ω,
Ig(REF) = 0.24mA
(Figure 13)
VDS = 25V, VGS = 0V,
f = 1MHz (Figure 12)
-
19
23
nC
-
10
12
nC
-
0.6
0.8
nC
-
300
-
pF
-
100
-
pF
-
30
-
pF
-
-
2.8
oC/W
TO-251 and TO-252
-
-
100
oC/W
TO-220
-
-
62.5
oC/W
Source to Drain Diode Specifications
PARAMETER
SYMBOL
Source to Drain Diode Voltage
Reverse Recovery Time
VSD
trr
MIN
TYP
MAX
UNITS
ISD = 12A
TEST CONDITIONS
-
-
1.5
V
ISD = 12A, dISD /dt = 100A/µs
-
-
100
ns
NOTES:
2. Pulse Test: Pulse Width ≤ 300ms, Duty Cycle ≤ 2%.
3. Repetitive Rating: Pulse Width limited by max junction temperature. See Transient Thermal Impedance Curve (Figure 3) and Peak Current
Capability Curve (Figure 5).
4-436
RFD3055, RFD3055SM, RFP3055
Unless Otherwise Specified
1.2
14
1.0
12
ID , DRAIN CURRENT (A)
POWER DISSIPATION MULTIPLIER
Typical Performance Curves
0.8
0.6
0.4
10
8
6
4
0.2
2
0
0
0
25
50
75
100
125
TC , CASE TEMPERATURE (oC)
150
25
175
75
100
125
150
175
TC , CASE TEMPERATURE (oC)
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
1
THERMAL IMPEDANCE
ZθJC, NORMALIZED TRANSIENT
50
0.5
PDM
0.2
0.1
0.1
t1
0.05
0.02
0.01
t2
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJC x RθJC + TC
SINGLE PULSE
0.01
10-5
10-4
10-3
10-2
10-1
100
101
t1 , RECTANGULAR PULSE DURATION (s)
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
200
10
100µs
1ms
OPERATION IN THIS
AREA MAY BE
LIMITED BY rDS(ON)
1
0.1
10ms
DC
TC = 25oC
TJ = MAX RATED
SINGLE PULSE
10
1
VDS , DRAIN TO SOURCE VOLTAGE (V)
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA
4-437
100
IDM , PEAK CURRENT CAPABILITY (A)
ID , DRAIN CURRENT (A)
50
TC = 25oC
FOR TEMPERATURES ABOVE 25oC
DERATE PEAK CURRENT
CAPABILITY AS FOLLOWS:
100
175 – T C
I = I 25 * ---------------------150
VGS = 20V
VGS = 10V
TRANSCONDUCTANCE
MAY LIMIT CURRENT
IN THIS REGION
10
10-3
10-2
10-1
100
101
102
t, PULSE WIDTH (ms)
103
FIGURE 5. PEAK CURRENT CAPABILITY
104
RFD3055, RFD3055SM, RFP3055
Typical Performance Curves
Unless Otherwise Specified (Continued)
24
VGS = 10V
ID , DRAIN CURRENT (A)
IAS , AVALANCHE CURRENT (A)
50
STARTING TJ = 25oC
10
STARTING TJ = 150oC
If R = 0
tAV = (L) (IAS) / (1.3 RATED BVDSS - VDD)
VGS = 8V
18
VGS = 7V
12
VGS = 6V
6
VGS = 5V
IF R ≠ 0
tAV = (L/R) ln [(IAS*R) / (1.3 RATED BVDSS - VDD) + 1]
1
0.001
VGS = 4.5V
0
0.01
0.1
tAV, TIME IN AVALANCHE (ms)
0
1
FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING
25oC
-55oC
18
175oC
12
6
0
2
4
6
8
2.0
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
VGS = 10V, ID = 12A
1.5
1.0
0.5
0
-80
10
-40
VGS , GATE TO SOURCE VOLTAGE (V)
160
200
2.0
VGS = VDS , ID = 250µA
1.5
1.0
0.5
0
-80
0
40
80
120
TJ , JUNCTION TEMPERATURE (oC)
FIGURE 9. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
NORMALIZED DRAIN TO SOURCE
BREAKDOWN VOLTAGE
NORMALIZED GATE THRESHOLD VOLTAGE
FIGURE 8. TRANSFER CHARACTERISTICS
2.0
7.5
2.5
VDS = 15V
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
0
1.5
3.0
4.5
6.0
VDS , DRAIN TO SOURCE VOLTAGE (V)
FIGURE 7. SATURATION CHARACTERISTICS
NORMALIZED DRAIN TO SOURCE
ON RESISTANCE
24
ID , ON STATE DRAIN CURRENT (A)
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
-40
0
40
80
120
160
TJ , JUNCTION TEMPERATURE (oC)
200
FIGURE 10. NORMALIZED GATE THRESHOLD VOLTAGE vs
TEMPERATURE
4-438
ID = 250µA
1.5
1.0
0.5
0
-80
-40
0
80
120
160
40
TJ , JUNCTION TEMPERATURE (oC)
200
FIGURE 11. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs TEMPERATURE
RFD3055, RFD3055SM, RFP3055
Typical Performance Curves
VGS = 0V, f = 1MHz
CISS = CGS + CGD
CRSS = CGD
COSS ≈ CDS + CGD
400
CISS
200
COSS
CRSS
10
60
VDD = BVDSS
7.5
5.0
30
0.75 BVDSS 0.75 BVDSS
0.50 BVDSS 0.50 BVDSS
0.25 BVDSS 0.25 BVDSS
15
0
5
10
15
20
VDS , DRAIN TO SOURCE VOLTAGE (V)
2.5
RL = 5Ω
IG(REF) = 0.24mA
VGS = 10V
0
0
0
VDD = BVDSS
45
25
VGS, GATE TO SOURCE VOLTAGE (V)
C, CAPACITANCE (pF)
600
VDS , DRAIN TO SOURCE VOLTAGE (V)
Unless Otherwise Specified (Continued)
20
IG(REF)
t, TIME (µs)
IG(ACT)
80
IG(REF)
IG(ACT)
NOTE: Refer to Intersil Application Notes AN7254 and AN7260.
FIGURE 12. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
FIGURE 13. NORMALIZED SWITCHING WAVEFORMS FOR
CONSTANT GATE CURRENT
Test Circuits and Waveforms
VDS
BVDSS
tP
L
VARY tP TO OBTAIN
REQUIRED PEAK IAS
+
RG
-
VGS
VDS
IAS
VDD
VDD
DUT
tP
0V
IAS
0
0.01Ω
tAV
FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 15. UNCLAMPED ENERGY WAVEFORMS
tON
tOFF
td(ON)
td(OFF)
tf
tr
VDS
RL
90%
90%
+
RG
-
VDD
10%
10%
0
90%
DUT
VGS
VGS
0
FIGURE 16. SWITCHING TIME TEST CIRCUIT
4-439
10%
50%
50%
PULSE WIDTH
FIGURE 17. RESISTIVE SWITCHING WAVEFORMS
RFD3055, RFD3055SM, RFP3055
Test Circuits and Waveforms
(Continued)
VDS
VDD
RL
Qg(TOT)
VDS
VGS = 20V
VGS
Qg(10)
+
VDD
VGS = 10V
VGS
DUT
VGS = 2V
0
Ig(REF)
Qg(TH)
Ig(REF)
0
FIGURE 18. GATE CHARGE TEST CIRCUIT
4-440
FIGURE 19. GATE CHARGE WAVEFORMS
RFD3055, RFD3055SM, RFP3055
PSPICE Electrical Model
.SUBCKT RFP3055 2 1 3 ;
rev 10/26/93
CA 12 8 0.540e-9
CB 15 14 0.540e-9
CIN 6 8 0.300e-9
DPLCAP
DRAIN
5
10
LDRAIN
DBODY 7 5 DBDMOD
DBREAK 5 11 DBKMOD
DPLCAP 10 5 DPLCAPMOD
RSCL1
DBREAK
+ 51
5
ESCL
51
50
RSCL2
EBREAK 11 7 17 18 67.9
EDS 14 8 5 8 1
EGS 13 8 6 8 1
ESG 6 10 6 8 1
EVTO 20 6 18 8 1
LDRAIN 2 5 1e-9
LGATE 1 9 4.61e-9
LSOURCE 3 7 4.61e-9
1
RGATE
LGATE
9
RDRAIN
6
8
+
ESG
GATE
IT 8 17 1
2
16
VTO
EVTO
+ 18
8
+
21
MOS2
CIN
8
LSOURCE
RSOURCE
3
SOURCE
7
MOS1 16 6 8 8 MOSMOD M=0.99
MOS2 16 21 8 8 MOSMOD M=0.01
RBREAK 17 18 RBKMOD 1
RDRAIN 50 16 RDSMOD 1e-4
RGATE 9 20 7.23
RIN 6 8 1e9
RSCL1 5 51 RSLVCMOD 1e-6
RSCL2 5 50 1e3
RSOURCE 8 7 RDSMOD 108e-3
RVTO 18 19 RVTOMOD 1
DBODY
MOS1
6
RIN
11 +
17
EBREAK 18
S1A
12
S2A
14
13
13
8
S1B
RVTO
CB
+
EGS
18
17
S2B
13
CA
RBREAK
15
+
6
8
EDS
14
IT
19
5
8
VBAT
+
S1A 6 12 13 8 S1AMOD
S1B 13 12 13 8 S1BMOD
S2A 6 15 14 13 S2AMOD
S2B 13 15 14 13 S2BMOD
VBAT 8 19 DC 1
VTO 21 6 0.5
ESCL 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)*1e6/30,6.5))}
.MODEL DBDMOD D (IS=4.33e-14 RS=2.78e-2 TRS1=1.10e-3 TRS2=5.19e-6 CJO=3.94e-10 TT=7.63e-8)
.MODEL DBKMOD D (RS=0.676 TRS1=1.94e-3 TRS2=-1.09e-6)
.MODEL DPLCAPMOD D (CJO=0.238e-9 IS=1e-30 N=10)
.MODEL MOSMOD NMOS (VTO=4.078 KP=12 IS=1e-30 N=10 TOX=1 L=1u W=1u)
.MODEL RBKMOD RES (TC1=1.06e-3 TC2=-1.92e-6)
.MODEL RDSMOD RES (TC1=5.03e-3 TC2=1.53e-5)
.MODEL RSLVCMOD RES (TC1=2.2e-3 TC2=-5e-6)
.MODEL RVTOMOD RES (TC1=-5.02e-3 TC2=-9.16e-6)
.MODEL S1AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-6.5 VOFF=-3.5)
.MODEL S1BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-3.5 VOFF=-6.5)
.MODEL S2AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-2.50 VOFF=2.50)
.MODEL S2BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=2.50 VOFF=-2.50)
.ENDS
NOTE: For further discussion of the PSPICE model consult A New PSPICE Sub-Circuit for the Power MOSFet Featuring Global Temperature
Options; authored by William J. Hepp and C. Frank Wheatley.
4-441
RFD3055, RFD3055SM, RFP3055
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Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
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4-442
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