Migration from AL-D to AL-J (8 - 16 Mb) Application Note By Matteo Zammattio 1. Introduction The two devices S29AL008D and S29AL016D manufactured with the 200 nm Floating-Gate technology are being migrated to the next generation AL-J 110 nm Floating-Gate technology. All the hardware/software features and most of the package options of the old devices have been maintained, in order to assure a seamless pin-to-pin compatible migration for the great majority of the applications. In addition, the S29AL008J and S29AL016J devices offer improved access time (55 ns) with the regulated voltage option and faster erase/program speed. As additional security features, the new devices are offering an improved hardware boot sector protection via a dedicated hardware pin (WP#) and a 256 byte secure region, which can be either provided with a random serial number and factory locked or programmable and lockable by the user. The AL-J series Flash has Sector Group Protection security features replacing the individual Sector Protection feature of the AL-D. 2. Architectural/Feature Comparison In Table 2.1, a feature comparison summary of the S29AL008/016D and S29AL008/016J devices is provided. Table 2.1 Feature Comparison (Sheet 1 of 2) Feature S29AL008D / S29AL016D S29AL008J / S29AL016J Technology 200 nm Floating-Gate technology 110 nm Floating-Gate technology Sector Architecture 4 Small boot sectors: One 16 KB, two 8 KB, one 32 KB. (AL008D) 15 Large sectors of 64 KB. (AL016D) 31 Large sectors of 64 KB. Small boot sectors can be located at either bottom or top of the address range. Same sector organization for full software compatibility. Top/Bottom boot options maintained. Access time and supply voltage range 70 ns Full VCC 2.7V to 3.6V 90 ns Full VCC 2.7V to 3.6V 55 ns Regulated VCC 3.0V to 3.6V 70 ns Full VCC 2.7V to 3.6V Bus Architecture X8 / X16 Same Device ID 8 Mb: 22DAh, DAh, 225Bh, 5Bh 16 Mb: 22C4h, C4h, 2249h, 49h Same Program operation Single Byte/Word programming Same Sector Protection/Unprotection VID on RESET# pin VID on A9 /OE# pins Sector Group Protection/Unprotection scheme with VID on RESET# pin Temporary Sector Unprotection VID on RESET# pin Temporary Sector Group Unprotection scheme with VID on RESET# pin. 256 bytes Secure Silicon Sector region Not available Available Data Polling Software detection of write/erase embedded algorithms completion. Same Ready/Busy# pin Hardware detection of write/erase embedded algorithms completion. Same Erase suspend/resume Command to suspend erase to program/read Same Set of commands to perform various device operations. 100% backward compatible plus superset commands to Enter and Exit the Secure Silicon Sector. Command interface Publication Number AL-D_to_AL-J_Migration_AN Revision 04 Issue Date October 19, 2010 A pplication Note Table 2.1 Feature Comparison (Sheet 2 of 2) Feature S29AL008D / S29AL016D S29AL008J / S29AL016J WP# pin Not available WP# pin to protect the lowest (bottom boot) highest (top boot) 16 KB sector. The pin has an internal pull-up, so it can be left unconnected in existing designs. Package Summary TS048, VBK048, SO044, KGD TS048, VBK048, KGD (all with WP#). New LAE064 (16 Mb only) and SSOP56 packages. SO044 package not available. Minor differences in the DC characteristics are summarized in Table 2.2. The absolute maximum parameter ratings are unchanged from AL-D to AL-J. Table 2.2 DC Characteristics Comparison Parameter Description ILI WP# Input Load Current (max) AL-D AL-J Comments ICC1 Active Read Current @ 5 MHz Typ: 9 mA Max: 16 mA Typ: 7 mA Max: 12 mA AL-J products have slightly lower power consumption in read mode. ICC2 VCC Active Erase/Program. Current Typ: 20 mA Max: 35 mA Typ: 20 mA Max: 30 mA AL-J products have slightly lower power consumption in write mode. VIL Input Low Voltage Min: -0.5V Max: 0.8V Min: -0.1V Max: 0.8V AL-J products have increased minimum VIL to preserve ICC3, ICC4, and ICC5 current specifications. VOH1 (min) Output High voltage @ IOH -2 mA, VCC = VCC min 2.4V 0.85 * VCC In case of VCC (min) = 2.7V, AL-J has a VOH1 (min) = 2.3V, which is comparable with the AL-D products. VID Voltage for Autoselect and Temporary Sector Unprotect. Typ: 11.5V Max: 12.5V Typ: 8.5V Max: 12.5V AL-J products can activate autoselect and temporary sector unprotection with a lower VID voltage level. VLKO Low VCC Lock-out voltage Min: 2.3V Max: 2.5V Min: 2.1V Max: 2.5V AL-J products operate at slightly lower VCC before disabling erase/program operations. ± 25 µA Table 2.3 AC Characteristics Comparison 2 Parameter Description AL-D AL-J Comments tREADY RESET# Pin Low (During Embedded Algorithms) to Read or Write (max) 20 µs 35 µs Please allow for a longer reset time pulse to the AL-J devices to insure proper embedded algorithm read/write operation. tRPD RESET# low to standby mode (min) 20 µs 35 µs Please allow for a slightly longer reset time to drive the AL-J device into standby mode during a hardware reset operation. tWPH Write Pulse Width High (min) 30 ns 25 ns AL-J allows faster toggling of the write cycles. This parameter is relevant during subsequent write cycles. tRRB RESET# Hold Time from RY/BY# High for Temporary Sector Unprotect (min) 4 µs New AL-J parameter tCPH CE# Pulse Width High (min) 30 ns 25 ns AL-J allows faster toggling of the write cycles/CE# controlled. This parameter is relevant during subsequent write cycles. Erase Suspend during sector erase operation (max) 20 µs 35 µs AL-J is slower to suspend when the Erase Suspend command is written during a sector erase operation. AL-D_to_AL-J_Migration_AN_04 October 19, 2010 App l ic atio n No t e 3. Design Considerations 3.1 WP#, Write Protect The AL-J adds the Write Protect input pin (WP#) in place of a No Connect on the AL-D as shown in Figure 3.1. This feature offers a hardware method to protect the boot block of the application. When WP# = VIL, program and erase functions are disabled in the lowest (bottom boot) or highest (top boot) 16 KB sector. The WP# pin has an internal pull-up, so it can be left unconnected in existing designs. The S29AL016J TS048 and VBK048 packages are footprint backward compatible with S29AL016D designs if pin 14 of the TS048 48-pin TSOP or ball B3 of the VBK048 48-ball Fine-pitch BGA is treated as No Connect. Figure 3.1 AL-J WP# Location In the TS048 and VBK048 Package Pinouts A15 A14 A13 A12 A11 A10 A9 A8 NC NC WE# RESET# NC WP# RY/BY# A18 A17 A7 A6 A5 A4 A3 A2 A1 3.2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 A16 BYTE# VSS DQ15/A-1 DQ7 DQ14 DQ6 DQ13 DQ5 DQ12 DQ4 VCC DQ11 DQ3 DQ10 DQ2 DQ9 DQ1 DQ8 DQ0 OE# VSS CE# A0 (Top View, Balls Facing Down) DC Performance Characteristics The DC characteristics are either mostly unchanged or improved. That means that the new AL-J device family has improved power consumption compared to the equivalent AL-D under certain operation conditions. One major different is that the minimum Input Low Voltage (VIL) has changed to -0.5V to -0.1V. This change was necessary in the AL-J family to preserve the ICC3, ICC4, and ICC5 current specifications. If a customer were to use a minimum Input Low Voltage less than -0.1V but greater than -0.5V, the excess current consumption would negatively impact battery life but would not damage the circuit or cause logic 0 input judgment errors. It is recommended that customers follow the new AL-J minimum Input Low Voltage value of -0.1V to prevent the excess current consumption. 3.3 AC Performance Characteristics The AC characteristics are mostly either unchanged or improved. That means that the new AL-J device family has improved speed compared to the equivalent AL-D except for a few parameters. The AL-J requires 35s to Reset during an embedded algorithm (tREADY) or during suspend (tRPD) compared to the 20s required by AL-D devices. One of the major differences is the test condition for the slowest speed grade. AL-D had the 90 ns speed class able to match a maximum bus load of 100 pF. The AL-J AC test conditions are now referring to a typical load of 30 pF for both the 55 ns and 70 ns speed grades. Please consider that the driving strength of the AL-J device's output buffers can be slightly different compared to the AL-D ones. It's recommended to perform qualification experiments to validate AL-J on existing AL-D sockets. Boards with heavy bus loads (>30 pF) will require careful evaluation of the new AL-J devices. IBIS models are also available on the Spansion web site to evaluate the new device on existing PCB designs. October 19, 2010 AL-D_to_AL-J_Migration_AN_04 3 A pplication 3.4 3.4.1 Note Hardware Sector Protection Sector Protection vs. Sector Group Protection The AL-J supports hardware Sector Group Protection unlike the AL-D which supports independent hardware Sector Protection control of any sector or combination of sectors. AL-J Sector Group Protection permits independent sector protection control over boot sectors and the one adjacent 64 Kbyte sector while grouping the remaining 64 Kbyte sectors. AL-J Sector Group Protection addressing requires the Sector group address with A6=0, A3=A2=0, A1=1, and A0=0 while AL-D Sector Protection addressing required the Sector address with A6=0, A1=1, and A0=0. Both the AL-J and AL-D use RESET# hardware circuitry to control the nominal 12V (VID) voltage that is required for the Sector Group Protection and Unprotection or Sector Protection and Unprotection operations respectively. For RESET# Pin circuitry implementation suggestions, please refer to the “Reset Pin Circuitry for Flash Memory Sector Protection Management” Application Note. 3.4.2 Sector Group Unprotection Sector unprotection is a reversed operation, which also needs a 12V VID on RESET# pin before the flow. AL-J Sector Group Unprotection addressing requires the Sector group address with A6=1, A3=A2=0, A1=1, and A0=0 while AL-D Sector Unprotection addressing required the Sector address with A6=1, A1=1, and A0=0. 3.4.3 Temporary Sector Group Unprotect The AL-J hardware Temporary Sector Group Unprotect feature is consistent with AL-D Temporary Sector Unprotect unless the WP# = VIL, then the first or last 16 Kbyte AL-J sector remains protected. This feature allows temporary unprotection of previously protected sector groups to change the data in system. The Sector Group Unprotect mode is activated by setting the RESET# pin to VID. During this mode, formerly protected sectors can be programmed or erased by selecting the sector addresses. Once VID is removed from the RESET# pin, all the previously protected sectors are protected again. 3.5 Secured Silicon Sector The AL-J supports the Secured Silicon Sector feature unlike the AL-D. The AL-J adds the Secured Silicon Sector feature providing a 256-byte OTP (One Time Programmable) Flash memory region that enables permanent part identification through an Electronic Serial Number (ESN). Spansion offers the device with the Secured Silicon Sector either factory-locked or customer-lockable. For details, please refer to the data sheet. RESET# = VID is required to program or verify the Customer Lockable version of the AL-J. 3.5.1 Autoselect Mode The AL-J adds Address 03h to Autoselect Mode, and the DQ7 Indicator Bit (DQ7) of Address 03h indicates if the Secured Silicon Sector has been factory locked or not factory locked. 3.6 Command Set The AL-J Command Sequences are backward software compatible with the AL-D. The AL-J adds two Command Sequences, Enter Secured Silicon Sector and Exit Secured Silicon Sector, to read the Secured Silicon Sector or program the Customer Lockable Version of the device once. 4 AL-D_to_AL-J_Migration_AN_04 October 19, 2010 App l ic atio n 3.7 No t e Common Flash Interface (CFI) Differences S29AL008J includes a CFI option unlike S29AL008D which had no CFI support. S29AL016J has minimal CFI changes versus S29AL016D. S29AL016J CFI locations 44h, Minor version number, and 45h, Process Technology Bits 5-2, in Word Mode can be used by software to distinguish between the AL-J and AL-D versions. S29AL016J CFI locations 1Fh and 21h (Word Mode) contain shorter program and erase time-outs than the AL-D. AL-J CFI location 49h indicates the device has Group Sector Protection with RESET# = VID unlike the AL-D which has Sector Protection with RESET# = VID. AL-J CFI locations 4Dh to 50h (Word Mode) expose new device capabilities in the Primary Vendor-Specific Extended Query. 3.8 Erase and Programming Performance The AL-J devices erase and programming performance has been improved compared to the AL-D devices. Table 3.1 Erase and Programming Timing 3.9 Parameter AL-D AL-J Sector Erase time (typ) 0.7s 0.5s Sector Erase time (max) 10s 10s Chip Erase time (typ) 25s 16s Byte programming time (typ) 7 µs 6 µs Word programming time (typ) 7 µs 6 µs Word programming time (max) 210 µs 150 µs Comments A similar sector erase worst-case time out can be used with AL-D and AL-J. Multiple Sector Erase In AL-D or AL-J devices, multiple sectors can be erased together by entering additional sector erase commands before the Sector Erase Timer expires (50 µs from the last Sector Erase Command). However, there is a slight difference on the command sequence requirement between the AL-D and AL-J devices. As indicated in the AL-J data sheet, the correct command sequence for doing multi-sector erase is shown in Address/Data format: 555h/AAh 2AAh/55h 555h/80h 555h/AAh 2AAh/55h SA1/30h SA2/30h SA3/30h In this example, two additional sectors, SA2 and SA3 will be erased along with SA1. When migrating from software that does multi-sector erase on AL-D devices, the software may have two unlock cycles before the red box in the above sequence. Any additional command cycle may cause the multisector erase malfunction in AL-J devices. If no multi-sector erase function is used in AL-D software, no changes are required. Note that multi-sector erase does not significantly improve the system performance because the actual erase time will be the sum of each individual sector erase time. The time saved by omitting a few command sequences are insignificant compared to the sector erase time. October 19, 2010 AL-D_to_AL-J_Migration_AN_04 5 A pplication 3.10 Note First Read after Power Reset For AL-J devices, during the power up sequence, CE# should only go low after RESET# has gone high. Keeping CE# low from power up through the first read could cause the first read to retrieve erroneous data. This behavior does not exist in AL-D devices. 4. Package Comparison Table 4.1 provides a matrix of the supported S29AL008/0016D and S29AL008/016J package options. The AL-J devices continue to support the TS048 (48-pin Standard TSOP) and the VBK048 (48-ball Fine-pitch BGA) packages like the AL-D. However, the AL-J devices do not support the SO044, 44-Pin SOP (Small Outline Package) 28.20 mm x 13.30 mm, unlike the AL-D. Instead, AL-J supports the smaller and higher pin count SSOP56 (56-pin Shrink Small Outline Package). The S29AL016J also supports the LAE064, 64-Ball Fortified Ball Grid Array (BGA) 9 mm x 9 mm. The LAE064 package ball-out is a compatible subset of the Spansion Universal Footprint used by the GL MirrorBit family. Table 4.1 AL-D and AL-J Package Options Package Offered (Size) S29AL008D S29AL016D S29AL008J TS048 (20 x 12 mm) Supported Supported Supported S29AL016J Supported VBK048 (8.15 x 6.15 mm) Supported Supported Supported Supported SO44 (16 x 28.20 mm) Supported Supported Not Available Not Available SSOP56 (16 x 23.70 mm) Not Available Not Available Supported Supported LAE064 (9 x 9 mm) Not Available Not Available Not Available Supported KGD (Known-Good Die) Supported Supported Supported Supported 5. ROHS AL-J Standard Products are only offered in RoHS compliant Pb-Free package material sets unlike the AL-D. 6. References S29AL008J Data Sheet (S29AL008J_00) S29AL016J Data Sheet (S29AL016J_00) S29AL008D Data Sheet (S29AL008D_00) S29AL016D Data Sheet (S29AL016D_00) “Reset Pin Circuitry for Flash Memory Sector Protection Management” Application Note 6 AL-D_to_AL-J_Migration_AN_04 October 19, 2010 App l ic atio n No t e 7. Revision History Section Description Revision 01 (November 18, 2008) Initial release Revision 02 (April 3, 2009) Global Minor updates Revision 03 (October 28, 2009) Architectural/Feature Comparison DC Characteristics Comparison table: added comment for VIL Design Considerations Added new section: DC Performance Characteristics Revision 04 (October 19, 2010) Architectural/Feature Comparison Removed invalid signals tASO, tOEPH, tCEH Design Considerations Added new sections: Multiple Sector Erase and First Read after Power Reset October 19, 2010 AL-D_to_AL-J_Migration_AN_04 7 A pplication Note Colophon The products described in this document are designed, developed and manufactured as contemplated for general use, including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as contemplated (1) for any use that includes fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon system), or (2) for any use where chance of failure is intolerable (i.e., submersible repeater and artificial satellite). Please note that Spansion will not be liable to you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. If any products described in this document represent goods or technologies subject to certain restrictions on export under the Foreign Exchange and Foreign Trade Law of Japan, the US Export Administration Regulations or the applicable laws of any other country, the prior authorization by the respective government entity will be required for export of those products. Trademarks and Notice The contents of this document are subject to change without notice. This document may contain information on a Spansion product under development by Spansion. Spansion reserves the right to change or discontinue work on any product without notice. The information in this document is provided as is without warranty or guarantee of any kind as to its accuracy, completeness, operability, fitness for particular purpose, merchantability, non-infringement of third-party rights, or any other warranty, express, implied, or statutory. Spansion assumes no liability for any damages of any kind arising out of the use of the information in this document. Copyright © 2008-2010 Spansion Inc. All rights reserved. Spansion®, the Spansion logo, MirrorBit®, MirrorBit® Eclipse™, ORNAND™, EcoRAM™ and combinations thereof, are trademarks and registered trademarks of Spansion LLC in the United States and other countries. Other names used are for informational purposes only and may be trademarks of their respective owners. 8 AL-D_to_AL-J_Migration_AN_04 October 19, 2010