DESIGN FEATURES Supply Tracking and Sequencing at Point-of-Load: Easy Design without the Drawbacks of MOSFETs by Scott Jackson Introduction Multi-voltage electronics systems are often saddled with complex power supply voltage tracking or sequencing requirements, which, if not met, can result in system faults or even permanent failures in the field. The design difficulties in meeting these requirements are often compounded in distributed-power architectures where point-of-load (POL) DC/DC converters are scattered across PC board space, sometimes on different board planes. The problem is that power supply circuitry is often the last circuitry to be designed into the board, and it must be shoehorned into whatever little board real estate EARLY VIN 6V is left. Centralized sequencing-tracking solutions can work well, but when no significant contiguous space is left on a board and the system specifications are in flux, one wishes for a simple, drop-in, flexible option. That wish can be fulfilled with a tracking and sequencing solution that installs at the POL, and is tiny and versatile enough to be easily dropped into the board without disrupting the rest of the system design. Wish Granted The LTC2927 provides a simple and versatile solution in a tiny footprint for VIN 0.1µF RONB 487k VCC ON RONA 100k both tracking and sequencing without the drawbacks of series MOSFETs. Each POL converter that must be tracked or sequenced can have a single LTC2927 placed at point-of-load as shown in Figure 1. By selecting a few resistors and a capacitor, the supplies are configured to ramp-up and ramp-down with a variety of voltage profiles. Figure 2 shows various tracking and sequencing scenarios, including concurrent voltage tracking (Figure 2a), offset tracking (Figure 2b), ratiometric tracking (Figure 2c), and supply sequencing (Figure 2d). Many voltage tracking solutions use series MOSFETs, which adds an in- VCC RAMP MASTER ON CRAMP 0.47µF VIN LTC2927 RAMP LTC2927 VIN IN RAMPBUF RTB1 IN LTC1628 FB FB = 0.8V OUT 5V SLAVE 1 RAMPBUF RTB3 TRACK RFB1 105k FB = 0.8V OUT 1.8V SLAVE 3 OUT 2.5V SLAVE 4 VCC ON RAMP LTC2927 RAMPBUF RTB2 RFB3 26.1k VIN VCC ON RFA3 20k GND RTA3 VIN FB RAMP LTC2927 VIN VIN IN IN LTC1628 LTC3728 FB = 0.8V RAMPBUF OUT 3.3V SLAVE 2 RTB4 FB FB = 0.8V TRACK TRACK RTA2 FB TRACK RFA1 20k GND RTA1 LTC3728 GND RFA2 20k RFB2 63.4k RTA4 GND RFA4 20k RFB4 63.4k Figure 1. Typical tracking application 24 Linear Technology Magazine • September 2005 DESIGN FEATURES MASTER SLAVE1 SLAVE2 a. Coincident tracking resistors configures the behavior of a slave supply relative to a master signal. The choice of resistors can cause a slave supply to track the master signal exactly or with a different ramp rate, voltage offset, time delay, or combination of these. A master signal is generated by tying a capacitor from the RAMP pin to ground or by supplying another ramping signal to be tracked as shown in Figure 1. Examples MASTER SLAVE1 SLAVE2 a. Offset tracking MASTER SLAVE1 SLAVE2 c. Ratiometric tracking MASTER SLAVE1 SLAVE2 Consider a complex tracking system. The schematic in Figure 1 uses an LTC1628 dual synchronous stepdown converter to produce 5.0V and 3.3V supplies and an LTC3728 dual synchronous step-down converter to produce 2.5V and 1.8V supplies from a 6.0V input. Four LTC2927s connected to the feedback nodes control the ramp-up and ramp-down behavior of these supplies. An early VIN is supplied to the devices to guarantee correct operation prior to tracking the supplies. The specification calls for the 5.0V and 3.3V supplies to track coincidently at ~20V/s, the 1.8V supply should ramp up quickly at 100V/s after the 3.3V supply reaches 2.0V, and the 2.5V supply should ramp up at the same rate as the 1.8V supply, but delayed by 20ms. The LTC2927 data sheet (available at www.linear.com) includes a 3-step design procedure that is followed for each supply. When using that procedure, use the following for equation (1) in Step 1, with a master signal ramp-rate SM of 20V/s: CRAMP = d. Supply sequencing Figure 2. Types of power supply voltage tracking herent voltage drop, additional power consumption, and extra PC board real estate. Instead, the LTC2927 controls supplies by injecting current directly into the feedback nodes, thus controlling supply outputs without series MOSFETs. Figure 3 shows the simple “tracking cell” used to inject this Linear Technology Magazine • September 2005 current. Furthermore, power supply stability and transient response remain unaffected because the injected current from the LTC2927 offsets the output voltage without altering the power supply control loop dynamics. Power supply tracking is straightforward with the LTC2927. A pair of 10µA ≈ 0.47µF 20 V s 5V and 3.3V Supply Coincident Tracking Because the master ramp rate is chosen to be equal to the desired ramp rate of the 5V and 3.3V supplies, coincident tracking is selected. If the feedback voltage of the switching power supply is 0.8V, as it is on the LTC1628, then coincident tracking can be configured by setting the tracking resistors equal to the feedback resistors (verified by 25 DESIGN FEATURES VCC 5V 3.3V 2.5V 1.8V 1V/DIV + MASTER – RTB + – FB TRACK 5 0.8V DC/DC 5 RTA 2927 F05 RFA 50ms/DIV SLAVE FB OUT Figure 4. Output profile of the circuit in Figure 1 RFB Figure 3. Simplified tracking cell following Step 2 of the 3-Step Design Procedure), From equation (2) of the 3-Step Design Procedure: RTB1 = RFB1 = 105kΩ RTB2 = RFB2 = 63.4kΩ From Equation (3) of the 3-Step Design Procedure: RTA1ʹ = RFA1 = 20kΩ RTA2ʹ = RFA2 = 20kΩ 1.8V and 2.5V Supply Sequencing The 1.8V supply ramps up 2V below the 3.3V supply but at a ramp rate of 100V/s. Set the slave ramp rate to 100V/s in equation (2) to find R TB3: 21.3 V s ≈ 56.2kΩ 100 V s Complete Step 2 by solving for R TA3ʹ using equation (3). RTA3′ = −10.755kΩ Step 3 adjusts R TA3 for the desired delay between the 3.3V supply and the 1.8V supply. An offset of 2V results in a delay of ~100ms for the ramp rate chosen. RTA 3″ = 2.09kΩ = R ′ || R R TA 3 TA 3 21.3 V s ≈ 93.1kΩ 100 V s RTA4′ = −28.052kΩ R ″ = 28.8kΩ TA 4 The tracking profile for this system is shown in Figure 4. Note that not every combination of ramp-rates and delays is possible. Small delays and large ratios of slave ramp rate to master ramp rate may result in solutions that require negative resistors. In such cases, either the delay must be increased or the ratio of slave ramp rate to the master ramp rate must be reduced. In addition, the chosen resistor values should not require more than 1mA to flow from EARLY VIN 6V ″ TA 3 The 2.5V supply has the same ramp rate as the 1.8V supply, but VTRACK RTA1 || RTB1 = 0.05mA < 1mA VTRACK ITRACK 2 = RTA 2 || RTB2 = 0.05mA < 1mA VTRACK = RTA 3 || RTB3 = 0.45mA < 1mA VTRACK ITRACK 4 = RTA 4 || RTB4 = 0.24mA < 1mA The connections between each LTC2927 shown in Figure 1 allow extra control for each supply. With this system, the 3.3V supply uses the 5V supply as its master signal. If for some reason the 5V supply should collapse, the 3.3V supply follows it down. Likewise, the 1.8V and 2.5V supplies use the 3.3V supply as their master signal and track it up and down. 0.1µF RONB 487k VCC ON RONA 100k RAMP RAMPBUF MASTER VIN CRAMP 0.1µF LTC2927 DMMT5551 IN RFA/2 34k VREF = 1.25V LTC3462 FB RFA/2 34k TRACK RTA1 26.1k ITRACK1 = ITRACK 3 RTA 4 = RTA 4′ || RTA 4″ RTB1 137k ≈ 2.61kΩ 26 RTB4 = 43.2kΩ ≈ 3.24kΩ In the 3-step design procedure R TAʹ represents the value of R TA that produces no delay or offset. Since no delay is desired, R TA = R TAʹ, and Step 3 of the Design procedure is unnecessary. RTB3 = 26.1kΩ is delayed another 20ms. Repeating Step 2 and Step 3 for the 2.5V supply results in: the TRACK and FB pins. Therefore, confirm that less than 1mA flows from TRACK when VMASTER is at 0V. GND FB = 0V OUT –5V SLAVE RFB 274k Figure 5. Supply tracking of GND referenced negative regulator Linear Technology Magazine • September 2005 DESIGN FEATURES 0V SLAVE –VMASTER 0V 1V/DIV 1V/DIV –5V SLAVE –VMASTER –5V SLAVE –VMASTER 10ms/DIV 10ms/DIV a. Tracking error due to current mirror pull-down limitation b. Tracking without current mirror pull-down limitation Figure 6. Output profile of circuit of Figure 9 Negative Supply Tracking It is possible to track negative voltage regulators with the LTC2927. Figure 5 shows a tracking example using a LT3462 inverting DC/DC converter to produce a –5V supply. This converter has a ground-based reference, which allows current to be pulled from a node where RFA has been divided in two. To properly pull current from the LT3462 FB network, a current mirror must be placed between the LTC2927 and the converter. The 3-Step design procedure remains the same with minor modifications to equations (2) and (3): LTC3417, continued from page 8 ripple at VOUT1 and the current through the inductor while the LTC3417 is in Burst Mode operation. The ripple voltage in this example was taken at an ILOAD of 40mA and is only 15mVP–P. The worst case output voltage ripple occurs just before the part switches from bursting to continuous mode, which occurs at about 250mA. At his point, the VOUT ripple can be as high as 25mVP–P. Figure 6 shows the VOUT1 ripple and the current through the inductor when the part is in Pulse Skipping Mode. Notice that the current through the inductor does go slightly negative, and then produces some high frequency components. The higher frequency components are due to the switching MOSFETS turning off. At lower currents, the part starts skipping pulses, and thus produces some lower frequency components. In this case, the voltage ripple does indeed show some higher frequency components, yet the ripple itself is at about 5mVP–P. Figure 7 shows the voltage ripple at VOUT1 and the inductor current ESR generates a loop zero at 5kHz to 50kHz that is instrumental in giving acceptable loop phase margin. Ceramic capacitors remain capacitive to beyond 300kHz and usually resonate with their ESL before ESR becomes effective. Also, ceramic caps are prone to temperature effects, requiring the designer to check loop stability over the operating temperature range. For these reasons, great care must be taken when using only ceramic input and output capacitors. The LTC3417 helps solve loop stability problems with its OPTI-LOOP phase compensation adjustment, allowing the use of ceramic capacitors. For details, and a process for optimizing compensation components, see Linear Technology Application Note 74 (AN76). Although the LTC3417 is capable of operating at 4MHz, the frequency in this application is set for 1.5MHz by connecting the FREQ pin to VIN. Figures 5 through 7 show the trade off between mode and VOUT ripple noise. Figure 5 shows the voltage Linear Technology Magazine • September 2005 RTB = RTA′ = RFB SM • 2 SS VTRACK 2VREF VTRACK − RFA RTB All other equations remain the same. Figure 6a shows the tracking profile of Figure 5 with a ramp rate of 100V/s. VMASTER is positive, but the inverse is shown for clarity. The –5V slave does not pull all the way up to 0V at VMASTER = 0V. This is because the ground referenced current mirror cannot pull its output all the way to ground. If the converter has a FB reference voltage greater than 0V or if a negative supply is available for the current mirror, the error can be removed. The resulting waveform is shown in Figure 6b. Conclusion The LTC2927 simplifies power supply tracking and sequencing by offering superior performance in a tiny point-of-load area. A few resistors can configure simple or complex supply behaviors. Series MOSFETs are eliminated along with their parasitic voltage drops and power consumption. The LTC2927 offers all of these features in a tiny 8-lead ThinSOT™ and 8-lead (3mm × 2mm) DFN package. when the part is in Forced Continuous mode. Notice that the current through the inductor goes negative. At no time, during Forced Continuous doe the MOSFETS actually turn off, they keep switching. Therefore, the frequency component of the voltage ripple stays constant at the operating frequency. The voltage ripple therefore looks constant and stays below 5mV over all load currents. Conclusion The LTC3417 is a dual synchronous, step-down, current mode, DC/DC converter designed to fit in the tight spaces afforded by today’s portable devices. Switching MOSFETS are integrated into the device, and high frequency operation enables the use of small sized components. It is also designed with versatility in mind with external components for loop compensation, variable frequency operation and different operating modes to optimize efficiency and noise. 27