XC 8 0 0 Fa m i l y AP 0 8 1 1 2 Ha rd w ar e D e s c ri pt i on X C 8 36 D ri v e C a rd Ap p l i c a ti o n No te V 1 . 0, 2 01 0- 09 M i c ro c o n t ro l l e rs Edition 2010-09 Published by Infineon Technologies AG 81726 Munich, Germany © 2010 Infineon Technologies AG All Rights Reserved. LEGAL DISCLAIMER THE INFORMATION GIVEN IN THIS APPLICATION NOTE IS GIVEN AS A HINT FOR THE IMPLEMENTATION OF THE INFINEON TECHNOLOGIES COMPONENT ONLY AND SHALL NOT BE REGARDED AS ANY DESCRIPTION OR WARRANTY OF A CERTAIN FUNCTIONALITY, CONDITION OR QUALITY OF THE INFINEON TECHNOLOGIES COMPONENT. THE RECIPIENT OF THIS APPLICATION NOTE MUST VERIFY ANY FUNCTION DESCRIBED HEREIN IN THE REAL APPLICATION. INFINEON TECHNOLOGIES HEREBY DISCLAIMS ANY AND ALL WARRANTIES AND LIABILITIES OF ANY KIND (INCLUDING WITHOUT LIMITATION WARRANTIES OF NON-INFRINGEMENT OF INTELLECTUAL PROPERTY RIGHTS OF ANY THIRD PARTY) WITH RESPECT TO ANY AND ALL INFORMATION GIVEN IN THIS APPLICATION NOTE. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. AP08112 Hardware Description XC836 Drive Card XC836 Revision History: V1.0 2010-09 Previous Version(s): Page Subjects (major changes since last revision) – First release. Trademarks TriCore® is a trademark of Infineon Technologies AG. We Listen to Your Comments Is there any information in this document that you feel is wrong, unclear or missing? Your feedback will help us to continuously improve the quality of this document. Please send your proposal (including a reference to this document) to: [email protected] Application Note 3 V1.0, 2010-09 AP08112 Hardware Description XC836 Drive Card Table of Contents Table of Contents 1 1.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Key Features of XC836 for Motor Control Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 Hardware Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 MCU (Microcontroller) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 User Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Digitally Isolated Debug Interface (SPD and UART) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Inverter Board Connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Hall Sensor Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 SSC, ASC and I2C Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 PCB Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Schematics of XC836 Drive Card . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Application Note 4 V1.0, 2010-09 AP08112 Hardware Description XC836 Drive Card Overview 1 Overview The XC836 DriveCard is designed to be used in motor control systems. It provides all the signals necessary to drive a power Inverter, including feedback signals. The XC836 is a low pin count product of the XC800 Family from Infineon Technologies. Figure 1 XC836 DriveCard This DriveCard, featuring the cost-effective 8-bit XC836 microcontroller with 16-bit motor control performance, provides the following interfaces: • • • • • • • SSC – Synchronous Serial Interface such as SPI ASC – Asynchronous serial interface based on UART protocol I2C – I2C compliant serial interface HALL – The HALL interface can be used to directly connect HALL motor sensors Digital isolated SPD – Single pin programming and debugging interface Digital isolated UART – Used for example for real-time monitoring and parameter setup User interface – An LED and a potentiometer can be used as the user interface in standalone operation Attention: The potentiometer and the reset button are mounted to the power inverter’s ground potential. Metal parts may carry high voltages. The inverter board connector provides the following signals: • • • • • Six PWM channels for 3-phase motor control (CAPCOM6E) Shut down signal for PWM channels (CTRAP) Enable signal for power inverter Six ADC channels for fast analog signals such as DC-link current and phase voltages, as well as slow signals such as temperatures The power supply (5 V) for the DriveCard Application Note 5 V1.0, 2010-09 AP08112 Hardware Description XC836 Drive Card Overview 1.1 • • • • Key Features of XC836 for Motor Control Applications High Performance 16-bit vector computer (CORDIC + MDU) – Vector rotation and transformations such as Park and Clarke transformation – Normalizing and scaling – Interrupt based operation with minimum CPU load PWM unit for advanced motor control (CapCom6E) – 16-bit resolution for high precision space vector PWM generation – Dead time control for minimum hardware effort (direct control of MOSFET/IGBT) – CTRAP provides hardware overload protection A fast 10-bit A/D Converter – Hardware synchronization to PWM units reduces CPU load – Eight ADC channels with a sample time of less than 200 ns – Four result registers to maximize sampling performance – Enables phase current reconstruction at single shunt current measurement Watchdog timer based on separate 75 kHz Figure 2 XC836 Block Diagram Application Note 6 V1.0, 2010-09 AP08112 Hardware Description XC836 Drive Card Hardware Description 2 Hardware Description 2.1 Power Supply The XC836 DriveCard is supplied by two power supply domains. The main supply (VCC) is fed from the Inverter board connector (Section 2.5) and is connected to the MCU and all associated blocks. A second supply domain (VCCIO) exists for the digital isolation. This can be provided via the debug connector. Please refer to Section 2.4 for details. Two LEDs indicate the presence of these supply voltages. 2.2 MCU (Microcontroller) The microcontroller unit XC836 is directly connected to the dedicated interfaces. A software download can be performed via SPD at port pin P3.2. Figure 3 XC836 Connections The drive card is shipped with Boot Mode Index (BMI) programmed to “User Mode Diagnostic” providing SPD programming access. Please refer to application note AP08108 for details on programming the BMI value. A reset button is available to trigger a power-on reset. This is realized by a p-channel MOSFET transistor switching the power supply of the microcontroller, because there is no XC836 reset pin available. Application Note 7 V1.0, 2010-09 AP08112 Hardware Description XC836 Drive Card Hardware Description Figure 4 Reset Circuitry 2.3 User Interface A user interface is available by making use of a potentiometer and an LED. The potentiometer is connected to ADC channel 4. The LED is connected to port pin P3.2 which is overlaid with the SPD signal. A test pad (JP101) is also connected to this port in order to measure fast signals at an oscilloscope. Figure 5 User Interface: LED with Test Pad and Potentiometer Application Note 8 V1.0, 2010-09 AP08112 Hardware Description XC836 Drive Card Hardware Description 2.4 Digitally Isolated Debug Interface (SPD and UART) The XC836 DriveCard is equipped with digital isolation for the SPD and UART interfaces. The 5 kV digital isolation securely disconnects any debug and UART devices from the high voltage levels. As there is a separate power domain for the PC part of the XC836 DriveCard, a 5 V power supply must be provided separately at VCCIO and GNDIO. An LED indicates the availability of this supply domain. The SPD and UART interfaces can be used in parallel. The digital isolation is based on unidirectional signals. As a result, three signals must be provided for SPD: in, out and direction. Infineon’s DriveMonitor V2 USB stick provides these SPD signals as well as CAN, UART and the 5 V power supply in one device. Please refer to application note AP90006 for further details. The boot configuration for the XC836 does not depend on pin status during reset. Instead, a Boot Mode Index (BMI) configuration determines the entry to various boot modes such as User Mode, Boot-Loader (BSL) Mode and On-chip Debug (OCDS) Mode. After reset, the BMI value is taken and the respective boot mode entry is executed. Please refer to application note AP08108 for details. Figure 6 Digitally Isolated Debug Interface BMI programing is only possible via the SPD protocol, because port pin P3.2 is only connected to the SPD channel of the debug interface. In case of an erroneous change of BMI to UART BSL, connect signal RXD/SDA (pin 1 of header J102) with P3.2. The UART channel of the debug interface can then be used to connect to UART BSL. The Infineon DriveMonitor USB stick V2 supports both debug channels. 2.5 Inverter Board Connection The standard 32-pin connector (DIN 41612, B/2) provides all the signals required for control of a 3-phase power inverter. The lowside (_L) and highside (_H) switches of the three power stages U, V and W are to be connected to the signals U_L, U_H, V_L, V_H, W_L and W_H. They are connected to the MCU’s CAPCOM6E peripheral, a flexible and powerful PWM unit that is very well suited for motor control. A low signal at the CTRAP pin of the CAPCOM6E immediately switches all power stages to passive state and acts as an emergency shut-down for the inverter. All CAPCOM6E signals of timer T12 are available at pin header JP104. Application Note 9 V1.0, 2010-09 AP08112 Hardware Description XC836 Drive Card Hardware Description An enable signal for the power stages can be provided via the ENABLE signal. This is connected to the MCU’s GPIO port 0.4. The ADC signals are connected to the inverter board connector. When using the XC836 DriveCard in motor control applications, it is recommended to use the channels as follows: • • • • Channel 3 is used for DC link current measurement. Channels 0 to 2 can be used for output voltage (e.g. BEMF detection) or phase current measurement. Channel 5 is used to monitor DC link voltage. Channel 6 is intended to be used as auxiliary analog input. Note: A 5 V power supply is expected at pins A1-B1 of the inverter board connector in order to supply the MCU and peripheral components. Figure 7 Inverter Board Connector 2.6 Hall Sensor Interface The MCU provides a HALL sensor interface which can be accessed via JP103. Next to the HALL signals that are pulled up to VCC = 5 V, the VCC and GND signals are also available. Figure 8 HALL Sensor Interface Application Note 10 V1.0, 2010-09 AP08112 Hardware Description XC836 Drive Card Hardware Description 2.7 SSC, ASC and I2C Interface The SSC, ASC and I2C interface from the MCU are provided at JP102. These interfaces are connected directly to the MCU and are therefore not isolated form the hot ground of the power Inverter. The signals of JP102 can also be mapped to GPIOs of the MCU. Figure 9 SSC, ASC and I2C Interface Application Note 11 V1.0, 2010-09 AP08112 Hardware Description XC836 Drive Card Hardware Description 2.8 PCB Layout Figure 10 Top Layer Figure 11 Bottom Layer 1 1 DIN 41612-B/2 b a 16 Figure 12 Placement of the Component Application Note 12 V1.0, 2010-09 ADJ_101 Power Supply LED VCC Isolation VCC ADJ_102 GND LED101 LSQ976-Z 1k5 ADJ_103 GNDIO R105 Power Supply LED VCCIO VCCIO TMS VDDP TDO GND1 NC1 GND2 TDI RESET TRST BRKOUT TCLK GND3 BRKIN NC3 NC2 NC4 1 GNDIO 1 VCCIO 10k GND S P2.4 VDDP POT at ADC ch4 GNDIO VCCIO GNDIO RESETI USR0 SPD_SEL PCTXD R101 VCCIO 1 7 C101 100n GNDIO 8 GND1B GND1A VE1 VOD VIC VIB VIA VDD1 GND1B GND1A VIB VOA VDD1 P3.2/SPD LED at P3.2 100n 2 7 VCCIO C106 6 DAP1_I 5 4 DAP1_DIR DAP1_O 3 RESETI VCCIO 1 5 PCTXD GNDIO 4 PCRXD 3 GND IC102 1 JP101 9 15 10 11 12 13 14 16 9 16 12 13 14 R103 GND VCC 1k R104 1k 1 5 3 100n C107 VCC GND RXD/SDA MTSR/RXD1 MRST/TXD1 SCLK/SCL VCC IC103 VCCA VCCB DIR GND A B 1k R102 6 2 4 1 3 5 7 JP102 2 4 6 8 GND P2.7 ENABLE GND 100n P3.2/SPD C105 VDDP RESET RXD/SDA TXD/CO63 SN74LVC1T45DCK 100n C102 SSC, ASC and IIC ADUM2401BWRZ GND2B GND2A VE2 VID VOC VOB VOA VDD2 IC104 ADUM2201AWRZ GND2B GND2A VOB VIA VDD2 VCC OCDS - JTAG R110 POTI GND R106 VCC VDDG GND P P1 Reset S S1 SW101 Reset Circuitry HALL0 HALL1 HALL2 6 5 4 3 2 P2.2 P2.3 P2.4 P2.5 P2.6 VCC HALL 1 3 5 22n C109 RESET 1 7 P2.1 P2.7 8 P2.0 JP103 GND 17 2 4 6 GND 220n 100n GND C104 C103 18 12 1 GND GND T101 BCR148W VDDG VCC GND P1.1/TXD/CC60/COL1 P3.0/SCL/SCK/EXINT2/COL6/XTAL4 P1.5/CC62/COLA/COL5 P1.4/EXINT5/COUT62/COUT63/COL4 P1.3/CC61/EXF2/COL3 P1.2/EXINT4/COUT61/COUT63/COL2 P3.2/RXD/SDA/MTSR/MRST/EXINT0/T2EX/TXD/SPD P3.1/RXD/RTCCLK/MTSR/MRST/EXINT0/EXF2/COLA/XTAL3 P3.2/SPD MTSR/RXD1 SCLK/SCL W_L W_H V_L GND 1 2 3 4 5 6 7 8 9 10 CCU6 JP104 27 26 25 20 19 13 V_H U_L 14 15 TXD/CO63 U_H 16 RXD/SDA 28 ENABLE MRST/TXD1 10 9 CTRAP HALL2 23 11 HALL1 22 24 HALL0 21 2010/17 MAB32B2 X101-B1 X101-B2 X101-B3 P2.5 X101-B4 P2.0 X101-B5 P2.1 X101-B6 P2.2 X101-B7 P2.3 X101-B8 U_L X101-B9 U_H X101-B10 V_L X101-B11 V_H X101-B12 W_L X101-B13 W_H X101-B14 CTRAP X101-B15 TXD/CO63 X101-B16 ENABLE Drive Card XC836 MAB32B2 X101-A1 MTSR/RXD1 X101-A2 P2.6 X101-A3 X101-A4 X101-A5 X101-A6 X101-A7 X101-A8 X101-A9 X101-A10 X101-A11 X101-A12 X101-A13 X101-A14 X101-A15 X101-A16 Power Board Connector P2.7/AN7/EXINT0/RXD/T2EX/MTSR P2.6/AN6/EXINT6/SCK P2.5/AN5/T12HR/T13HR P2.4/AN4/T12HR/T13HR/T2 P2.3/AN3/EXINT3/CCPOS0/CTRAP#/T2 P2.2/AN2/EXINT2X/CCPOS2/T12HR/T13HR/SCK/T1 P2.1/AN1/EXINT1/CCPOS1/RXD/MTSR/T0 P1.0/SPD/EXINT0/RXD/TXD/T2EX/COUT60/COL0 P0.7/TXD/SCL/COUT63/COLA/COL3/TSIN7/LINE7 P0.6/SPD/EXINT0/RXD/TXD/T2EX/SDA/MTSR/MRST/COLA/COL2/TSIN6/LINE6 P0.5/EXINT0/RXD/TXD/MTSR/MRST/COUT62/EXF2/COL1/TSIN5/LINE5 P0.4/T2EX/SCL/SCK/EXINT1/CTRAP#/EXF2/COLA/COL3/COL0/TSIN4/LINE4 P0.3/CC60/SDA/CTRAP#/TSIN3/LINE3 P0.2/T1/CC62/SCL/CCPOS2/TSIN2/LINE2 P0.1/T0/CC61/T13HR/MTSR/MRST/CCPOS1/TSIN1/LINE1 P0.0/T2/T13HR/T12HR/MTSR/MRST/CCPOS0/COUT61/TSIN0/LINE0 P2.0/AN0/EXINT0/CCPOS0/T12HR/T13HR/T2EX/T2 VSSP VDDC VDDP VCC IC101 BSS223PW XC836MT Q101 Hall Sensor Interface R107 10k DAP0 USR1 R111 E A VCC DAP1_DIR DAP1_I PCRXD DAP1_O 1k5 LED102 LSQ976-Z 1k5 LYQ976-Z LED103 R112 P2 R108 10k VCCIO 22k R109 10k R114 100n Debug and UART Interface 10k VCC R113 3 13 2 C108 Application Note VCC 2.9 1k XC836 8-bit Microcontroller in TSSOP28 Package AP08112 Hardware Description XC836 Drive Card Hardware Description Schematics of XC836 Drive Card V1.0, 2010-09 CCU6 w w w . i n f i n e o n . c o m Published by Infineon Technologies AG