Data Sheet

BUK1M200-50SGTD
Quad channel logic level TOPFET
Rev. 01 — 31 March 2003
Product data
1. Product profile
1.1 Description
Quad temperature and overload protected power switch based on TOPFET™ Trench
technology in a 20-pin surface mount plastic package.
Product availability:
BUK1M200-50SGTD in SOT163-1 (SO20).
1.2 Features
■
■
■
■
Power TrenchMOS™
Overtemperature protection
Overload protection
Input-source voltage resets latched
protection circuitry.
■ Control of output stage and supply of
overload protection circuits derived
from input
■
■
■
■
5V logic compatible
Current trip protection
ESD protection for all pins
Overvoltage clamping for turn off of
inductive loads
■ Low operating input current permits
direct drive by micro-controller.
1.3 Applications
■ Low-side driver
■ Pulse Width Modulation
■ DC switching
■ General purpose switch for driving
lamps, motors, solenoids and heaters.
1.4 Quick reference data
Table 1:
Quick reference data
Symbol
Parameter
Min
Max
Unit
RDSon
drain-source on-state resistance
-
200
mΩ
ID
drain current
Ptot
total power dissipation
Tj
VDS
[1]
-
2.7
A
-
9.4
W
junction temperature
-
150
°C
drain-source voltage
-
50
V
All devices active.
[1]
BUK1M200-50SGTD
Philips Semiconductors
Quad channel logic level TOPFET
2. Pinning information
dbook, halfpage
20
11
I1
D1
P
1
D2
P
S1
10
Top view
I2
I3
D3
P
S2
I4
D4
P
S3
S4
MGX361
MBL801
Fig 2. Symbol; Quad channel low-side TOPFETTM
Fig 1. Pinning; SOT163-1 (SO20).
2.1 Pin description
Table 2:
Pin description
Symbol
Pin
Description
n.c.
1, 11, 10, 20
not connected
D1
2,19
drain 1
I1
3
input 1
D2
4,17
drain 2
I2
5
input 2
D3
6,15
drain 3
I3
7
input 3
D4
8, 13
drain 4
I4
9
input 4
S4
12
source 4
S3
14
source 3
S2
16
source 2
S1
18
source 1
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
9397 750 10955
Product data
Rev. 01 — 31 March 2003
2 of 15
BUK1M200-50SGTD
Philips Semiconductors
Quad channel logic level TOPFET
3. Block diagram
2,19
D1
CHANNEL 1
OVER
VOLTAGE
RIG
3
I1
18
S1
gate
VOLTAGE
REGULATOR
5
I2
SHORT CIRCUIT
PROTECTION
OVER
TEMPERATURE
CONTROL
LOGIC
CHANNEL 2
internal circuitry
identical to
CHANNEL1
sense
CROWBAR
AND
CURRENT
TRIP
4,17
D2
16
S2
6,15
7
I3
CHANNEL 3
internal circuitry
identical to
CHANNEL1
D3
14
S3
8,13
9
I4
BUK1M200-50SGTD
CHANNEL 4
internal circuitry
identical to
CHANNEL1
D4
12
S4
03pb04
Fig 3. Elements of the quad channel TOPFET switch.
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
9397 750 10955
Product data
Rev. 01 — 31 March 2003
3 of 15
BUK1M200-50SGTD
Philips Semiconductors
Quad channel logic level TOPFET
4. Limiting values
Table 3:
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
drain-source voltage
VDS
Min Max
Unit
[1]
-
50
V
[2][3]
-
2.7
A
ID
drain current
Tsp = 25 °C; Figure 5
II
input current
clamping
-
3
mA
IIMS
non-repetitive peak input current
tp ≤ 1 ms
-
10
mA
Ptot
total power dissipation
Tsp = 25 °C; Figure 4
[4]
-
9.4
W
Tstg
storage temperature
normal operation
[5]
-
150
°C
−55 +150 °C
junction temperature
Tj
Overvoltage clamping [6]
EDS(CL)S
non-repetitive drain-source clamping energy
Tamb = 25 °C; IDM ≤ ID(th)(trip); inductive
load
[3]
-
100
mJ
EDS(CL)R
repetitive drain-source clamping energy
Tsp ≤ 125 °C; IDM = 1 A; f = 250 Hz
[3]
-
5
mJ
VIS ≥ 4 V
-
35
V
Tsp ≤ 25 °C; VIS = 0 V
-
2
A
C = 250 pF; R = 1.5 kΩ
-
2
kV
Overload protection [7]
VDS(prot)
protected drain-source voltage
Reverse diode
source (diode forward) current
IS
Electrostatic discharge
Vesd
[1]
[2]
[3]
[4]
[5]
[6]
[7]
electrostatic discharge voltage
Prior to the onset of overvoltage clamping. For voltages above this value, safe operation is limited by the overvoltage clamping energy.
Refer to overload protection characteristics.in Table 5.
For a single active device.
For all devices active.
Not in an overload condition with drain current limiting.
At a drain-source voltage above 50 V the power MOSFET is actively turned on to clamp overvoltage transients.
With the protection supply provided via the input pin, the TOPFET is protected from short circuit loads. Overload protection operates by
means of drain current trip or by activating the overtemperature protection.
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
9397 750 10955
Product data
Rev. 01 — 31 March 2003
4 of 15
BUK1M200-50SGTD
Philips Semiconductors
Quad channel logic level TOPFET
03aa17
120
03pa87
3.00
Pder
ID
(%)
(A)
80
2.00
40
1.00
0.00
0
0
50
100
150
0
200
40
80
120
Tsp (°C)
160
Tsp (°C)
P tot
P der = ----------------------- × 100%
P
°
tot ( 25 C )
Fig 4. Normalized total power dissipation as a
function of solder point temperature.
Fig 5. Continuous drain current as a function of
solder point temperature.
5. Thermal characteristics
Table 4:
Thermal characteristics
Symbol
Parameter
Rth(j-sp)
thermal resistance from junction to mounted on thermo clad board
solder point.
one device active
Conditions
all devices active
Typ
Max
Unit
-
-
45
K/W
-
-
13.3
K/W
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
9397 750 10955
Product data
Min
Rev. 01 — 31 March 2003
5 of 15
BUK1M200-50SGTD
Philips Semiconductors
Quad channel logic level TOPFET
6. Static characteristics
Table 5:
Static characteristics
Limits are valid for −40 °C ≤ Tsp ≤ +150 °C and typical values for Tsp = 25 °C unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VIS = 0 V; ID = 10 mA
50
-
-
V
VIS = 0 V; ID = 200 mA; tp ≤ 300 µs;
δ ≤ 0.01; Figure 18
50
62
70
V
VIS = 0 V; VDS = 40 V
-
-
100
µA
-
0.05
10
µA
VIS ≥ 4 V; tp ≤ 300 µs; δ ≤ 0.01;
ID = 100 mA
-
-
380
mΩ
Tsp = 25 °C; Figure 8 and 9
-
150
200
mΩ
0.6
-
2.4
V
1.1
1.6
2.1
V
VIS = 5 V
100
220
400
µA
VIS = 4 V
80
195
330
µA
1.4
2
2.5
mA
mA
Off-state output characteristics
VDS(CL)
IDSS
drain-source clamping voltage
drain-source leakage current
Tsp = 25 °C; Figure 19
On-state output characteristic
RDSon
drain-source on-state resistance
Input characteristics
VIS(th)
[1]
input-source threshold voltage
VDS = 5 V; ID = 1 mA
Tsp = 25 °C; Figure 13
input supply current
IIS
normal operation
protection latched
VIS = 5 V
VIS = 3 V; Figure 14 and 16
0.7
1.1
1.5
[2]
1.5
2
2.5
V
[3]
10
40
100
µs
5.5
-
8.5
V
-
2.5
-
kΩ
Tsp = 25 C; Figure 11
4
6.1
8
A
Figure 10
3
6.1
9
A
4 V ≤ VIS ≤ 5.5 V; Figure 12
150
170
-
°C
IS = 2 A; VIS = 0 V; tp = 300 µs
-
0.83
1.1
V
trst ≥ 100 µs; Figure 17
VIS(rst)
input-source reset voltage
trst(latch)
latch reset time
VIS(CL)
input-source clamping voltage
II = 1.5 mA; Figure 15
[4]
input-gate resistance
RIG
Overload protection characteristic
ID(th)(trip)
[5]
drain current trip threshold
4 V ≤ VIS ≤ 5.5 V
Overtemperature protection characteristic
Tj(th)
threshold junction temperature
Source drain diode characteristic
source-drain (diode forward)
voltage
VSD
[1]
[2]
[3]
[4]
[5]
The supply for the logic and overload protection is taken from the input.
The input voltage below which the overload protection circuits will be reset.
To reset the protection circuitry from the latched state, VIS is reduced from 5 V to 1 V.
Not directly measurable from device terminals.
The TOPFET switches off to protect itself when one of the overload thresholds is exceeded. It remains latched off until reset by the
input.
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
9397 750 10955
Product data
Rev. 01 — 31 March 2003
6 of 15
BUK1M200-50SGTD
Philips Semiconductors
Quad channel logic level TOPFET
03pa71
2.5
03pa73
500
a
RDSon
(mΩ)
2
375
1.5
250
1
125
0.5
0
0
-50
0
50
100 T ( C) 150
j °
Fig 6. Normalized drain-source on-state resistance
factor as a function of junction temperature.
03pa89
6
ID
(A)
2
4
6
8
VIS (V)
Tj = 25 °C; ID = 100 mA; tp = 300 µs
R DSon
a = ----------------------------R DSon ( 25°C )
5V
0
ID
(A)
3.2 V
3V
4
03pa88
6
4V
3.4 V
Fig 7. Drain-source on-state resistance as a function
of input-source voltage; typical values.
4
2.8 V
2.6 V
2
VIS = 2.2 V
2
2.4 V
0
0
0
2
4
6
8
0
VDS (V)
Fig 8. Output characteristics; drain current as a
function of drain-source voltage; typical values.
2
3
VIS (V)
4
Fig 9. Transfer characteristics; drain current as a
function of input-source voltage; typical values.
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
9397 750 10955
Product data
1
Rev. 01 — 31 March 2003
7 of 15
BUK1M200-50SGTD
Philips Semiconductors
Quad channel logic level TOPFET
03pb 02
9
03pb 01
9
ID(th)(trip)
ID(th)(trip)
(A)
(A)
6
6
3
3
0
0
-50
0
50
100
Tj (°C)
0
150
Tj = 25 °C; tp = 300 µs
2
4
VIS (V)
6
Tj = 25 °C; VDS = 10 V; tp = 300 µs
Fig 10. Drain current trip threshold as a function of
junction temperature; typical values.
03pa76
200
Fig 11. Drain current trip threshold as a function of
input-source voltage; typical values.
03pa77
2.5
Tj(th)
(°C)
VIS(th)
(V)
2
max.
190
typ.
1.5
180
min.
1
170
0.5
0
160
0
2
4
6
8
10
-50
0
50
VIS (V)
VDS = 5 V; VIS = 5 V; tp = 300 µs
Tj = 25 °C; VDS = 5 V; tp = 300 µs
Fig 12. Overtemperature protection characteristic;
threshold junction temperature as a function of
input-source voltage; typical values.
Fig 13. Input-source threshold voltage as a function of
junction temperature.
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
9397 750 10955
Product data
100 T ( C) 150
j °
Rev. 01 — 31 March 2003
8 of 15
BUK1M200-50SGTD
Philips Semiconductors
Quad channel logic level TOPFET
03pa91
6
03pa79
10
II
(mA)
IIS
(mA)
8
4
6
4
2
(1)
2
(2)
0
0
0
2
4
6
0
8
VIS (V)
Tj = 25 °C
2
4
6 V (V)
IS
8
Tj = 25 °C
(1) Input-source current; protection latched.
(2) Input-source current; normal operation.
Fig 14. Input-source current as a function of
input-source voltage; typical values.
Fig 15. Input clamping characteristic; input current as
a function of input-source voltage; typical
values.
03pa86
2.4
03pa82
2.4
(1)
IIS
(mA)
VIS(rst)
(V)
1.6
2.2
(2)
0.8
2
(3)
(4)
0
1.8
-50
0
50
100
150
Tj (°C)
-50
20
90
Tj (°C)
160
tr = 100 µs
(1) VIS = 5 V; protection latched
(2) VIS = 3 V; protection latched
(3) VIS = 5 V; normal operation
(4) VIS = 4 V; normal operation
Fig 16. Input-source current as a function of junction
temperature; typical values.
Fig 17. Input-source reset voltage as a function of
junction temperature; typical values.
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
9397 750 10955
Product data
Rev. 01 — 31 March 2003
9 of 15
BUK1M200-50SGTD
Philips Semiconductors
Quad channel logic level TOPFET
03pa83
400
03pa84
10-5
ID
(mA)
IDSS
(A)
300
10-6
200
10-7
100
10-8
0
57
59
61
63
65
67
VDS (V)
VIS = 0 V; tp = 300 µs
-50
50
100
Tj (°C)
150
VDS = 40 V; VIS = 0 V
Fig 18. Overvoltage clamping characteristic; drain
current as a function of drain-source voltage;
typical values.
Fig 19. Drain-source leakage current as a function of
junction temperature; typical values.
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
9397 750 10955
Product data
0
Rev. 01 — 31 March 2003
10 of 15
BUK1M200-50SGTD
Philips Semiconductors
Quad channel logic level TOPFET
7. Dynamic characteristics
Table 6:
Switching characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
td(on)
turn-on delay time
-
0.5
0.9
µs
tr
rise time
RL = 50 Ω; ID = 250 mA; VIS = 5 V;
Tsp = 25 °C; Figure 20 and 21
-
0.7
1.5
µs
td(off)
turn-off delay time
-
3.2
6.5
µs
tf
fall time
-
1.6
3.5
µs
Switching
td(on)
td(off)
tf
RL
tr
90%
VDS
VDS
10%
VDD
P
90%
VIS
VIS
10%
MBL854
MBL853
Fig 20. Test circuit for resistive load switching times.
Fig 21. Resistive load switching waveforms.
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
9397 750 10955
Product data
Rev. 01 — 31 March 2003
11 of 15
BUK1M200-50SGTD
Philips Semiconductors
Quad channel logic level TOPFET
8. Package outline
SO20: plastic small outline package; 20 leads; body width 7.5 mm
SOT163-1
D
E
A
X
c
HE
y
v M A
Z
20
11
Q
A2
A
(A 3)
A1
pin 1 index
θ
Lp
L
10
1
e
detail X
w M
bp
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (1)
e
HE
L
Lp
Q
v
w
y
mm
2.65
0.30
0.10
2.45
2.25
0.25
0.49
0.36
0.32
0.23
13.0
12.6
7.6
7.4
1.27
10.65
10.00
1.4
1.1
0.4
1.1
1.0
0.25
0.25
0.1
0.9
0.4
inches
0.10
0.012 0.096
0.004 0.089
0.01
0.019 0.013
0.014 0.009
0.51
0.49
0.30
0.29
0.050
0.419
0.043
0.055
0.394
0.016
0.043
0.039
0.01
0.01
0.004
0.035
0.016
Z
(1)
θ
8o
0o
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
REFERENCES
OUTLINE
VERSION
IEC
JEDEC
SOT163-1
075E04
MS-013
EIAJ
EUROPEAN
PROJECTION
ISSUE DATE
97-05-22
99-12-27
Fig 22.
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
9397 750 10955
Product data
Rev. 01 — 31 March 2003
12 of 15
BUK1M200-50SGTD
Philips Semiconductors
Quad channel logic level TOPFET
9. Revision history
Table 7:
Revision history
Rev Date
01
20030331
CPCN
Description
-
Product data (9397 750 10955)
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
9397 750 10955
Product data
Rev. 01 — 31 March 2003
13 of 15
BUK1M200-50SGTD
Philips Semiconductors
Quad channel logic level TOPFET
10. Data sheet status
Level
Data sheet status[1]
Product status[2][3]
Definition
I
Objective data
Development
This data sheet contains data from the objective specification for product development. Philips
Semiconductors reserves the right to change the specification in any manner without notice.
II
Preliminary data
Qualification
This data sheet contains data from the preliminary specification. Supplementary data will be published
at a later date. Philips Semiconductors reserves the right to change the specification without notice, in
order to improve the design and supply the best possible product.
III
Product data
Production
This data sheet contains data from the product specification. Philips Semiconductors reserves the
right to make changes at any time in order to improve the design, manufacturing and supply. Relevant
changes will be communicated via a Customer Product/Process Change Notification (CPCN).
[1]
Please consult the most recently issued data sheet before initiating or completing a design.
[2]
The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at
URL http://www.semiconductors.philips.com.
[3]
For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
11. Definitions
customers using or selling these products for use in such applications do so
at their own risk and agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Short-form specification — The data in a short-form specification is
extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Right to make changes — Philips Semiconductors reserves the right to
make changes in the products - including circuits, standard cells, and/or
software - described or contained herein in order to improve design and/or
performance. When the product is in full production (status ‘Production’),
relevant changes will be communicated via a Customer Product/Process
Change Notification (CPCN). Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no
licence or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are
free from patent, copyright, or mask work right infringement, unless otherwise
specified.
Limiting values definition — Limiting values given are in accordance with
the Absolute Maximum Rating System (IEC 60134). Stress above one or
more of the limiting values may cause permanent damage to the device.
These are stress ratings only and operation of the device at these or at any
other conditions above those given in the Characteristics sections of the
specification is not implied. Exposure to limiting values for extended periods
may affect device reliability.
Application information — Applications that are described herein for any
of these products are for illustrative purposes only. Philips Semiconductors
make no representation or warranty that such applications will be suitable for
the specified use without further testing or modification.
13. Trademarks
12. Disclaimers
TOPFET — is a trademark of Koninklijke Philips Electronics N.V.
TrenchMOS — is a trademark of Koninklijke Philips Electronics N.V.
Life support — These products are not designed for use in life support
appliances, devices, or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors
Contact information
For additional information, please visit http://www.semiconductors.philips.com.
For sales office addresses, send e-mail to: [email protected]
Product data
Fax: +31 40 27 24825
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
9397 750 10955
Rev. 01 — 31 March 2003
14 of 15
Philips Semiconductors
BUK1M200-50SGTD
Quad channel logic level TOPFET
Contents
1
1.1
1.2
1.3
1.4
2
2.1
3
4
5
6
7
8
9
10
11
12
13
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Quick reference data. . . . . . . . . . . . . . . . . . . . . 1
Pinning information . . . . . . . . . . . . . . . . . . . . . . 2
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 2
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4
Thermal characteristics. . . . . . . . . . . . . . . . . . . 5
Static characteristics. . . . . . . . . . . . . . . . . . . . . 6
Dynamic characteristics . . . . . . . . . . . . . . . . . 11
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 12
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 13
Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 14
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
© Koninklijke Philips Electronics N.V. 2003.
Printed in The Netherlands
All rights are reserved. Reproduction in whole or in part is prohibited without the prior
written consent of the copyright owner.
The information presented in this document does not form part of any quotation or
contract, is believed to be accurate and reliable and may be changed without notice. No
liability will be accepted by the publisher for any consequence of its use. Publication
thereof does not convey nor imply any license under patent- or other industrial or
intellectual property rights.
Date of release: 31 March 2003
Document order number: 9397 750 10955
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