Data Sheet

PBRN113Z series
NPN 800 mA, 40 V BISS RETs; R1 = 1 kΩ, R2 = 10 kΩ
Rev. 01 — 26 February 2007
Product data sheet
1. Product profile
1.1 General description
800 mA NPN low VCEsat Breakthrough In Small Signal (BISS) Resistor-Equipped
Transistors (RET) family in small plastic packages.
Table 1.
Product overview
Type number
Package
NXP
JEITA
JEDEC
PBRN113ZK
SOT346
SC-59A
TO-236
PBRN113ZS[1]
SOT54
SC-43A
TO-92
PBRN113ZT
SOT23
-
TO-236AB
[1]
Also available in SOT54A and SOT54 variant packages (see Section 2).
1.2 Features
n 800 mA output current capability
n Low collector-emitter saturation voltage
VCEsat
n Reduces component count
n Reduces pick and place costs
n ±10 % resistor ratio tolerance
n High current gain hFE
n Built-in bias resistors
n Simplifies circuit design
1.3 Applications
n Digital application in automotive and
industrial segments
n Medium current peripheral driver
n Switching loads
1.4 Quick reference data
Table 2.
Quick reference data
Symbol
Parameter
Conditions
VCEO
collector-emitter voltage
open base
IO
output current
Min
Typ
Max
Unit
-
-
40
V
PBRN113ZK, PBRN113ZT
-
-
600
mA
PBRN113ZS
-
-
800
mA
[1]
PBRN113Z series
NXP Semiconductors
NPN 800 mA, 40 V BISS RETs; R1 = 1 kΩ, R2 = 10 kΩ
Table 2.
Quick reference data …continued
Symbol
Parameter
IORM
repetitive peak output current
Conditions
PBRN113ZK, PBRN113ZT tp ≤ 1 ms; δ ≤ 0.33
Min
Typ
Max
Unit
-
-
800
mA
kΩ
R1
bias resistor 1 (input)
0.7
1
1.3
R2/R1
bias resistor ratio
9
10
11
[1]
Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard
footprint.
2. Pinning information
Table 3.
Pinning
Pin
Description
Simplified outline
Symbol
SOT54
1
input (base)
2
output (collector)
3
2
R1
GND (emitter)
1
2
3
1
R2
001aab347
3
006aaa145
SOT54A
1
input (base)
2
output (collector)
3
2
R1
GND (emitter)
1
2
1
R2
3
001aab348
3
006aaa145
SOT54 variant
1
input (base)
2
output (collector)
3
2
R1
GND (emitter)
1
2
3
1
R2
001aab447
3
006aaa145
SOT23; SOT346
1
input (base)
2
GND (emitter)
3
3
3
R1
output (collector)
1
R2
1
2
006aaa144
PBRN113Z_SER_1
Product data sheet
2
sym007
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 26 February 2007
2 of 17
PBRN113Z series
NXP Semiconductors
NPN 800 mA, 40 V BISS RETs; R1 = 1 kΩ, R2 = 10 kΩ
3. Ordering information
Table 4.
Ordering information
Type number
Package
Name
Description
Version
PBRN113ZK
SC-59A
plastic surface-mounted package; 3 leads
SOT346
PBRN113ZS[1]
SC-43A
plastic single-ended leaded (through hole) package; SOT54
3 leads
PBRN113ZT
-
plastic surface-mounted package; 3 leads
[1]
SOT23
Also available in SOT54A and SOT54 variant packages (see Section 2 and Section 9).
4. Marking
Table 5.
Marking codes
Type number
Marking code[1]
PBRN113ZK
G5
PBRN113ZS
N113ZS
PBRN113ZT
*7L
[1]
* = -: made in Hong Kong
* = p: made in Hong Kong
* = t: made in Malaysia
* = W: made in China
5. Limiting values
Table 6.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Min
Max
Unit
VCBO
collector-base voltage
open emitter
-
40
V
VCEO
collector-emitter voltage
open base
-
40
V
VEBO
emitter-base voltage
open collector
-
5
V
VI
input voltage
positive
-
+10
V
negative
-
−5
V
[1]
-
600
mA
[2][3]
-
700
mA
[1]
-
800
mA
-
800
mA
IO
output current
PBRN113ZK, PBRN113ZT
PBRN113ZS
IORM
repetitive peak output current
PBRN113ZK, PBRN113ZT tp ≤ 1 ms; δ ≤ 0.33
PBRN113Z_SER_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 26 February 2007
3 of 17
PBRN113Z series
NXP Semiconductors
NPN 800 mA, 40 V BISS RETs; R1 = 1 kΩ, R2 = 10 kΩ
Table 6.
Limiting values …continued
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Ptot
total power dissipation
Tamb ≤ 25 °C
PBRN113ZK, PBRN113ZT
PBRN113ZS
Min
Max
Unit
[1]
-
250
mW
[2]
-
370
mW
[3]
-
570
mW
[1]
-
700
mW
Tj
junction temperature
-
150
°C
Tamb
ambient temperature
−65
+150
°C
Tstg
storage temperature
−65
+150
°C
[1]
Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2]
Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm2.
[3]
Device mounted on a ceramic PCB, Al2O3, standard footprint.
006aaa998
600
(1)
Ptot
(mW)
400
(2)
(3)
200
0
−75
−25
25
75
125
175
Tamb (°C)
(1) Ceramic PCB, Al2O3, standard footprint
(2) FR4 PCB, mounting pad for collector 1 cm2
(3) FR4 PCB, standard footprint
Fig 1. Power derating curves for SOT23 (TO-236AB) and SOT346 (SC-59A/TO-236)
PBRN113Z_SER_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 26 February 2007
4 of 17
PBRN113Z series
NXP Semiconductors
NPN 800 mA, 40 V BISS RETs; R1 = 1 kΩ, R2 = 10 kΩ
006aaa999
800
Ptot
(mW)
600
400
200
0
−75
−25
25
75
125
175
Tamb (°C)
FR4 PCB, standard footprint
Fig 2. Power derating curve for SOT54 (SC-43A/TO-92)
6. Thermal characteristics
Table 7.
Thermal characteristics
Symbol
Parameter
Conditions
Rth(j-a)
thermal resistance from junction in free air
to ambient
PBRN113ZK, PBRN113ZT
PBRN113ZS
Rth(j-sp)
Typ
Max
Unit
[1]
-
-
500
K/W
[2]
-
-
338
K/W
[3]
-
-
219
K/W
[1]
-
-
179
K/W
-
-
105
K/W
thermal resistance from junction
to solder point
PBRN113ZK, PBRN113ZT
[1]
Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2]
Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm2.
[3]
Device mounted on a ceramic PCB, Al2O3, standard footprint.
PBRN113Z_SER_1
Product data sheet
Min
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 26 February 2007
5 of 17
PBRN113Z series
NXP Semiconductors
NPN 800 mA, 40 V BISS RETs; R1 = 1 kΩ, R2 = 10 kΩ
006aab000
103
δ=1
Zth(j-a)
(K/W)
0.75
0.50
102
0.33
0.20
0.10
0.05
10
0.02
0.01
1
0
10−1
10−5
10−4
10−3
10−2
10−1
1
10
102
103
tp (s)
FR4 PCB, standard footprint
Fig 3. Transient thermal impedance from junction to ambient as a function of pulse duration for
SOT23 (TO-236AB) and SOT346 (SC-59A/TO-236); typical values
006aab001
103
Zth(j-a)
(K/W)
δ=1
102
0.75
0.50
0.33
0.20
0.10
0.05
10
0.02
0.01
1
0
10−1
10−5
10−4
10−3
10−2
10−1
1
10
102
103
tp (s)
FR4 PCB, mounting pad for collector 1 cm2
Fig 4. Transient thermal impedance from junction to ambient as a function of pulse duration for
SOT23 (TO-236AB) and SOT346 (SC-59A/TO-236); typical values
PBRN113Z_SER_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 26 February 2007
6 of 17
PBRN113Z series
NXP Semiconductors
NPN 800 mA, 40 V BISS RETs; R1 = 1 kΩ, R2 = 10 kΩ
006aab002
103
Zth(j-a)
(K/W)
δ=1
102
0.75
0.50
0.33
0.20
0.10
10
0.05
0.02
0.01
0
1
10−1
10−5
10−4
10−3
10−2
10−1
1
10
102
103
tp (s)
Ceramic PCB, Al2O3, standard footprint
Fig 5. Transient thermal impedance from junction to ambient as a function of pulse duration for
SOT23 (TO-236AB) and SOT346 (SC-59A/TO-236); typical values
006aab003
103
Zth(j-a)
(K/W)
δ=1
102
0.75
0.50
0.33
0.20
0.10
10
0.05
0.02
0.01
1
10−5
0
10−4
10−3
10−2
10−1
1
10
102
103
tp (s)
FR4 PCB, standard footprint
Fig 6. Transient thermal impedance from junction to ambient as a function of pulse duration for
SOT54 (SC-43A/TO-92); typical values
PBRN113Z_SER_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 26 February 2007
7 of 17
PBRN113Z series
NXP Semiconductors
NPN 800 mA, 40 V BISS RETs; R1 = 1 kΩ, R2 = 10 kΩ
7. Characteristics
Table 8.
Characteristics
Tamb = 25 °C unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
ICBO
collector-base cut-off
current
VCB = 30 V;
IE = 0 A
-
-
100
nA
ICEO
collector-emitter cut-off
current
VCE = 30 V;
IB = 0 A
-
-
0.5
µA
IEBO
emitter-base cut-off
current
VEB = 5 V;
IC = 0 A
-
-
0.8
mA
hFE
DC current gain
VCE = 5 V;
IC = 50 mA
300
450
-
VCEsat
collector-emitter
saturation voltage
VCE = 5 V;
IC = 300 mA
[1]
500
750
-
VCE = 5 V;
IC = 600 mA
[1]
500
720
-
VCE = 5 V;
IC = 800 mA
[1]
450
650
-
IC = 50 mA;
IB = 2.5 mA
-
25
35
mV
IC = 200 mA;
IB = 10 mA
-
60
85
mV
IC = 500 mA;
IB = 10 mA
[1]
-
160
220
mV
IC = 600 mA;
IB = 6 mA
[1]
-
270
550
mV
IC = 800 mA;
IB = 8 mA
[1]
-
0.56
1.15
V
VI(off)
off-state input voltage
VCE = 5 V;
IC = 100 µA
0.3
0.5
1
V
VI(on)
on-state input voltage
VCE = 0.3 V;
IC = 20 mA
0.4
0.7
1.4
V
R1
bias resistor 1 (input)
0.7
1
1.3
kΩ
R2/R1
bias resistor ratio
Cc
collector capacitance
[1]
VCB = 10 V;
IE = ie = 0 A;
f = 1 MHz
10
11
7
-
pF
Pulse test: tp ≤ 300 µs; δ ≤ 0.02.
PBRN113Z_SER_1
Product data sheet
9
-
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 26 February 2007
8 of 17
PBRN113Z series
NXP Semiconductors
NPN 800 mA, 40 V BISS RETs; R1 = 1 kΩ, R2 = 10 kΩ
006aab010
104
hFE
(1)
(2)
(3)
103
006aab011
10−1
VCEsat
(V)
(1)
(2)
10−2
102
(3)
10
1
10−1
1
102
10
103
10−3
1
102
10
IC (mA)
VCE = 5 V
IC/IB = 20
(1) Tamb = 100 °C
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(2) Tamb = 25 °C
(3) Tamb = −40 °C
(3) Tamb = −40 °C
Fig 7. DC current gain as a function of collector
current; typical values
006aab012
1
103
IC (mA)
Fig 8. Collector-emitter saturation voltage as a
function of collector current; typical values
006aab013
1
VCEsat
(V)
VCEsat
(V)
10−1
10−1
(1)
(2)
(1)
(3)
(2)
(3)
10−2
1
10
102
103
10−2
1
IC (mA)
102
103
IC (mA)
IC/IB = 50
IC/IB = 100
(1) Tamb = 100 °C
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(2) Tamb = 25 °C
(3) Tamb = −40 °C
(3) Tamb = −40 °C
Fig 9. Collector-emitter saturation voltage as a
function of collector current; typical values
Fig 10. Collector-emitter saturation voltage as a
function of collector current; typical values
PBRN113Z_SER_1
Product data sheet
10
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 26 February 2007
9 of 17
PBRN113Z series
NXP Semiconductors
NPN 800 mA, 40 V BISS RETs; R1 = 1 kΩ, R2 = 10 kΩ
006aab014
10
Vl(on)
(V)
006aab015
10
Vl(off)
(V)
1
10−1
10−1
1
(2)
(1)
(2)
(3)
(3)
(1)
1
10
102
103
10−1
10−1
IC (mA)
VCE = 0.3 V
102
10
IC (mA)
VCE = 5 V
(1) Tamb = −40 °C
(1) Tamb = −40 °C
(2) Tamb = 25 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
(3) Tamb = 100 °C
Fig 11. On-state input voltage as a function of collector
current; typical values
Fig 12. Off-state input voltage as a function of collector
current; typical values
PBRN113Z_SER_1
Product data sheet
1
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 26 February 2007
10 of 17
PBRN113Z series
NXP Semiconductors
NPN 800 mA, 40 V BISS RETs; R1 = 1 kΩ, R2 = 10 kΩ
8. Package outline
1.3
1.0
3.1
2.7
3
0.45
0.38
4.2
3.6
0.6
0.2
0.48
0.40
3.0 1.7
2.5 1.3
1
2
4.8
4.4
1
2.54
3
1.27
2
0.50
0.35
1.9
0.26
0.10
Dimensions in mm
5.2
5.0
Dimensions in mm
04-11-11
Fig 13. Package outline SOT346 (SC-59A/TO-236)
04-11-16
Fig 14. Package outline SOT54 (SC-43A/TO-92)
0.45
0.38
0.45
0.38
4.2
3.6
14.5
12.7
4.2
3.6
1.27
0.48
0.40
3 max
1
2.5
max
0.48
0.40
1
2
4.8
4.4
5.08
2
4.8
4.4
2.54
2.54
3
1.27
3
5.2
5.0
5.2
5.0
14.5
12.7
Dimensions in mm
04-06-28
14.5
12.7
Dimensions in mm
Fig 15. Package outline SOT54A
05-01-10
Fig 16. Package outline SOT54 variant
3.0
2.8
1.1
0.9
3
0.45
0.15
2.5 1.4
2.1 1.2
1
2
1.9
0.48
0.38
Dimensions in mm
0.15
0.09
04-11-04
Fig 17. Package outline SOT23 (TO-236AB)
PBRN113Z_SER_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 26 February 2007
11 of 17
PBRN113Z series
NXP Semiconductors
NPN 800 mA, 40 V BISS RETs; R1 = 1 kΩ, R2 = 10 kΩ
9. Packing information
Table 9.
Packing methods
The indicated -xxx are the last three digits of the 12NC ordering code.[1]
Type number
Package
Description
Packing quantity
3000
5000
10000
PBRN113ZK
SOT346
4 mm pitch, 8 mm tape and reel
-115
-
-135
PBRN113ZS
SOT54
bulk, straight leads
-
-412
-
SOT54A
tape and reel, wide pitch
-
-
-116
tape ammopack, wide pitch
-
-
-126
PBRN113ZT
[1]
SOT54 variant bulk, delta pinning
-
-112
-
SOT23
-215
-
-235
4 mm pitch, 8 mm tape and reel
For further information and the availability of packing methods, see Section 13.
10. Soldering
3.30
1.00
0.70 (3x)
0.60 (3x)
0.70
(3x)
3
0.95
3.15
3.40
1.55
0.95
1
2
1.20
2.60
2.90
solder lands
solder resist
solder paste
occupied area
sot346
Dimensions in mm
Fig 18. Reflow soldering footprint SOT346 (SC-59A/TO-236)
PBRN113Z_SER_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 26 February 2007
12 of 17
PBRN113Z series
NXP Semiconductors
NPN 800 mA, 40 V BISS RETs; R1 = 1 kΩ, R2 = 10 kΩ
4.70
2.80
solder lands
solder resist
occupied area
Dimensions in mm
3
5.20 4.60 1.20
1
2
sot346
1.20 (2x)
3.40
preferred transport direction during soldering
Fig 19. Wave soldering footprint SOT346 (SC-59A/TO-236)
2.90
2.50
0.85
2
1
solder lands
1.30
3.00
0.85
2.70
solder resist
solder paste
3
occupied area
0.60
(3x)
Dimensions in mm
0.50 (3x)
0.60 (3x)
1.00
3.30
sot023
Fig 20. Reflow soldering footprint SOT23 (TO-236AB)
PBRN113Z_SER_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 26 February 2007
13 of 17
PBRN113Z series
NXP Semiconductors
NPN 800 mA, 40 V BISS RETs; R1 = 1 kΩ, R2 = 10 kΩ
3.40
1.20 (2x)
solder lands
solder resist
occupied area
2
1
4.60 4.00 1.20
3
Dimensions in mm
2.80
preferred transport direction during soldering
4.50
sot023
Fig 21. Wave soldering footprint SOT23 (TO-236AB)
PBRN113Z_SER_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 26 February 2007
14 of 17
PBRN113Z series
NXP Semiconductors
NPN 800 mA, 40 V BISS RETs; R1 = 1 kΩ, R2 = 10 kΩ
11. Revision history
Table 10.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
PBRN113Z_SER_1
20070226
Product data sheet
-
-
PBRN113Z_SER_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 26 February 2007
15 of 17
PBRN113Z series
NXP Semiconductors
NPN 800 mA, 40 V BISS RETs; R1 = 1 kΩ, R2 = 10 kΩ
12. Legal information
12.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
12.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
12.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of a NXP Semiconductors product can reasonably be expected to
result in personal injury, death or severe property or environmental damage.
NXP Semiconductors accepts no liability for inclusion and/or use of NXP
Semiconductors products in such equipment or applications and therefore
such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
12.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
13. Contact information
For additional information, please visit: http://www.nxp.com
For sales office addresses, send an email to: [email protected]
PBRN113Z_SER_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 26 February 2007
16 of 17
PBRN113Z series
NXP Semiconductors
NPN 800 mA, 40 V BISS RETs; R1 = 1 kΩ, R2 = 10 kΩ
14. Contents
1
1.1
1.2
1.3
1.4
2
3
4
5
6
7
8
9
10
11
12
12.1
12.2
12.3
12.4
13
14
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
General description. . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Quick reference data. . . . . . . . . . . . . . . . . . . . . 1
Pinning information . . . . . . . . . . . . . . . . . . . . . . 2
Ordering information . . . . . . . . . . . . . . . . . . . . . 3
Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3
Thermal characteristics. . . . . . . . . . . . . . . . . . . 5
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 11
Packing information. . . . . . . . . . . . . . . . . . . . . 12
Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 15
Legal information. . . . . . . . . . . . . . . . . . . . . . . 16
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 16
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Contact information. . . . . . . . . . . . . . . . . . . . . 16
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2007.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 26 February 2007
Document identifier: PBRN113Z_SER_1
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