A8513 Datasheet

A8513
Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
Features and Benefits
Description
• AEC-Q100 Qualified
• Wide input voltage range of 4.5 to 40 V for start/stop,
cold crank and load dump requirements
• Boost converter switching frequency up to 2 MHz,
allowing operation above the AM band
• Excellent input voltage transient response
• Internal secondary OVP for redundant protection
• Fully integrated LED current sink and boost converter with
60 V DMOS FET
• Maximum LED current of 150 mA
• Drives up to 14 series LEDs
• Single EN/PWM pin interface for PWM Dimming and
Enable function
• 5000:1 PWM dimming at 200 Hz
The A8513 is a single-output white LED (WLED) driver for
LCD backlighting. It integrates a current-mode boost converter
with an internal power switch and one current sink. The A8513
can operate from a single power supply from 4.5 to 40 V,
to accommodate start/stop, cold crank, and load dump
requirements. A 2 MHz boost converter switching frequency
allows the A8513 to operate above the AM radio band.
Continued on the next page…
If required, the fault flag can be used as part of a circuit to drive
an external P-FET to disconnect the input supply from the system
in the event of a fault. The A8513 provides protection against
output short and overvoltage, open or shorted diode, open or
shorted LED pin, shorted boost switch or inductor, shorted
ISET resistor, and IC overtemperature. A dual level cycle-bycycle current limit function provides soft start and protects the
internal current switch against high current overloads.
The A8513 is provided in a 10-pin MSOP package (suffix LY)
and a 16-pin TSSOP package (suffix LP). Both packages have
an exposed thermal pad for enhanced thermal dissipation, and
are lead (Pb) free, with 100% matte tin leadframe plating.
Packages:
16-pin TSSOP
with exposed thermal pad
(LP package)
Not to scale
10-pin MSOP
with exposed thermal pad
(LY package)
Applications:
• LCD backlighting for:
▫ Automotive infotainment
▫ Automotive cluster
▫ Automotive center stack
▫ Industrial LCD displays
▫ Portable DVD players
▫ Flatbed Scanners
▫ LED Lighting
Typical Application Circuit
VIN
L1
CIN
VOUT
D1
SW
VIN
VC
CVDD
A8513
VDD
ROVP1
COUT
OVP
ROVP2
PAD
FAULT
EN/PWM
LED
ISET
RISET
COMP
GND
CP
RZ (Optional)
CZ (Optional)
A8513-DS Rev. 3
Boost fSW
(MHz)
VIN (min)
(V)
LEDs per
String (max)
0.25/0.5/1
5
14
2
10
14
2
8
12
2
6
9
2
5
7
Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8513
Features and Benefits (continued)
• Fault flag pin to alert the controller to a myriad of possible
fault conditions
• Protection Features:
▫ Shorted output
▫ Open or shorted LED pin
▫ Output undervoltage and overvoltage
▫ Input undervoltage
▫ Shorted boost switch or inductor
▫ Shorted ISET resistor
▫ Open boost Schottky
▫ Overtemperature
Selection Guide
Part Number
Oscillator Frequency, fSW
(MHz)
A8513KLYTR-T
2
Package
4000 pieces per 13-in. reel
A8513KLYTR-1-T
1
A8513KLYTR-2-T
0.5
A8513KLYTR-3-T
0.25
A8513KLPTR-T
Packing*
Contact factory for availability
2
10-pin MSOP with exposed thermal pad
4000 pieces per 13-in. reel
A8513KLPTR-1-T
1
A8513KLPTR-2-T
0.5
A8513KLPTR-3-T
0.25
Contact factory for availability
16-pin TSSOP with exposed thermal pad
*Contact Allegro™ for additional packing options
Absolute Maximum Ratings*
Characteristic
LED Pin
OVP Pin
¯Ā¯Ū¯L̄¯T̄
¯ Pins
VIN and F̄
Symbol
Rating
Unit
VLED
–0.3 to 55
V
VOVP
–0.3 to 60
V
VIN , VFAULT
-0.3 to 40
V
–0.6 to 60
V
–1.0
V
SW Pin
VSW
ISET Pin
VISET
Notes
Continuous
t < 50 ns
All Other Pins
V
–0.3 to 7
V
Operating Ambient Temperature
TA
–40 to 125
ºC
Maximum Junction Temperature
TJ(max)
150
ºC
Tstg
–55 to 150
ºC
Storage Temperature
Range K
–0.3 to 5.5
*Stresses beyond those listed in this table may cause permanent damage to the device. The Absolute Maximum ratings are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the Electrical
Characteristics table is not implied. Exposure to Absolute Maximum-rated conditions for extended periods may affect device reliability.
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
2
Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8513
Pin-out Diagram
NC 1
16 NC
NC 2
15 COMP
SW 3
14 GND
SW 1
OVP 4
13 GND
OVP 2
12 ISET
VIN 3
PAD
VIN 5
8 ISET
7 EN/PWM
6 LED
VDD 5
10 LED
VDD 7
9 GND
PAD
FAULT 4
11 EN/PWM
FAULT 6
10 COMP
9 NC
NC 8
LP Package
LY Package
Terminal List Table
Name
Number
Function
LP
LY
COMP
15
10
Output of the error amplifier and compensation node. Connect compensation network from
this pin to GND for control loop compensation.
¯Ā¯Ū¯L̄¯T̄
¯
F̄
6
4
This pin is used to indicate fault conditions. Logic low indicates that the A8513 has
a fault present.
GND
13,14
9
Ground.
ISET
12
8
Connect the RISET resistor between this pin and GND to set the 100% LED current level.
LED
10
6
Connect the cathode of the LED string to this pin.
NC
1,2,8,9,16
–
No connection.
OVP
4
2
This pin is used to sense an overvoltage condition. Connect a resistive divider from the
VOUT node to this pin to adjust the Overvoltage Protection (OVP).
PAD
–
–
Exposed pad of the package providing enhanced thermal dissipation. This pad must be
connected to the ground plane(s) of the PCB with at least 8 thermal vias, directly in the pad.
EN/PWM
11
7
PWM dimming pin. Used to control LED intensity by using pulse width modulation.
SW
3
1
The drain of the internal NMOS switch of the boost converter.
VDD
7
5
Output of internal LDO. Connect a 0.1 μF decoupling capacitor between this pin and GND.
VIN
5
3
Input power to the A8513.
Thermal Characteristics*may require derating at maximum conditions, see application information
Characteristic
Symbol
Test Conditions*
LP package
Package Thermal Resistance
(Junction to Ambient)
RθJA
LY package
Package Thermal Resistance
(Junction to Pad)
Value
Unit
34
ºC/W
43
ºC/W
On 4-layer PCB based on JEDEC standard
48
ºC/W
On 2-layer PCB with 2.5 in.2 of copper area each side
48
ºC/W
2
ºC/W
On 4-layer PCB based on JEDEC standard
On 2-layer PCB with 3.8
RθJP
in.2
of copper area each side
*To be verified by characterization. Additional thermal information available on the Allegro™ website.
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
3
Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8513
Functional Block Diagram
VDD
SW
Internal VCC
Regulator
UVLO
VIN
VREF
1.235 V
Ref
Enable
Internal VCC
∑
+
–
Oscillator
Diode
Open
+ Sense
Driver
Circuit
COMP
–
+
Current
Sense
ISS
–
Internal
Soft Start
Thermal
Shutdown
Enable
Enable
Fault
PWM
OVP
Sense
+
EN/PWM
–
100 kΩ
OVP
VREF
Short
LED Detect
Internal VCC
ISET
VREF
ISS
LED
Driver
ISET
LED
FAULT
GND
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115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
4
Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8513
ELECTRICAL CHARACTERISTICS1 Valid at VIN = 16 V, TA = 25ºC,
indicates specifications guaranteed through the full
operating temperature range with TA = TJ = –40ºC to125 ºC, typical specifications are at TA = 25ºC; unless otherwise specified
Characteristics
Symbol
Test Conditions
Min.
Typ.
Max.
Unit
Input Voltage Specifications
Operating Input Voltage Range
VIN
4.5
−
40
V
VIN Pin UVLO Start Threshold
VUVLOrise
VIN rising
−
−
4.35
V
VIN Pin UVLO Stop Threshold
VUVLOfall
VIN falling
−
−
3.90
V
VIN Pin UVLO Hysteresis
VUVLOhys
−
450
−
mV
EN/PWM = VIH , SW = 2 MHz, no load
−
5
−
mA
VIN = 16 V, EN/PWM = 0 V
−
1
10
μA
VIL
5 V < VIN < 40 V
−
−
400
mV
VIH
5 V < VIN < 40 V
1.5
−
−
V
REN/PWM
EN/PWM = 5 V
−
100
−
kΩ
Input Current
Input Quiescent Current
Input Sleep Supply Current
IQ
IQSLEEP
¯Ā¯Ū¯L̄
¯T̄
¯ 3)
Input Logic Levels (EN/PWM and F̄
Input logic Level (Low)
Input logic Level (High)
EN/PWM Pull-Down Resistor
¯Ā¯Ū¯L̄¯T̄
¯ Pin Pull-Down Voltage
F̄
VFAULT
IFAULT = 0.5 mA
−
−
0.4
V
¯Ā¯Ū¯L̄¯T̄
¯ Pin Leakage Current
F̄
IFAULTlkg
VFAULT = 5 V
−
−
1
μA
−
45
−
dB
−
990
−
μA/V
Error Amplifier
Open Loop Voltage Gain
Transconductance
AVOL
gm
ΔICOMP = ±10 μA
Source Current
IEA(SRC)
VCOMP = 1.5 V
−
–360
−
μA
Sink Current
IEA(SINK)
VCOMP = 1.5 V
IEA(SINK)
360
−
μA
Source Current During Soft Start2
IEA(SS)
VCOMP = 1.5 V
−
–80
−
μA
COMP Pin Pull-Down Resistance
RCOMP
−
2000
−
Ω
1.168
1.218
1.268
V
Standard CMOS input, measured at
VOVP = 1.2 V
−
−
100
nA
¯Ā¯Ū¯L̄¯T̄
¯ asserted
F̄
Output Overvoltage Protection
Overvoltage Protection Threshold
OVP Pin Leakage Current
VOVPHI(th)
IOVPH
Measured at OVP Pin
OVP Pin Undervoltage Threshold
VUVP(th)
Measured at OVP Pin
−
−
110
mV
Secondary Overvoltage Protection
VOVP(sec)
Measured at SW Pin
53
55.5
58
V
RDS(on)SW
ISW = 750 mA, VIN = 16 V
−
450
800
mΩ
VSW = 16 V, EN/PWM = VIL , TA = TJ
between –40ºC and 85ºC
−
0.1
1
uA
VSW = 16 V, EN/PWM = VIL , TA = TJ = 125ºC
−
10
−
uA
1.9
2.2
2.8
A
3
3.5
4.64
A
−
75
100
ns
BOOST Switch
Switch On-Resistance
Switch Leakage Current
Switch Current Limit
ISWlkg
ISW(LIM)
Secondary Switch Current Limit
ISW(LIM2)
Minimum Switch On-Time
tSW(ON)
Higher than ISW(LIM)(max) in all conditions,
A8513 latches when detected
Continued on the next page…
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
5
Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8513
ELECTRICAL CHARACTERISTICS1 (continued) Valid at VIN = 16 V, TA = 25ºC, indicates specifications guaranteed through the
full operating temperature range with TA = TJ = –40ºC to125 ºC, typical specifications are at TA = 25ºC; unless otherwise specified
Characteristics
Minimum Switch Off-Time
Symbol
Test Conditions
tSW(OFF)
Min.
Typ.
Max.
Unit
−
55
85
ns
Oscillator Frequency
Oscillator Frequency
fSW
A8513KLYTR-T, A8513KLPTR-T
1.8
2
2.2
MHz
A8513KLYTR-1-T, A8513KLPTR-1-T
0.9
1
1.1
MHz
A8513KLYTR-2-T, A8513KLPTR-2-T
450
500
550
kHz
A8513KLYTR-3-T, A8513KLPTR-3-T
225
250
275
kHz
−
−
3
%
LED Current Sinks
LED Accuracy
ErrLED
ISET = 150 μA
LED Regulation Voltage
VLED
ISET = 150 μA
−
880
−
mV
ISET to ILED Current Gain
AISET
ISET = 150 μA
1014
1045
1076
A/A
ISET Pin Voltage
VISET
−
1.003
−
V
Allowable ISET Current
ISET
40
−
160
μA
Current through enabled LED pin during
soft start
−
48
−
A/A
−
16
−
ms
Soft Start LED Current Gain
AILEDSS
Maximum PWM Dimming Off-Time
tPWML
Measured while EN/PWM = low during
dimming control, and internal references
are powered-on (exceeding tPWML results in
shutdown)
Minimum PWM On-Time
tPWMH
First cycle when powering-up A8513
−
1.5
3
μs
EN/PWM High to LED-On Delay
tdPWM(on)
Time between PWM enable and when LED
current reaches 90% of maximum;
VPWM = 0 → 2 V
−
250
500
ns
EN/PWM Low to LED-Off Delay
tdPWM(off)
Time between PWM enable going low
and when LED current reaches 10% of
maximum; VPWM = 2 → 0 V
−
250
500
ns
Temperature rising
−
165
−
ºC
−
20
−
ºC
Thermal Protection (TSD)
Thermal Shutdown Threshold2
TTSD
Thermal Shutdown Hysteresis2
TTSDHYS
1For
input and output current specifications, negative current is defined as coming out of the node or pin (sourcing), and positive current is defined as
going into the node or pin (sinking).
2Ensured by design and characterization, not production tested.
3 F̄
¯Ā¯Ū¯L̄¯T̄
¯ pin is high voltage tolerant
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115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
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Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8513
fSW (MHz)
10
9
VIN = 40 V
8
7
6
5
4
3
2
1
0
-55
VIN Input Sleep Mode Current
versus Ambient Temperature
-5
45
95
Switch Frequency
versus Ambient Temperature
2.20
2.15
2.10
2.05
2.00
1.95
1.90
1.85
1.80
145
-55
-5
95
Temperature (°C)
VIN UVLO Rising Threshold Voltage
versus Ambient Temperature
VIN UVLO Falling Threshold Voltage
versus Ambient Temperature
4.345
3.855
4.295
3.805
4.245
4.195
4.145
4.095
4.045
3.995
145
3.755
3.705
3.655
3.605
3.555
3.945
-55
-5
45
95
3.505
145
-55
-5
Temperature (°C)
5 series LEDs; VOUT = 17 V
6 series LEDs; VOUT = 20 V
7 series LEDs; VOUT = 23 V
5
6
7
8
9 10 11 12 13 14 15 16 17 18 19 20 21 22
Input Voltage, VIN (V)
95
145
Efficiency Versus Input Voltage
ILED = 150 mA, LED Vf ≈ 3.2 V
Efficiency, η (%)
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
45
Temperature (°C)
Efficiency Versus Input Voltage
ILED = 90 mA, LED Vf ≈ 3.2 V
Efficiency, η (%)
45
Temperature (°C)
VUVLOfall (V)
VUVLOrise (V)
IQSLEEP (μA)
Characteristic Performance
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
5 series LEDs; VOUT = 17 V
6 series LEDs; VOUT = 20 V
7 series LEDs; VOUT = 23 V
5
6
7
8
9 10 11 12 13 14 15 16 17 18 19 20 21 22
Input Voltage, VIN (V)
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115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
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Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8513
Normalized LED Current RaƟo versus PWM Duty Cycle
fPWM = 200 Hz, VIN = 12 V, 6 series LEDs (≈ 21 V, 150 mA)
100
LED Current Ra o (%)
10
1
PWM dimming only
PWM + analog dimming
0.1
0.10
0.01
0.10
1
10
100
PWM Duty Cycle (%)
LED Current versus Ambient Temperature
ILED = 150 mA
Switch Current Limit versus Ambient Temperature
2.5
Sw ch Current, ISW (A)
LED Current, ILED (mA)
151.0
150.8
150.6
150.4
150.2
150.0
149.8
149.6
-55
-5
45
Temperature (°C)
95
145
2.4
2.3
2.2
2.1
2.0
1.9
1.8
1.7
1.6
-55
-5
45
95
145
Temperature (°C)
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115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
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Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8513
Functional Description
The A8513 incorporates a current-mode boost controller with
internal DMOS switch, and a single LED current sink. It can be
used to drive an LED string of up to 14 white LEDs in series,
with current up to 150 mA. For optimal efficiency, the output of
the boost stage is adaptively adjusted to the minimum voltage
required to power the LED string. This is expressed by the following equation:
VOUT = VLED + VREG
where
VLED is the voltage drop across the LED string, and
(1)
IC will not power up until the short is removed. At this time the
output is also checked for a VOUT short, using the OVP pin. If the
OVP pin does not rise above VOVPLO(th) the IC will not power up.
Soft start function
During soft start, the COMP pin delivers a steady 80 uA current,
the LED pin current gain is set to AILEDSS . The lower gain will
help limit the inrush current generated by charging the output
VOUT
VREG is the regulation voltage of the LED current sink (typically
0.88 V at the maximum LED current).
Enabling the IC
The IC turns on when a logic high signal is applied to the
EN/PWM pin (figure 1), and turns off when this pin is pulled to
a logic low. For the device to be enabled, the voltage on the VIN
pin must be greater than VUVLOrise to clear the undervoltage lockout (UVLO) threshold (figure 2). Before startup, the A8513 goes
through a system check to determine if there are any fault conditions that would prevent the system from functioning correctly.
UVLO threshold
exceeded
C1
ILED
C2
C3
COMP
EN/PWM
C4
Powering up: LED pin short to GND check
After the VIN pin goes above VUVLOrise, the IC checks if the LED
pin is shorted to GND by pre-charging the LED pin (figure 3).
When the voltage on the LED pin exceeds 260 mV, the A8513
proceeds with soft start. If a short is present on the LED pin, the
t
Figure 2. Start-up by slowly ramping up VIN with EN/PWM at 2 V; shows
VOUT (ch1, 10 V/div.), ILED (ch2, 50 mA/div.), COMP (ch3, 1 V/div.), and
EN/PWM (ch4, 2 V/div.), time = 2 ms/div.
VOUT
FAULT
LED detection
C1
C1
C2
VLED
ILED
ILED
C2
C3
C3
C4
COMP
EN/PWM
EN/PWM
C4
t
Figure 1. Start-up by slowly ramping up EN/PWM with VIN at 16 V; shows
VOUT (ch1, 10 V/div.), ILED (ch2, 50 mA/div.), COMP (ch3, 1 V/div.), and
EN/PWM (ch4, 2 V/div.), time = 2 ms/div.
t
¯Ā¯Ū¯L̄¯T̄
¯ (ch1, 5 V/div.), VLED (ch2,
Figure 3. LED detection period; shows F̄
1 V/div.), ILED (ch3, 100 mA/div.), and EN/PWM (ch4, 5 V/div.),
time = 500 μs/div.
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Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8513
capacitors. After the A8513 senses there is enough voltage on the
LED pin, it increases the LED current to the preset regulation
current. The COMP pin will continue to source 80 uA until the
LEDs are able to run at the full preset current level.
Soft start time at low PWM duty cycle
The startup time of the A8513 is inversely proportional to the
PWM duty cycle. That is, the lower the PWM duty cycle, the
longer it takes to finish soft start. This is because the COMP pin
is charged during PWM on-time only. The average charging current for the external COMP capacitor is therefore i × D, where D
is the PWM duty cycle.
Boost converter frequency
The switching frequency of the boost regulator is preset internally
to one of four frequencies. The frequency options are:
Switching Frequency (fSW)
(MHz)
Part Number
A8513KLYTR-T
2
A8513KLYTR-1-T
1
A8513KLYTR-2-T
0.5
A8513KLYTR-3-T
0.25
LED current setting and LED dimming
For any capacitor:
The LED current, ILED , is set using the ISET pin, and can range
from 40 to 150 mA. Connect a resistor, RISET , between this pin
and GND to set the ILED current, according to the following
formula :
dV/dt = Current / Capacitance = i × D / C
Therefore
dt = dV × C / (i × D)
ILED =
As an example, when VIN = 8 V and VOUT = 28 V, the COMP pin
has to reach approximately 1.5 V in order for the boost stage to
have the correct duty cycle. Substituting: dV = 1.5 V, C = 0.1 μF,
i = 80 μA, and D=0.02, we get dt = 94 ms.
Figure 4 demonstrates the relation between PWM duty cycle
and soft start time measured, with a given COMP capacitance
of CZ = 0.1 μF. If a larger CZ is used, then the startup time will
increase proportionally.
VISET
× AISET
RISET
=
(2)
1.003 V
× 1045
RISET
where ILED is in A and RISET is in Ω.
This formula sets the maximum current through the LEDs, which
is referred to as the 100% current.
Startup Time (ms)
100
VIN=5V
VIN=8V
10
1
1
10
PWM Duty Cycle (%)
100
Figure 4. Soft start time is inversely proportional to PWM duty cycle, as
shown here: A8513 startup time versus PWM duty cycle, with VOUT = 28 V,
COMP RZ = 330 Ω, and CZ = 0.1 μF.
.
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115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
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10
Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8513
PWM dimming
The LED current can be reduced from the 100% current level by
PWM dimming using the EN/PWM pin. When the EN/PWM pin
is pulled high, the A8513 turns on and the LED pin sinks 100%
current (figure 5). When EN/PWM is pulled low, the boost converter and LED sink are turned off. The compensation (COMP)
pin is floated, and critical internal circuits are kept active.
The A8513 has very fast turn-on and turn-off times during PWM
dimming to minimize low PWM duty cycle errors. The typical
PWM signal delay tdPWM(on) is 250 ns (figure 6). The typical
tdPWM(off) time, between the PWM signal and the LED current
going low, is shown in figure 7.
C3
COMP
C1
VLED
C2
ILED
C3
C4
EN/PWM
t
Figure 5. Typical PWM dimming sequence, with PWM dimming frequency
of 1000 Hz and 10% duty cycle; shows COMP (ch1, 1 V/div.), VLED (ch2,
10 V/div.), ILED (ch3, 100 mA/div.), and EN/PWM (ch4, 5 V/div.),
time = 500 μs/div.
C3
ILED
ILED
C4
C4
EN/PWM
EN/PWM
t
Figure 6. Typical EN/PWM signal (5 V/div.) to LED current (100 mA/div.)
turn-on delay. The delay measured about 250 ns. VIN is 12 V, VOUT for 10
series LEDs is approximately 36 V, ILED is 150 mA. (time = 500 ns/div.)
t
Figure 7. Typical EN/PWM signal (5 V/div.) to LED current (100 mA/div.)
turn-off delay. The typical delay is about 250 ns. (time = 500 ns/div.)
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Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8513
Analog dimming
The A8513 can also be dimmed by using an external DAC or
other voltage source applied either directly to the ground side of
the RISET resistor or through an external resistive divider to the
ISET pin. The limitation of this form of dimming is that the internal ISET error amplifier is designed to work from 40 to 160 μA,
thus limiting the dimming ratios that can be achieved.
Figure 8, top panel is a typical application using a DAC to control
the LED current using a single resistor connected to the ISET pin.
The ISET current is controlled by the following formula:
ISET
lower value of the preset LED current set by the RISET resistor:
▫ VDAC = 1.003 V; the output is strictly controlled by RISET
▫ VDAC > 1.003 V; the LED current is reduced
▫ VDAC < 1.003 V; the LED current is increased
Output Overvoltage Protection (OVP) and Output
Undervoltage Protection (UVP)
The A8513 has output overvoltage protection (OVP), output
undervoltage protection and secondary overvoltage protection
(open diode).
Overvoltage Protection The OVP pin has a threshold, VOVPHI(th) ,
VISET – VDAC
=
RISET
(3)
Where VISET is the ISET pin voltage and VDAC is the DAC output voltage.
When the DAC voltage is equal to VISET , the internal reference,
there is no current through RISET . When the DAC voltage starts
to decrease, the ISET current starts to increase, thus increasing
the LED current. When the DAC voltage is 0 V, the LED current
will be at its maximum.
• For a dual-resistor configuration (lower panel of figure 8), the
ISET current is controlled by the following formula:
VISET
VDAC – VISET
–
ISET =
(4)
RISET
R1
The advantage of this circuit is that the DAC voltage can be
higher or lower, thus adjusting the LED current to a higher or
of 1.218 V. A resistive divider can be used to set the VOUT overvoltage protection threshold up to 45 V (see figure 9). There is
no restriction on the value of the resistor chosen, but it is recommended that the divider current be kept between 10 and 60 μA.
This will minimize the effect of sense current on the accuracy of
OVP, and minimize output voltage bleed-off during PWM dimming.
Formulas for calculating the OVP resistor voltage divider are
shown below.
ROVP1 = (VOVP – 1.218 V) / ISET
(5)
ROVP2 = 1.218 V / ISET
(6)
The OVP function is not inherently a latched fault. If the OVP
condition occurs during a load dump, the IC will stop switching
but not shut down.
VOUT
DAC
R ISET
VDAC
A8513
A8513
ISET
GND
GND
+
–
VDAC
GND
A8513
ISET
R ISET
GND
Figure 8. Simplified diagram of voltage LED current control (upper) single
resistor, and (lower) dual resistors.
–
R1
ROVP1
ROVP2
1.218 V
+
DAC
OVP
100 mV
Figure 9. Simplified diagram of the OVP pin functions.
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Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8513
The OVP condition can become a latched fault if, during an OVP
event, the LED current is not in regulation. This typically occurs
during an open LED string situation. If both faults occur simultaneously the IC will shut down and the fault flag will be set (see
figures 10, 11, and 13).
Undervoltage Protection The OVP pin is also used to detect
output undervoltage protection (UVP) against VOUT short to
GND. When the UVP fault is tripped, the fault flag is set (fig¯T̄
¯
ure 14). Using an external PMOSFET interfaced to the F̄¯Ā¯Ū¯L̄
pin (figure 14), the user can disconnect the IC from VIN during a
fault event.
B
FAULT
A
C2
C1
FAULT
C2
ILED
C3
C4
EN/PWM
A
t
VOUT
C
C1
Figure 12. Power-up into an open LED situation. (A) A8513 enabled,
(B) fault flag (ch2, 5 V/div.) is set when OVP threshold is reached. Shows
VOUT (ch1, 20 V/div.), ILED (ch3, 100 mA/div.), and EN/PWM (ch4,
5 V/div.), time = 1 ms/div..
VOUT
ILED
C3
VOUT
B
B
A
C1
C4
EN/PWM
t
Figure 10. Open LED condition during PWM dimming. (A) The LED string
(ch3, 100 mA/div.) is opened (no current flow through the LED pin) during
an off-period for the PWM dimming signal (ch4, 5 V/div.). (B) At the next
PWM cycle, the LED open condition is detected and the A8513 starts
boosting the output voltage (ch1, 10 V/div.). (C) Upon reaching the OVP
threshold and sensing no LED current flow, the A8513 shuts down and
sets the fault flag (ch2, 5 V/div.). (time = 10 ms/div.)
B
B
VOUT
C1
IIN
C2
C
C
PMOSFET Gate
C3
C4
FAULT
t
Figure 13. Input disconnect switch function during an output short. (A) VOUT
(ch1, 10 V/div.) falls during VOUT short to ground, (B) high peak current
present due to short, before the PMOSFET (ch3, 5 V/div.) is disconnected.
Shows input current (ch2, 10 A/div.) and fault flag (ch4, 5 V/div.),
time = 50 μs/div.
FAULT
C2
AA
1 kΩ
L1
VIN
ILED
C3
1 kΩ
AO4421
5V
C4
VLED
t
Figure 11. Open LED condition when PWM duty cycle is 100%. (A) The
LED string (ch3, 200 mA/div.) is opened (no current flow through the LED
pin). (B) The A8513 starts boosting the output voltage (ch1, 20 V/div.).
(C) Upon reaching the OVP threshold there is still no current flow through
the LED pin, and the A8513 shuts down and sets the fault flag (ch2,
5 V/div.). The LED pin voltage is ch4, 2 V/div. (time = 50 μs/div.)
10 kΩ
2N7002
A8513
FAULT
Figure 14. typical circuit for input disconnect switch.
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Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8513
Secondary Overvoltage Protection The A8513 has secondary
overvoltage protection for the internal boost switch in the event
of an open diode condition. If the voltage on the SW pin exceeds
the device safe operating voltage rating, the A8513 is disabled
and remains latched off (figure 15). The EN/PWM pin must be
brought low longer than tPWML to clear this fault.
Boost switch overcurrent protection
The boost switch is protected with cycle-by-cycle current limiting set to ISW(LIM) (figure 16). There is also a secondary current
limit that is sensed on the boost switch. When this current limit
is exceeded, the A8513 immediately shuts down (figure 17). The
secondary current limit is above the cycle-by-cycle current limit
and protects the switch from destructive currents if the boost
inductor is shorted.
B
A
FAULT
C1
C
B
COMP
A
IL
C2
Cycle-by-cycle inductor current limit
C3
t
Figure 16. Cycle-by-cycle current limit, inductor current is C3 (1 A/div.).
(A) Fault flag (ch1, 5 V/div.) is not set during cycle-by-cycle current limit,
(B) COMP pin signal (C2, 2 V/div.) is close to 3.6 V. (time = 1 ms/div.)
FAULT
A
C1
VSW
C1
B
B
VSW
A
C2
Normal operation
C2
C3
Inductor Short
FAULT
ILED
C3
IL
t
t
Figure 15. Secondary Overvoltage protection tripped when the switching
diode is opened during operation. (A) High voltage is detected on SW
node (ch1, 20 V/div.) and the A8513 is shut down. (B) Fault flag is set
(ch2, 5 V/div.). Shows LED current (ch3, 100 mA/div.), time = 500 ns/div.
Figure 17. Secondary current limit during an inductor short condition.
(A) limit is reached, (B) the IC shuts down and the fault flag is set. Shows
fault flag (c1, 5 V/div.), switch node voltage (C2, 20 V/div.), and current
through the inductor (C3, 2 A/div.); time = 1 μs/div.
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Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8513
Input UVLO
When VIN rises above the UVLO threshold VUVLOrise, the A8513
can be enabled by asserting EN/PWM. The A8513 is disabled
when VIN falls below VUVLOfall – VUVLOhys for more than 1 μs
(figure 18). This 1 μs lag prevents false shut downs during
momentary glitches on the input power supply.
Shutdown
If the EN/PWM pin is pulled low for more than tPWML , the
device enters shutdown mode and clears all internal fault registers. In shutdown, the A8513 will disable all current sources and
wait until EN/PWM goes high to re-enable the IC.
VDD
The VDD pin provides regulated bias supply for internal circuits.
Connect a capacitor, CVDD , with a value of 0.01 to 0.1 μF to
this pin.
A
A
VIN
B
B
FAULT
C1
C2
ILED
C3
C4
EN/PWM
t
Figure 18. Input UVLO. (A) UVLO tripped (VIN, ch1, 2 V/div.), (B) fault flag
set (ch2, 2 V/ div.). Shows LED current (ch3, 100 mA/div.) and EN/PWM
(ch4, 1 V/div.), time = 5 ms/div.
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Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8513
Fault protection during operation
The A8513 constantly monitors the state of the system to determine if any fault conditions occur. The response to a triggered
fault condition is summarized in the table below.
The latching faults can be cleared in two ways:
Note: Some of the protection features might not be active during
startup, to prevent false triggering of fault conditions.
Fault behavior diagrams are shown in figures 18, 19 and 20.
• Keep the EN/PWM pin low for more than 16 ms.
• Cycle the power to create a UVLO condition.
Fault Mode Table
Fault Name
Type
Active
Fault
Flag Set
Primary Switch
Current Protection
(cycle-by-cycle
current limit)
Auto-restart
Always
No
This fault condition is triggered by the cycle-by-cycle
current limit ISW(LIM) . Prevents current in inductor from
exceeding ISW(LIM) .
Secondary Switch
Current Limit
Latched
Always
Yes
Secondary OVP
Latched
Always
LED Pin Short
Protection
Auto-restart
Startup
ISET Short
Protection
Auto-restart
Always
Boost
Sink
driver
Off for a single
cycle
On
When the current through the boost switch exceeds
the secondary current SW limit, ISW(LIM2) , the A8513
immediately shuts down.
Off
Off
Yes
Secondary overvoltage protection is used for open
diode detection. When diode D1 opens, the switch pin
voltage will increase until VOVP(sec) is reached.
Off
Off
Yes
This fault prevents the A8513 from starting-up if
the LED pin is shorted to ground. After the short is
removed, soft-start is allowed to begin.
Off
Off
Yes
This fault occurs when the ISET current goes above
150% of the maximum Allowable ISET Current,
ISET(max). The boost will stop switching and the IC will
disable the LED sinks until the fault is removed. When
the fault is removed, the IC tries to regulate to the
preset LED current.
Off
Off
Off
Off
Description
LED String Open
Protection
Latched
Always
Yes
This fault occurs when the OVP pin exceeds the
VOVPHI(th) threshold. The A8513 immediately stops
switching. If at the same time, the LED voltage is below
regulation, the IC will shut down.
Output Overvoltage
Protection
Auto-restart
Always
No
This fault occurs when the OVP pin exceeds VOVPHI(th)
threshold (for example, during a load dump). The
A8513 immediately stops switching, but continues to
sink current through the LED pin.
Off
On
Output
Undervoltage
Protection
Auto-restart
Always
Yes
This fault occurs when the OVP pin senses less than
110 mV on the pin.
Off
Off
Overtemperature
Protection
Auto-restart
Always
Yes
This fault occurs when the die temperature exceeds
TTSD .
Off
Off
Always
Yes until
internal
regulator
shuts down
This fault occurs when VIN drops below VUVLOfall . This
fault resets all latched faults.
Off
Off
VIN UVLO
NA
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Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8513
ISET Short to Ground
Recovery from ISET Short to Ground
A
C1
FAULT
VSW
FAULT
B
C1
C2
C2
ILED
ILED
C3
ISET
ISET
C3
C4
t
t
¯Ā¯Ū¯L̄¯T̄
¯ (ch1, 5 V/div.), ILED (ch2, 100 mA/div.), and ISET (ch3,
Figure 20. F̄
1 V/div.), time = 2 ms/div.
¯Ā¯Ū¯L̄¯T̄
¯ (ch1, 5 V/div.), VSW (ch2, 20 V/div.), ILED (ch3,
Figure 19. F̄
100 mA/div.), and ISET (ch4, 1 V/div.), time = 1 μs/div.
OVP Tripped During Load Dump
A
VIN
C1
B
VOUT
C2
VSW
C3
C4
FAULT
t
Figure 21. VIN (ch1, 20 V/div.), VOUT (ch2, 20 V/div.), and VSW (ch3,
¯Ā¯Ū¯L̄¯T̄
¯ (ch4, 5 V/div.), time = 2 ms/div.
20 V/div.), F̄
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Wide Input Voltage Range, High Efficiency
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A8513
Design Example
This section provides a method for selecting component values
when designing an application using the A8513. A typical circuit
using this design is shown in figure 22.
Assumptions: For the purposes of this example, the following are
given as the application requirements:
• VIN: 5 to 16 V
To find the OVP resistor values, the user should choose a resistor divider that has very low current (IOVP) and ROVP should be
approximately 1 MΩ. A good starting point is 50 μA as IOVP .
(The IOVP current is used later in calculating the total leakage
current.) Then :
ROVP1 = (VOUT(OVP) – VOVPHI(th) ) / IOVP
= (22.08 V – 1.218 V) / 50 μA = 417.2 kΩ
and:
ROVP2 = VOVPHI(th) / IOVP
• Quantity of series LEDs, #SERIESLEDS: 6
(10)
= 1.218 V / 50 μA = 24.36 kΩ
• LED current, ILED: 120 mA
Choose a value of resistor that is higher value than the calculated
ROVP . In this case 422 kΩ was selected. Below is the actual value
of the minimum OVP trip level with the selected resistor:
• Vf at 120 mA: 3.2 V
• fSW: 2 MHz
VOUT(OVP) = ROVP × IOVP × VOVPHI(th)
• TA(max): 85°C
• PWM dimming frequency: 200 Hz with a minimum duty cycle
of 1%.
Procedure: Select the appropriate configuration and the individual
component values in an ordered sequence.
Step 2: Determine the value for the ILED setting resistor, RISET :
(7)
= (1.003 × 1045) / 120 mA = 8.74 kΩ
Step 3: Determine the values of the OVP resistors. The OVP
resistors are connected between the OVP pin and the output voltage (VOUT) and the OVP pin and ground.
Step 3a: The first step is to determine the maximum voltage
based on the LED Vf requirements. To this value the regulation
voltage should be added, as well as another 2 V to account for
noise, output ripple, and resistor tolerances. The regulation voltage, VLED , of the A8513 is 880 mV. Then:
= 6 × 3.2 V+ 0.880 V + 2 V
= 22.08 V
= 422 kΩ × 50 μA + 1.218 V = 22.32 V
STEP 3b: At this point a quick check should be done to determine
if the conversion ratio is acceptable for the selected frequency:
Dmaxofboost = 1 – tSW(OFF) × fSW
(12)
where the Minimum Switch Off-Time, tSW(OFF) , is found in the
Electrical Characteristics table.
The Theoretical Maximum VOUT is then calculated as:
VOUT(max) =
Choose an 8.66 kΩ resistor.
VOUT(OVP) = #SERIESLEDS × Vf + VLED + 2 V
(11)
= 1 – 85 ns × 2 MHz = 83%
Step 1: Connect the series LED string from VOUT to the LED
pin.
RISET = VISET × AISET/ ILED
(9)
(8)
=
VIN(min)
1 – Dmaxofboost
– Vd
(13)
5V
– 0.4 V = 29.01 V
1 – 0.83
where Vd is the diode forward voltage.
The Theoretical Maximum VOUT value must be greater than the
value VOUT(OVP) . If this is not the case, a lower frequency version of the A8513 should be chosen to meet the maximum duty
cycle requirements.
Step 4: Inductor selection. The inductor should be chosen such
that it can handle the necessary input current. In most applications, due to stringent EMI requirements, the system must operate
in continuous conduction mode throughout the whole input voltage range.
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Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8513
then:
Step 4a: Determine the Duty Cycle:
D(max) = 1 –
=1–
VIN(min)
VOUT(OVP) + Vd
(14)
=
5V
= 78%
22.32 V + 0.4 V
where Vd is the voltage drop of the boost diode.
Step 4b: Determine the maximum and minimum input current to
the system. The minimum input current will dictate the inductor
value. The maximum current rating will dictate the current rating
of the inductor. Given IOUT = ILED = 120 mA:
IIN(max) =
=
VOUT(OVP) IOUT
VIN(min)
H
(15)
22.32 V 120 mA
= 0.595 A
5 V 0.9
=
22.32 V
16 V
VIN(min)
ΔIL fSW
(16)
120 mA
= 0.19 A
0.9
5V
2 MHz
0.18 A
0.78 = 10.83 μH
Double-check to make sure the ½ current ripple is less than
IIN(min):
(19)
IIN(min) > 1/2 ΔIL
0.19 A > 0.09 A
A good inductor value to use would be 10 μH.
Step 4d: This step verifies that there is sufficient slope compensation for the inductor chosen. The required slope compensation
value for different frequencies is listed below:
(MHz)
Slope Compensation
(A/μs)
2
3.73
1
1.85
0.500
3.70
0.250
1.83
Next insert the inductor value used in the design:
A good approximation of efficiency η can be taken from the efficiency curves located in the data sheet. A value of 90% is a good
starting approximation.
ΔILused =
VIN(min) D(max)
Lused fSW
=
0.78
5V
10 μH
2.0 MHz
STEP 4c: Determine the inductor value.
To assure that the inductor operates in continuous conduction
mode the value of inductor should be set such that the ½ inductor
ripple current is not greater than the average minimum input current. A good inductor choice for inductor ripple current is 30% of
the maximum input current:
ΔIL = IIN(max) × 0.3
(18)
D(max)
fSW
where η is efficiency. Next, calculate minimum input current, as
follows:
VOUT(OVP) IOUT
IIN(min) =
VIN(max) H
L=
(17)
(20)
= 0.20 A
Calculate the minimum required slope:
Required Slope (min) =
ΔILused 1 10 –6
1
(1 – D(max))
(21)
fSW
=
0.20 A
1
2.0 MHz
1 10 –6
(1 – 0.78)
= 1.8 A/μs
= 0.595 A × 0.3 = 0.18 A
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Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8513
For a stable system, the required minimum slope must be smaller
than the IC slope compensation.
Note: The slope compensation value is in A/μs; the
constant multiplier.
1×10-6
is a
200 Hz and the minimum duty cycle is 1%. Typically the voltage
variation on the output during PWM dimming must be less than
250 mV (VCOUT) so that no audible noise can be heard. The
capacitance can be calculated as follows:
STEP 4e: Determine the inductor current rating :
ILminimum rating = IIN(max) + 1/2 ΔILused
= 0.595 A + 0.20 A / 2 = 0.695 A
(22)
(24)
COUT
Step 5: Choose the proper switching diode. The switching diode
should be chosen for three characteristics when it is used in LED
lighting circuitry. The first and most obvious are the current
rating of the diode and the reverse voltage rating. The reverse
voltage rating should be such that during operation condition the
voltage rating of the device is larger than the maximum output
voltage; in this case it is VOUT (OVP) . The peak current through
the diode is:
Idp = IIN(max) + 1/2 ΔILused
1 – Ddimming(min)
fPWM(dimming) V
COUT = Ilkg
= 120 μA
1 – 0.01
= 2.38 μF
200 Hz 0.250 V
A capacitor larger than 2.38 μF capacitor should be selected due
to degradation of capacitance at high voltages on the capacitor.
One ceramic 4.7 μF, 50 V capacitor is a good choice to fulfill this
requirement. Corresponding capacitors include:
(23)
Vendor
Value
Part number
= 0.595 A + 0.20 A / 2 = 0.695 A
The third major component in deciding the switching diode is the
reverse current, IR , characteristic of the diode. This characteristic
is especially important when PWM dimming is implemented.
During PWM off-time the boost converter is not switching. This
results in a slow bleeding off of the output voltage, due to leakage
currents. IR can be a large contributor, especially at high temperatures. On the diode that was selected in this design, the current
varies between 1 and 100 μA.
Murata
4.7 μF 50 V
GRM32ER71H475KA88L
Murata
2.2 μF 50 V
GRM31CR71H225KA88L
Step 6: Choose the output capacitors. The output capacitors
should be chosen such that they provide filtering for both the
boost converter and for the PWM dimming function. The biggest
factors that contribute to the size of the output capacitor is PWM
dimming frequency and the PWM duty cycle. Another major
contributor is leakage current, Ilkg . This current is a combination
of the OVP resistor divider, IOVP , and the reverse leakage of the
switching diode. In this design the PWM dimming frequency is
The rms current through the capacitor is given by:
ICOUTrms = IOUT
= 0.120 A
∆IL
IIN(max) 12
1 – D(max)
D(max) +
(25)
0.20 A
0.595 A 12 = 0.23 A
1 – 0.78
0.78 +
The output capacitor should have a current rating of at least
230 mA. The current rating of the 4.7 μF, 50V capacitor is 1.5 A.
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Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8513
STEP 7: Select the input capacitor. The input capacitor should be
selected such that it provides good filtering of the input voltage
waveform. A good rule of thumb is to set the input voltage ripple,
ΔVIN to be 1% of the minimum input voltage. The minimum
input capacitor requirements are as follows:
CIN =
=
∆IL
8
8
The rms current through the capacitor is given by:
IINrms =
(26)
IOUT ×
∆IL
IIN(max)
(1 – D(max)) 12
(27)
0.20 A
0.595 A
= 0.05 A
(1 – 0.78) 12
0.120 ×
fSW
∆VIN
0.20 A
= 0.25 μF
2 MHz 0.05 V
=
A good ceramic input capacitor with ratings of 2.2 μF, 50V or
4.7 μF, 50 V will suffice for this application. Corresponding
capacitors include:
L1
10 μH
VIN
CIN
4.7 μF
50 V
VC
100 kΩ
CVDD
0.1 μF
Value
Part number
Murata
4.7 μF 50 V
GRM32ER71H475KA88L
Murata
2.2 μF 50 V
GRM31CR71H225KA88L
VOUT
D1
SW
VIN
Vendor
A8513
VDD
ROVP1
422 kΩ
OVP
PAD
ROVP2
24.3 kΩ
COUT
4.7 μF
50 V
FAULT
EN/PWM
LED
ISET
RISET
8.66 kΩ
COMP
GND
CP
120 pF
RZ 120 Ω
CZ 0.47 μF
Figure 22. A typical circuit designed using the example above in this section.
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21
Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8513
Typical Application Drawings
R1
A
VIN
L1
CIN
VOUT
D1
RP
SW
CVDD
R7
ROVP1
A8513
VIN
VDD
COUT
OVP
ROVP2
PAD
FAULT
LED
EN/PWM
ISET
COMP
RISET
RZ (Optional)
CP
GND
CZ (Optional)
A R1 is used to provide a leakage path such that the OVP pin is above 100 mV during startup.
Otherwise the IC would assume the output is shorted to GND and would not proceed with soft start.
Figure 23. Typical application showing boost configuration and PMOS disconnect switch implementation
L2
R1 A
VIN = 9 to 16 V
CSW
L1
CIN
D2 B
VOUT
D1
SW
VIN
VC
CVDD
A8513
VDD
ROVP1
COUT
OVP
ROVP2
PAD
FAULT
EN/PWM
LED
ISET
RISET
COMP
GND
CP
RZ (Optional)
CZ (Optional)
A R1 is used to provide a leakage path such that the OVP pin is above 100 mV during startup.
Otherwise the IC would assume the output is shorted to GND and would not proceed with soft start.
B D2 is a blocking diode.
Figure 24. Typical application showing SEPIC configuration
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115 Northeast Cutoff
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22
Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8513
Package LP, 16-Pin TSSOP
with Exposed Thermal Pad
0.45
5.00±0.10
16
0.65
16
8º
0º
0.20
0.09
1.70
B
3 NOM
4.40±0.10
3.00
6.40±0.20
6.10
0.60 ±0.15
A
1
1.00 REF
2
3 NOM
0.25 BSC
Branded Face
16X
SEATING
PLANE
0.10 C
0.30
0.19
C
3.00
C
PCB Layout Reference View
For Reference Only; not for tooling use (reference MO-153 ABT)
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
1.20 MAX
0.65 BSC
1 2
SEATING PLANE
GAUGE PLANE
0.15
0.00
A Terminal #1 mark area
B
Exposed thermal pad (bottom surface); dimensions may vary with device
C Reference land pattern layout (reference IPC7351
SOP65P640X110-17M);
All pads a minimum of 0.20 mm from all adjacent pads; adjust as
necessary to meet application process requirements and PCB layout
tolerances; when mounting on a multilayer PCB, thermal vias at the
exposed thermal pad land can improve thermal dissipation (reference
EIA/JEDEC Standard JESD51-5)
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
23
Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8513
Package LY, 10-Pin MSOP
with Exposed Thermal Pad
3.00 ±0.10
0° to 6°
10
0.15 ±0.05
3.00 ±0.10
0.30
0.50
10
1.65
4.88 ±0.20
1.73
4.60
A
0.53 ±0.10
1
2
1
2
0.25
1
1.98
1
Seating Plane
Gauge Plane
2
1.98 MIN
C
B
For Reference Only; not for tooling use (reference JEDEC MO-187BA-T)
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
1.73
A Terminal #1 mark area
B Exposed thermal pad (bottom surface)
10
0.86 ±0.05
C Reference land pattern layout (reference IPC7351 SOP50P490X110-11M)
All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary
to meet application process requirements and PCB layout tolerances; when
mounting on a multilayer PCB, thermal vias at the exposed thermal pad land
can improve thermal dissipation (reference EIA/JEDEC Standard JESD51-5)
SEATING
PLANE
0.27
0.18
0.50
REF
0.05
0.15
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
24
Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8513
Revision History
Revision
Revision Date
Description of Revision
Rev. 3
February 4, 2013
Expand Soft Start description, update fsw assignments
Copyright ©2011-2013, Allegro MicroSystems, LLC
Allegro MicroSystems, LLC reserves the right to make, from time to time, such departures from the detail specifications as may be required to
permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that
the information being relied upon is current.
Allegro’s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the
failure of that life support device or system, or to affect the safety or effectiveness of that device or system.
The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, LLC assumes no responsibility for its use;
nor for any infringement of patents or other rights of third parties which may result from its use.
For the latest version of this document, visit our website:
www.allegromicro.com
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115 Northeast Cutoff
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1.508.853.5000; www.allegromicro.com
25
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