MC74HCT20A Dual 4-Input NAND Gate with LSTTL-Compatible Inputs High−Performance Silicon−Gate CMOS http://onsemi.com The MC74HCT20A is identical in pinout to the LS20. The device inputs are compatible with standard CMOS LSTTL outputs. MARKING DIAGRAMS Features • • • • • • Output Drive Capability: 10 LSTTL Loads Outputs Directly Interface to CMOS, NMOS, and TTL Operating Voltage Range: 4.5 V to 5.5 V Low Input Current: 1 mA High Noise Immunity Characteristic of CMOS Devices These are Pb−Free Devices A1 B1 C1 D1 1 2 4 5 14 SOIC−14 D SUFFIX CASE 751A 14 1 1 14 TSSOP−14 DT SUFFIX CASE 948G 14 6 HCT20AG AWLYWW 1 Y1 HCT 20A ALYW 1 Y = ABCD A2 B2 C2 D2 9 10 12 13 8 A WL, L YY, Y WW, W G or Y1 PIN 14 = VCC PIN 7 = GND PINS 3, 11 = NO CONNECTION = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package (Note: Microdot may be in either location) Figure 1. Logic Diagram PIN ASSIGNMENT A1 1 14 VCC B1 2 13 D2 NC 3 12 C2 C1 4 11 NC D1 5 10 B2 Y1 6 9 A2 GND 7 8 Y2 FUNCTION TABLE Output Inputs A B C D Y L X X X H X L X X H X X L X H X X X L H H H H H L ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 3 of this data sheet. © Semiconductor Components Industries, LLC, 2011 March, 2011 − Rev. 1 1 Publication Order Number: MC74HCT20A/D MC74HCT20A ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ MAXIMUM RATINGS Symbol Parameter Value Unit −0.5 to +7.0 V DC Input Voltage (Referenced to GND) −0.5 to VCC +0.5 V DC Output Voltage (Referenced to GND) −0.5 to VCC +0.5 V VCC DC Supply Voltage (Referenced to GND) Vin Vout Iin DC Input Current, per Pin ±20 mA Iout DC Output Current, per Pin ±25 mA ICC DC Supply Current, VCC and GND Pins ±50 mA PD Power Dissipation in Still Air 500 450 mW Tstg Storage Temperature −65 to +150 °C SOIC Package TSSOP Package This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high−impedance circuit. For proper operation, Vin and Vout should be constrained to the range GND v (Vin or Vout) v VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open. Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ RECOMMENDED OPERATING CONDITIONS Symbol VCC Vin, Vout Parameter DC Supply Voltage (Referenced to GND) Min Max Unit 4.5 5.5 V 0 VCC V – 55 + 125 C 0 500 ns DC Input Voltage, Output Voltage (Referenced to GND) TA Operating Temperature Range, All Package Types tr, tf Input Rise/Fall Time (Figure 1) DC CHARACTERISTICS (Voltages Referenced to GND) −55 to 25°C ≤85°C ≤125°C Unit Vout = 0.1V |Iout| ≤ 20mA 4.5 5.5 2.0 2.0 2.0 2.0 2.0 2.0 V Maximum Low−Level Input Voltage Vout = VCC − 0.1V |Iout| ≤ 20mA 4.5 5.5 0.8 0.8 0.8 0.8 0.8 0.8 V Minimum High−Level Output Voltage Vin = VIL |Iout| ≤ 20mA 4.5 5.5 4.4 5.4 4.4 5.4 4.4 5.4 V 4.5 3.98 3.84 3.70 4.5 5.5 0.1 0.1 0.1 0.1 0.1 0.1 4.5 0.26 0.33 0.40 Parameter VIH Minimum High−Level Input Voltage VIL VOH Condition Vin = VIL VOL Guaranteed Limit VCC V Symbol Maximum Low−Level Output Voltage |Iout| ≤ 4.0mA Vin = VIH |Iout| ≤ 20mA Vin = VIH |Iout| ≤ 4.0mA V Iin Maximum Input Leakage Current Vin = VCC or GND 5.5 ±0.1 ±1.0 ±1.0 mA ICC Maximum Quiescent Supply Current (per Package) Vin = VCC or GND Iout = 0mA 5.5 1 10 40 mA DICC Additional Quiescent Supply Current Vin = 2.4V, Any One Input Vin = VCC or GND, Other Inputs Iout = 0mA 5.5 ≥ −55°C 25 to 125°C 2.9 2.4 mA 1. Information on typical parametric values can be found in Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book (DL129/D). 2. Total Supply Current = ICC + ΣDICC. http://onsemi.com 2 MC74HCT20A ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6 ns, VCC = 5.0 V) Guaranteed Limit Symbol Parameter − 55 to 25°C v 85°C v 125°C Unit tPLH, tPHL Maximum Propagation Delay, Input A, B, or C to Output Y (Figures 2 and 3) 28 35 42 ns tTLH, tTHL Maximum Output Transition Time, Any Output (Figures 2 and 3) 15 19 22 ns Maximum Input Capacitance 10 10 10 pF Cin Typical @ 25°C, VCC = 5.0 V CPD 26 Power Dissipation Capacitance (Per Gate) tr tf 90% Vm 10% INPUT A, B, C, OR D (Vi) TEST POINT VCC DEVICE UNDER TEST GND tPHL tPLH 90% Vm 10% OUTPUT Y Vi = GND to 3.0 V Vm = 1.3 V pF OUTPUT CL* *Includes all probe and jig capacitance tTLH tTHL Figure 3. Test Circuit Figure 2. Switching Waveforms A B Y C D Figure 4. Expanded Logic Diagram (1/2 of the Device) ORDERING INFORMATION Package Shipping† MC74HCT20ADG SOIC−14 (Pb−Free) 55 Units/Rail MC74HCT20ADR2G SOIC−14 (Pb−Free) Device MC74HCT20ADTR2G 2500/Tape & Reel TSSOP−14* †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is inherently Pb−Free. http://onsemi.com 3 MC74HCT20A PACKAGE DIMENSIONS SOIC−14 CASE 751A−03 ISSUE J NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. −A− 14 8 −B− P 7 PL 0.25 (0.010) M 7 1 G −T− D 14 PL 0.25 (0.010) T B S A DIM A B C D F G J K M P R J M K M F R X 45 C SEATING PLANE B M S SOLDERING FOOTPRINT* 7X 7.04 14X 1.52 1 14X 0.58 1.27 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 4 MILLIMETERS MIN MAX 8.55 8.75 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0 7 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.337 0.344 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0 7 0.228 0.244 0.010 0.019 MC74HCT20A PACKAGE DIMENSIONS TSSOP−14 CASE 948G−01 ISSUE B 14X K REF 0.10 (0.004) 0.15 (0.006) T U T U M V S S S N 2X 14 L/2 M B −U− L PIN 1 IDENT. N F 7 1 0.15 (0.006) T U 0.25 (0.010) 8 S DETAIL E K A −V− ÉÉÉ ÇÇÇ ÇÇÇ ÉÉÉ K1 J J1 SECTION N−N C 0.10 (0.004) −T− SEATING PLANE D H G DETAIL E NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE −W−. MILLIMETERS INCHES DIM MIN MAX MIN MAX A 4.90 5.10 0.193 0.200 B 4.30 4.50 0.169 0.177 C −−− 1.20 −−− 0.047 D 0.05 0.15 0.002 0.006 F 0.50 0.75 0.020 0.030 G 0.65 BSC 0.026 BSC H 0.50 0.60 0.020 0.024 J 0.09 0.20 0.004 0.008 J1 0.09 0.16 0.004 0.006 −W− K 0.19 0.30 0.007 0.012 K1 0.19 0.25 0.007 0.010 L 6.40 BSC 0.252 BSC M 0 8 0 8 SOLDERING FOOTPRINT* 7.06 1 0.65 PITCH 14X 0.36 14X 1.26 DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 5 MC74HCT20A ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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