2N5194 D

2N5194G, 2N5195G
Silicon PNP Power
Transistors
These devices are designed for use in power amplifier and switching
circuits; excellent safe area limits.
Features
http://onsemi.com
• Complement to NPN 2N5191, 2N5192
• These Devices are Pb−Free and are RoHS Compliant*
MAXIMUM RATINGS (Note 1)
Rating
Collector−Emitter Voltage
2N5194G
2N5195G
Symbol
Value
Unit
VCEO
Vdc
60
80
COLLECTOR
2, 4
Collector−Base Voltage
2N5194G
2N5195G
VCB
Emitter−Base Voltage
VEB
5.0
Vdc
Collector Current
IC
4.0
Adc
Base Current
IB
1.0
Adc
Total Device Dissipation
@ TC = 25°C
Derate above 25°C
PD
40
320
W
W/°C
– 65 to +150
°C/W
Operating and Storage Junction
Temperature Range
4 AMPERE
POWER TRANSISTORS
PNP SILICON
60 − 80 VOLTS
Vdc
60
80
TJ, Tstg
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Indicates JEDEC registered data.
3
BASE
1
EMITTER
TO−225
CASE 77−09
STYLE 1
1 2
3
THERMAL CHARACTERISTICS
Characteristic
Symbol
Max
Unit
Thermal Resistance, Junction−to−Case
RqJC
3.12
°C/W
MARKING DIAGRAM
YWW
2
N519xG
Y
WW
2N519x
G
= Year
= Work Week
= Device Code
x = 4 or 5
= Pb−Free Package
ORDERING INFORMATION
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2013
December, 2013 − Rev. 15
1
Device
Package
Shipping
2N5194G
TO−225
(Pb−Free)
500 Units / Bulk
2N5195G
TO−225
(Pb−Free)
500 Units / Bulk
Publication Order Number:
2N5194/D
2N5194G, 2N5195G
ELECTRICAL CHARACTERISTICS (TC = 25_C unless otherwise noted) (Note 2)
Symbol
Characteristic
Min
Max
Unit
OFF CHARACTERISTICS
VCEO(sus)
Collector−Emitter Sustaining Voltage (Note 3)
(IC = 0.1 Adc, IB = 0)
2N5194G
2N5195G
Vdc
60
80
Collector Cutoff Current
(VCE = 60 Vdc, IB = 0)
2N5194G
(VCE = 80 Vdc, IB = 0)
2N5195G
ICEO
Collector Cutoff Current
(VCE = 60 Vdc, VBE(off) = 1.5 Vdc)
2N5194G
(VCE = 80 Vdc, VBE(off) = 1.5 Vdc)
2N5195G
(VCE = 60 Vdc, VBE(off) = 1.5 Vdc, TC = 125_C)
2N5194G
(VCE = 80 Vdc, VBE(off) = 1.5 Vdc, TC = 125_C)
2N5195G
ICEX
Collector Cutoff Current
(VCB = 60 Vdc, IE = 0)
2N5194G
(VCB = 80 Vdc, IE = 0)
2N5195G
ICBO
Emitter Cutoff Current
(VBE = 5.0 Vdc, IC = 0)
IEBO
−
−
mAdc
−
1.0
−
1.0
mAdc
−
−0.1
−
0.1
−
2.0
−
2.0
mAdc
−
0.1
−
0.1
−
1.0
mAdc
ON CHARACTERISTICS
DC Current Gain (Note 3)
(IC = 1.5 Adc, VCE = 2.0 Vdc)
2N5194G
2N5195G
(IC = 4.0 Adc, VCE = 2.0 Vdc)
2N5194G
2N5195G
hFE
Collector−Emitter Saturation Voltage (Note 3)
(IC = 1.5 Adc, IB = 0.15 Adc)
(IC = 4.0 Adc, IB = 1.0 Adc)
VCE(sat)
Base−Emitter On Voltage (Note 3)
(IC = 1.5 Adc, VCE = 2.0 Vdc)
VBE(on)
−
25
20
100
80
10
7.0
−
−
−
−
0.6
1.4
−
1.2
2.0
−
Vdc
Vdc
DYNAMIC CHARACTERISTICS
Current−Gain − Bandwidth Product
(IC = 1.0 Adc, VCE = 10 Vdc, f = 1.0 MHz)
fT
MHz
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
2. Indicates JEDEC registered data.
3. Pulse Test: Pulse Width ≤ 300Ăms, Duty Cycle ≤Ă2.0%.
http://onsemi.com
2
2N5194G, 2N5195G
hFE , DC CURRENT GAIN (NORMALIZED)
10
7.0
5.0
TJ = 150°C
VCE = 2.0 V
VCE = 10 V
3.0
2.0
1.0
0.7
0.5
25°C
-55°C
0.3
0.2
0.1
0.004
0.007 0.01
0.02
0.03
0.05
0.1
0.2
0.3
IC, COLLECTOR CURRENT (AMP)
0.5
1.0
3.0 4.0
2.0
VCE , COLLECTOR-EMITTER VOLTAGE (VOLTS)
Figure 1. DC Current Gain
2.0
1.6
1.2
IC = 10 mA
100 mA
1.0 A
3.0 A
0.8
TJ = 25°C
0.4
0
0.05 0.07 0.1
0.2
0.3
0.5 0.7
1.0
2.0
3.0
5.0 7.0 10
IB, BASE CURRENT (mA)
20
30
50
70
100
200
300
500
Figure 2. Collector Saturation Region
TJ = 25°C
VOLTAGE (VOLTS)
1.6
1.2
0.8
VBE(sat) @ IC/IB = 10
VBE @ VCE = 2.0 V
0.4
VCE(sat) @ IC/IB = 10
0
0.005 0.01 0.02 0.03 0.05
0.1
0.2 0.3 0.5
1.0
θV, TEMPERATURE COEFFICIENTS (mV/°C)
2.0
2.0 3.0 4.0
+2.5
*APPLIES FOR IC/IB ≤ hFE @ VCE
TJ = -65°C to +150°C
+2.0
+1.5
+1.0
+0.5
*qVC for VCE(sat)
0
-0.5
-1.0
-1.5
qVB for VBE
-2.0
-2.5
0.005 0.01 0.020.03 0.05
0.1
0.2 0.3 0.5
1.0
IC, COLLECTOR CURRENT (AMP)
IC, COLLECTOR CURRENT (AMP)
Figure 3. “On” Voltage
Figure 4. Temperature Coefficients
http://onsemi.com
3
2.0 3.0 4.0
RBE , EXTERNAL BASE-EMITTER RESISTANCE (OHMS)
2N5194G, 2N5195G
103
IC, COLLECTOR CURRENT (A)
μ
VCE = 30 Vdc
102
TJ = 150°C
101
100°C
100
REVERSE
10-1
FORWARD
25°C
10-2
10-3
+0.4 +0.3 +0.2 +0.1
ICES
0
-0.1 -0.2 -0.3 -0.4 -0.5 -0.6
107
VCE = 30 V
106
IC = 10 x ICES
105
IC = 2 x ICES
(TYPICAL ICES VALUES
OBTAINED FROM FIGURE 5)
103
102
20
40
60
VBE, BASE-EMITTER VOLTAGE (VOLTS)
VCC
TURN-ON PULSE
RC
RB
SCOPE
APPROX
+9.0 V
+4.0 V
RB AND RC VARIED
TO OBTAIN DESIRED
CURRENT LEVELS
t3
TURN-OFF PULSE
200
Ceb
100
Ccb
70
t1 ≤ 7.0 ns
100 < t2 < 500 ms
t3 < 15 ns
DUTY CYCLE ≈ 2.0%
50
0.1
0.2 0.3
0.5
1.0
2.0 3.0
5.0
10
20 30 40
VR, REVERSE VOLTAGE (VOLTS)
Figure 8. Capacitance
2.0
2.0
IC/IB = 10
TJ = 25°C
1.0
1.0
0.3
0.2
tr @ VCC = 10 V
td @ VBE(off) = 2.0 V
0.03
0.02
0.2 0.3
0.05 0.07 0.1
0.5 0.7 1.0
IC, COLLECTOR CURRENT (AMP)
IB1 = IB2
IC/IB = 10
ts′ = ts - 1/8 tf
TJ = 25°C
ts′
0.7
0.5
tr @ VCC = 30 V
t, TIME (s)
μ
t, TIME (s)
μ
160
300
Figure 7. Switching Time Equivalent Test Circuit
0.1
0.07
0.05
140
500
Cjd<<Ceb
t1
Vin
0.7
0.5
120
TJ = 25°C
Vin
t2
APPROX
-11 V
100
Figure 6. Effects of Base−Emitter Resistance
CAPACITANCE (pF)
APPROX
-11 V
80
TJ, JUNCTION TEMPERATURE (°C)
Figure 5. Collector Cut−Off Region
VBE(off)
Vin 0
IC ≈ ICES
104
0.3
0.2
0.1
0.07
0.05
2.0
0.03
0.02
0.05 0.07 0.1
3.0 4.0
Figure 9. Turn−On Time
tf @ VCC = 30 V
tf @ VCC = 10 V
0.5 0.7 1.0
0.2 0.3
IC, COLLECTOR CURRENT (AMP)
Figure 10. Turn−Off Time
http://onsemi.com
4
2.0 3.0 4.0
2N5194G, 2N5195G
Note 1:
10
IC, COLLECTOR CURRENT (AMP)
5.0
There are two limitations on the power handling ability of
a transistor; average junction temperature and second
breakdown. Safe operating area curves indicate IC − VCE
limits of the transistor that must be observed for reliable
operation; i.e., the transistor must not be subjected to greater
dissipation than the curves indicate.
The data of Figure 11 is based on TJ(pk) = 150_C. TC is
variable depending on conditions. Second breakdown pulse
limits are valid for duty cycles to 10% provided TJ(pk)
≤ 150_C. At high−case temperatures, thermal limitations
will reduce the power that can be handled to values less than
the limitations imposed by second breakdown.
1.0 ms
5.0 ms
100 ms
TJ = 150°C
2.0
dc
1.0
SECONDARY BREAKDOWN LIMIT
THERMAL LIMIT @ TC = 25°C
BONDING WIRE LIMIT
CURVES APPLY BELOW RATED VCEO
0.5
0.2
2N5194
0.1
1.0
2N5195
2.0
5.0
10
20
50
VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS)
100
r(t), EFFECTIVE TRANSIENT
THERMAL RESISTANCE (NORMALIZED)
Figure 11. Rating and Thermal Data
Active−Region Safe Operating Area
1.0
0.7
0.5
D = 0.5
0.3
qJC(max) = 3.12°C/W
0.2
0.2
0.1
0.1
0.07
0.05
0.03
0.02
0.01
0.01
0.05
0.02
SINGLE PULSE
0.02 0.03
0.01
0.05
0.1
0.2 0.3
0.5
1.0
2.0 3.0 5.0
10
t, TIME OR PULSE WIDTH (ms)
20
30
50
100
200 300
500
1000
Figure 12. Thermal Response
DESIGN NOTE: USE OF TRANSIENT THERMAL RESISTANCE DATA
A train of periodical power pulses can be represented by
the model shown in Figure 13. Using the model and the
device thermal response, the normalized effective transient
thermal resistance of Figure 12 was calculated for various
duty cycles.
To find qJC(t), multiply the value obtained from Figure 12
by the steady state value qJC.
Example:
The 2N5193 is dissipating 50 watts under the following
conditions: t1 = 0.1 ms, tp = 0.5 ms. (D = 0.2).
Using Figure 12, at a pulse width of 0.1 ms and D = 0.2,
the reading of r(t1, D) is 0.27.
The peak rise in junction temperature is therefore:
tP
PP
PP
t1
1/f
t1
tP
PEAK PULSE POWER = PP
DUTY CYCLE, D = t1 f =
Figure 13.
DT = r(t) x PP x qJC = 0.27 x 50 x 3.12 = 42.2_C
http://onsemi.com
5
2N5194G, 2N5195G
PACKAGE DIMENSIONS
TO−225
CASE 77−09
ISSUE AC
4
3 2
1
1 2
3
FRONT VIEW
BACK VIEW
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. NUMBER AND SHAPE OF LUGS OPTIONAL.
E
A1
Q
A
PIN 4
BACKSIDE TAB
D
P
1
2
3
L1
L
2X
DIM
A
A1
b
b2
c
D
E
e
L
L1
P
Q
MILLIMETERS
MIN
MAX
2.40
3.00
1.00
1.50
0.60
0.90
0.51
0.88
0.39
0.63
10.60
11.10
7.40
7.80
2.04
2.54
14.50
16.63
1.27
2.54
2.90
3.30
3.80
4.20
STYLE 1:
PIN 1. EMITTER
2., 4. COLLECTOR
3. BASE
b2
2X
e
b
FRONT VIEW
c
SIDE VIEW
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC
reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without
limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC
does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for
surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where
personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and
its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly,
any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture
of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: [email protected]
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5817−1050
http://onsemi.com
6
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
2N5194/D
Similar pages