C122F1 D

C122F1G
Silicon Controlled Rectifiers
Reverse Blocking Thyristors
Designed primarily for full-wave ac control applications, such as
motor controls, heating controls and power supplies; or wherever
half−wave silicon gate−controlled, solid−state devices are needed.
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Features
SCRs
8 AMPERES RMS
50 VOLTS
• Glass Passivated Junctions and Center Gate Fire for Greater
•
•
•
Parameter Uniformity and Stability
Small, Rugged, Thermowatt Construction for Low Thermal
Resistance, High Heat Dissipation and Durability
Blocking Voltage to 50 Volts
This is a Pb−Free Device*
G
A
K
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating
Symbol
Value
Unit
Peak Repetitive Off−State Voltage
(Note 1) (TJ = 25 to 100°C, Sine Wave,
50 to 60 Hz; Gate Open)
VDRM,
VRRM
50
V
On-State RMS Current
(180° Conduction Angles; TC = 75°C)
IT(RMS)
8.0
Peak Non-Repetitive Surge Current
(1/2 Cycle, Sine Wave, 60 Hz,
TC = 75°C)
ITSM
4
A
90
1
34
A2s
PGM
5.0
W
PG(AV)
0.5
W
Forward Peak Gate Current
(Pulse Width = 10 ms, TC = 70°C)
IGM
2.0
A
Operating Junction Temperature Range
TJ
−40 to +125
°C
Storage Temperature Range
Tstg
−40 to +150
°C
Forward Peak Gate Power
(Pulse Width = 10 ms, TC = 70°C)
Forward Average Gate Power
(t = 8.3 ms, TC = 70°C)
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. VDRM and VRRM for all types can be applied on a continuous basis. Ratings
apply for zero or negative gate voltage; however, positive gate voltage shall
not be applied concurrent with negative potential on the anode. Blocking
voltages shall not be tested with a constant current source such that the
voltage ratings of the devices are exceeded.
A YW
C122F1G
AKA
TO−220AB
CASE 221A
STYLE 3
A
I2t
Circuit Fusing Considerations (t = 8.3 ms)
MARKING
DIAGRAM
2
3
A
Y
W
C122F1
G
AKA
= Assembly Location
= Year
= Work Week
= Device Code
= Pb−Free Package
= Diode Polarity
PIN ASSIGNMENT
1
Cathode
2
Anode
3
Gate
4
Anode
ORDERING INFORMATION
Device
C122F1G
Package
TO220AB
(Pb−Free)
Shipping
500 Units / Box
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2011
May, 2011 − Rev. 4
1
Publication Order Number:
C122F1/D
C122F1G
THERMAL CHARACTERISTICS
Symbol
Max
Unit
Thermal Resistance, Junction−to−Case
Characteristic
RqJC
1.8
°C/W
Thermal Resistance, Junction−to−Ambient
RqJA
62.5
°C/W
TL
260
°C
Min
Typ
Max
Unit
−
−
−
−
10
0.5
mA
mA
−
−
1.83
V
−
−
−
−
25
40
−
−
−
−
1.5
2.0
0.2
−
−
−
−
−
−
30
60
Maximum Lead Temperature for Soldering Purposes 1/8 in. from Case for 10 Seconds
ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted.)
Characteristic
Symbol
OFF CHARACTERISTICS
Peak Repetitive Forward or Reverse Blocking Current
(VAK = Rated VDRM or VRRM, Gate Open)
TC = 25°C
TC = 125°C
IDRM, IRRM
ON CHARACTERISTICS
Peak On−State Voltage (Note 2)
(ITM = 16 A Peak, TC = 25°C)
Gate Trigger Current (Continuous dc)
(VAK = 12 V, RL = 100 W)
Gate Trigger Voltage (Continuous dc)
(VAK = 12 V, RL = 100 W)
VTM
TC = 25°C
TC = −40°C
TC = 25°C
TC = −40°C
Gate Non−Trigger Voltage (Continuous dc)
(VAK = 12 V, RL = 100 W, TC = 125°C)
IGT
VGT
VGD
mA
V
V
Holding Current
(VAK = 12 Vdc, Initiating Current = 200 mA, Gate Open) TC = 25°C
TC = −40°C
IH
mA
Turn-Of f Time (VD = Rated VDRM)
(ITM = 8 A, IR = 8 A)
tq
−
50
−
ms
dv/dt
−
50
−
V/ms
DYNAMIC CHARACTERISTICS
Critical Rate−of−Rise of Off−State Voltage
(VAK = Rated VDRM, Exponential Waveform, Gate Open, TC = 100°C)
2. Pulse Test: Pulse Width ≤ 1 ms, Duty Cycle ≤ 2%.
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2
C122F1G
Voltage Current Characteristic of SCR
+ Current
Symbol
Parameter
VDRM
Peak Repetitive Off State Forward Voltage
IDRM
Peak Forward Blocking Current
VRRM
Peak Repetitive Off State Reverse Voltage
IRRM
Peak Reverse Blocking Current
VTM
Peak On State Voltage
IH
Holding Current
Anode +
VTM
on state
IH
IRRM at VRRM
Reverse Blocking Region
(off state)
Reverse Avalanche Region
+ Voltage
IDRM at VDRM
Forward Blocking Region
(off state)
TC , MAXIMUM ALLOWABLE CASE TEMPERATURE ( °C)
TC , MAXIMUM ALLOWABLE CASE TEMPERATURE ( °C)
Anode −
100
100
90
80
DC
CONDUCTION
ANGLE = 30°
70
60° 90°
120°
180°
0
360
CONDUCTION
ANGLE
60
0
1
2
3
4
5
6
7
8
IT(AV), AVERAGE ON-STATE FORWARD CURRENT (AMPERES)
CONDUCTION CONDUCTION
ANGLE
ANGLE
95
0
90
85
80
CONDUCTION
ANGLE = 60°
75
70
TC , AVERAGE ON-STATE POWER DISSIPATION (WATTS)
P(AV), AVERAGE ON-STATE POWER DISSIPATION (WATTS)
RESISTIVE OR INDUCTIVE LOAD, 50 TO 400 Hz
DC
10
180°
CONDUCTION
ANGLE 30°
6
60°
90°
120°
4
2
0
0
1
2
3
4
5
6
7
180°
240°
360°
60
0
1
2
3
4
5
6
7
8
IT(AV), AVERAGE ON-STATE CURRENT (AMPERES)
Figure 2. Current Derating (Full−Wave)
14
8
120°
RESISTIVE OR
INDUCTIVE LOAD.
50 TO 400 Hz
65
Figure 1. Current Derating (Half−Wave)
12
360
ONE CYCLE OF SUPPLY
FREQUENCY
8
10
360°
240°
180°
8
120°
CONDUCTION
ANGLE = 60°
6
CONDUCTION CONDUCTION
ANGLE
ANGLE
4
0
360
ONE CYCLE OF SUPPLY
FREQUENCY
2
RESISTIVE OR INDUCTIVE LOAD, 50 TO 400 Hz
0
0
1
2
3
4
5
6
7
IT(AV), AVERAGE ON-STATE CURRENT (AMPERES)
IT(AV), AVERAGE ON-STATE CURRENT (AMPERES)
Figure 3. Maximum Power Dissipation
(Half−Wave)
Figure 4. Maximum Power Dissipation
(Full−Wave)
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3
8
C122F1G
PACKAGE DIMENSIONS
TO−220AB
CASE 221A−07
ISSUE AA
−T−
B
F
4
Q
SEATING
PLANE
C
T
S
A
U
1 2 3
H
K
Z
R
L
V
J
G
D
N
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION Z DEFINES A ZONE WHERE ALL
BODY AND LEAD IRREGULARITIES ARE
ALLOWED.
DIM
A
B
C
D
F
G
H
J
K
L
N
Q
R
S
T
U
V
Z
INCHES
MIN
MAX
0.570
0.620
0.380
0.405
0.160
0.190
0.025
0.035
0.142
0.147
0.095
0.105
0.110
0.155
0.014
0.022
0.500
0.562
0.045
0.060
0.190
0.210
0.100
0.120
0.080
0.110
0.045
0.055
0.235
0.255
0.000
0.050
0.045
----0.080
STYLE 3:
PIN 1.
2.
3.
4.
MILLIMETERS
MIN
MAX
14.48
15.75
9.66
10.28
4.07
4.82
0.64
0.88
3.61
3.73
2.42
2.66
2.80
3.93
0.36
0.55
12.70
14.27
1.15
1.52
4.83
5.33
2.54
3.04
2.04
2.79
1.15
1.39
5.97
6.47
0.00
1.27
1.15
----2.04
CATHODE
ANODE
GATE
ANODE
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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For additional information, please contact your local
Sales Representative
C122F1/D
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