AK4103AVF

[AKD4103A-B]
AKD4103A-B
AK4103A Evaluation Board Rev.1
GENERAL DESCRIPTION
The AKD4103A-B is an evaluation board for the AK4103A, 192kHz DIT. The AKD4103A-B has the interface
with AKM’s A/D converter evaluation boards and AKM’s DIR evaluation boards. Therefore, it is easy to evaluate
the AK4103A. The AKD4103A-B also has the digital audio interface and can achieve the interface with digital
audio systems via BNC unbalance or XLR balance connector.
 Ordering guide
AKD4103A-B ---
Evaluation board for AK4103A
(Control software is packed with this.)
FUNCTION
 Digital interface
 Compatible with 2 types of interface
- Direct interface with AKM’s ADC, DIR evaluation boards by 10pin header
- BNC/XLR output
 Serial control data I/F
- 1 input/output port (10-pin port)
5V
GND
Control
AK4103A
TX
Serial Data in
(For DIT)
C,U,V
Figure 1. AKD4103A-B Block Diagram
*Circuit diagram and PCB layout are attached at the end of this manual.
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Evaluation Board Manual
 Operating sequence
(1) Set up the power supply lines.
[+ 5V]
(Red) = 5V
[GND]
(Black) = 0V
(2) Set up the evaluation mode and jumper pins. (Refer to the following item.)
(3) Connect cables. (Refer to the following item.)
(4) Power on.
The AK4103A should be reset once bringing PDN(SW2) “L” upon power-up.
 Evaluation modes
(1) Evaluation for DIT
Serial Data in(10pin port) – AK4103A – S/PDIF out(XLR or BNC)
MCLK
BICK
LRCK
DAUX
ADC
PORT5
(10pin Header)
MCLK
BICK
LRCK
DAUX
AK4103A
(DIT)
XLR or BNC
connector
S/PDIF
AKD4103A-B
MCLK, BICK, LRCK and SDTI are input the via 10pin header (PORT5: DIT). The AKD4103A-B can be
connected with the AKM’s DAC evaluation board via 10-line cable.
a.
Set-up of a Bi-phase output signal
Connector
JP19 (TXP)
XLR (J3)
XLR
BNC (J4)
BNC
Table 1. Set-up of TXP
b.
Set-up of clock input and output
The used signals are MCLK, LRCK, BICK and SDTI (DAUX).
The signal level outputted and inputted from PORT5 is 5V.
Clock
PORT
MCLK
PORT5
BICK
PORT5
LRCK
PORT5
SDTI
PORT5
(DAUX)
Table 2. Clock input/output
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CKS1 pin
(SW3_5)
CKS1 bit
CKS0 pin
(Sub_JP19)
CKS0 bit
MCLK
fs (max)
0
0
128fs
28k-192 kHz
0
1
256fs
28k-108 kHz
1
0
384fs
28k-54 kHz
1
1
512fs
28k-54 kHz
Default
Table 3. Master Clock Frequency Select
b-1. Set-up of input/output of BICK and LRCK
Please set up SW 3_8 (DIT_I/O) according to the setup of audio format of AK4103A (Refer to Table 5).
Audio format
SW3_8 (DIT_I/O)
Slave mode
0
Master mode
1
Table 4. Set-up of DIT_I/O
c.
Default
Set-up of audio data format
It sets up by SW 1_2, SW 1_3 and SW1_4 in synchronous mode. Please set up DIF2-0 bit in asynchronous mode.
Mode
0
1
2
3
4
5
6
7
DIF2 pin
(SW1_4)
DIF2 bit
0
0
0
0
1
1
1
1
DIF1 pin
(SW1_3)
DIF1 bit
0
0
1
1
0
0
1
1
DIF0 pin
(SW1_2)
DIF0 bit
0
1
0
1
0
1
0
1
SDTI
16bit, Right justified
18bit, Right justified
20bit, Right justified
24bit, Right justified
24bit, Left justified
24bit, I2S
24bit, Left justified
24bit, I2S
LRCK
H/L
H/L
H/L
H/L
H/L
L/H
H/L
L/H
I/O
I
I
I
I
I
I
O
O
BICK
32fs-128fs
36fs-128fs
40fs-128fs
48fs-128fs
48fs-128fs
50fs-128fs
64fs
64fs
I/O
I
I
I
I
I
I
O
O
Default
Table 5. Audio format
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 B, C, U, V Inputs (at synchronous mode)
V
VD
GND
GND
C
U
GND
10
GND
9
GND
PORT3
BCUV
BLS
At synchronous mode (ANS=1), C(channel status), U(user data) and V(validity) are input via 10pin header (PORT3:
BCUV). BLS is output at normal mode (TRANS=0), and is input at audio routing mode (TRANS=1). In case of
audio routing mode, BLS, C, U an V can be directly input from the AKD4114 via 10-line flat cable. The pin layout of
PORT3 is shown in Figure 2.
1
2
Figure 2. PORT3 pin layout
 Serial control
The AK4103A can be controlled by pins at synchronous mode (ANS=1) and by internal register at asynchronous
mode (ANS=0). Synchronous/Asynchronous mode is set as Table 6.
Mode
Synchronous
Asynchronous
SW1-6 (ANS)
JP18 (SDA/CDTO)
FS3=1: Short “CDTO/CM0=H” side.
ON
FS3=0: Short “CM0=L” side.
OFF
Short “CDTO/CM0=H” side.
Table 6. Synchronous/Asynchronous mode
Sub_JP20 (ANS)
Open.
Short.
Default
GND
GND
CCLK
CSN
GND
GND
CDTI
1
CDTO
2
NC
PORT6
uP I/F
GND
At asynchronous mode (ANS=0), the AK4103A can be controlled via the printer port (parallel port) of IBM-AT
compatible PC. Connect PORT6 (uP-I/F) with PC by 10-line flat cable packed with the AKD4103A-B. Take care of
the direction of connector. There is a mark at pin#1. The pin layout of PORT6 is shown in Figure 3.
10
9
Figure 3. PORT6 pin layout
Control software is packed with the AKD4103A-B. The software manual is included in this eva-board manual.
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 Toggle switch set-up
SW2
PDN
Reset switch for AK4103A. Set to “H” during normal operation. Bring to “L” once after
the power is supplied.
 DIP switch (SW1) set-up: -off- means “L”
No.
Switch Name
Function
1
IPS0
Don’t care
2
DIF0
Set-up of DIF0 pin. (in synchronous mode)
3
DIF1
Set-up of DIF1 pin. (in synchronous mode)
4
DIF2
Set-up of DIF2 pin. (in synchronous mode)
5
IPS1/IIC
Don’t care
Set-up of ANS pin. “L”: asynchronous mode, “H”: synchronous mode
6
ANS
7
TEST
Don’t care
8
ACKS
Don’t care
 DIP switch (SW3) set-up: -off- means “L”
No.
Switch Name
Function
1
FS1
Sampling frequency select at synchronous mode (ANS=1).
2
FS2
(See the datasheet.)
3
FS0
4
PSEL
Don’t care
5
CKS1
Set-up of CKS1 pin. (in synchronous mode)
6
TRANS
Set-up of TRANS pin. “L”: normal mode, “H”: audio routing mode
DIR_I/O
7
Don’t care
Set-up of the transmission direction of 74AC245
8
DIT_I/O
“L”: When inputting from PORT5, “H”: When outputting from PORT5
 Jumper set up.
No.
Jumper Name
1
D3V/VD
18
SDA/CDTO
19
TXP1
19(sub)
CKS0
20(sub)
ANS
Default
OFF
OFF
OFF
ON
OFF
OFF
OFF
OFF
Default
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
Function
Set-up of Power supply source for 74AC245.
D3V : D3V
VD : VD (default)
Set-up of FS3 pin
Synchronous mode : short “CDTO/CM0=H” → FS3 pin=“H”
short “CM0=L” → FS3 pin=“L”
Asynchronous mode: short “CDTO/CM0=H” (default)
Set-up of TXP1 output circuit.
OPT : Not to Use.
XLR : XLR
BNC : BNC (default)
Set-up of CKS0 pin
Open : CKS0 pin=“H” (default)
Short : CKS0 pin=“L”
Set-up depending synchronous / asynchronous mode
Open : synchronous mode
Short : asynchronous mode (default)
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[AKD4103A-B]
Control Soft Manual
 Evaluation Board and Control Soft Settings
1. Set an evaluation board properly.
2. Connect a USB control box (AKUSBIF-B) and an evaluation board.
Pay attention about direction of the 10pin header when connecting to an AKUSBIF-B.
3. Connect a PC (IBM-AT compatible) and the USB control box (AKUSBIF-B).
The USB control box is recognized as HID (Human Interface Device) on the PC.
It is not necessary to install a new driver.
4. Start up the control program.
When the screen does not display “AKUSBIF-B” at bottom left, reconnect the PC and the USB control box, and push
the [Port Reset] button.
5. Proceed evaluation by following the process below.
[Support OS]
Windows XP / Vista / 7 (32bit) (XP compatible mode is recommended for Vista / 7)
64bit OS’s are not supported.
Figure 4. Window of [ FUNCTION]
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■Operation Overview
Function, register map and testing tool can be controlled by this control soft. These controls are selected by upper tabs.
Buttons which are frequently used such as register initializing button “Write Default”, are located outside of the
switching tab window. Refer to the “■ Dialog Boxes” for details of each dialog box setting.
1. [Port Reset]: For when connecting to USB I/F board (AKDUSBIF-B)
Click this button after the control soft starts up when connecting USB I/F board (AKDUSBIF-B).
2. [Write Default]: Initializes Registers
When the device is reset by a hardware reset, use this button to initialize the registers.
3. [All Write]: Executes write commands for all registers displayed.
4. [All Read]: Executes read commands for all registers displayed.
5. [Save]: Saves current register settings to a file.
6. [Load]: Executes data write from a saved file.
7. [All Req Write]: Opens “All Req Write” dialog box.
8. [Data R/W]: Opens “Data R/W” dialog box
9. [Sequence]: Opens “Sequence” dialog box.
10. [Sequence(File)]: Opens “Sequence(File)” dialog box.
11.
[Read]: Reads current register settings and displays on to the register area (on the right of the main window).
This is different from [All Read] button, it does not reflect to a register map, only displaying register
settings in hexadecimal.
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[AKD4103A-B]
■Dialog Boxes
[All Req Write]
Click [All Reg Write] button in the main window to open register setting files.
Register setting files saved by [SAVE] button can be applied.
Figure 5. Window of [ All Reg Write]
[Open (left)]
[Write]
[Write All]
[Help]
[Save]
[Open (right)]
[Close]
: Selecting a register setting file (*.akr).
: Executing register writing.
: Executing all register writings.
Writings are executed in descending order.
: Help window is popped up.
: Saving the register setting file assignment. The file name is “*.mar”.
: Opening a saved register setting file assignment “*. mar”.
: Closing the dialog box and finish the process.
*Operating Suggestions
(1) Those files saved by [Save] button and opened by [Open] button on the right of the dialog “*.mar” should be
stored in the same folder.
(2) When register settings are changed by [Save] button in the main window, re-read the file to reflect new register
settings.
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[Data R/W]
Click the [Data R/W] button in the main window for data read/write dialog box.
Data write is available to specified address.
Figure 6. Window of [ Data R/W ]
Address Box : Input data address in hexadecimal numbers for data writing.
Data Box
: Input data in hexadecimal numbers.
Mask Box
: Input mask data in hexadecimal numbers.
This is “AND” processed input data.
[Write]
[Close]
: Writing to the address specified by “Address” box.
: Closing the dialog box and finish the process.
Data writing can be cancelled by this button instead of [Write] button.
*The register map will be updated after executing [Write] or [Read] commands.
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[Sequence]
Click [Sequence] button to open register sequence setting dialog box.
Register sequence can be set in this dialog box.
Figure 7. Window of [ Sequence ]
Sequence Setting
Set register sequence by following process bellow.
(1)Select a command
Use [Select] pull-down box to choose commands.
Corresponding boxes will be valid.
< Select Pull-down menu >
· No_use
: Not using this address
· Register
: Register writing
· Reg(Mask)
: Register writing (Masked)
· Interval
: Taking an interval
· Stop
: Pausing the sequence
· End
: Finishing the sequence
(2)Input sequence
[Address]
[Data]
[Mask]
[ Interval ]
: Data address
: Writing data
: Mask
[Data] box data is ANDed with [Mask] box data. This is the actual writing data.
When Mask = 0x00, current setting is hold.
When Mask = 0xFF, the 8bit data which is set in the [Data] box is written.
When Mask =0x0F, lower 4bit data which is set in the [Data] box is written.
Upper 4bit is hold to current setting.
: Interval time
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[AKD4103A-B]
Valid boxes for each process command are shown bellow.
· No_use
: None
· Register
: [Address], [Data], [Interval]
· Reg(Mask)
: [Address], [Data], [Mask], [Interval]
· Interval
: [Interval]
· Stop
: None
· End
: None
Control Buttons
The function of Control Button is shown bellow.
[Start]
[Help]
[Save]
[Open]
[Close]
: Executing the sequence
: Opening a help window
: Saving sequence settings as a file. The file name is “*.aks”.
: Opening a sequence setting file “*.aks”.
: Closing the dialog box and finish the process.
Stop of the sequence
When “Stop” is selected in the sequence, processing is paused and it starts again when [Start] button is clicked.
Restarting step number is shown in the “Start Step” box. When finishing the process until the end of sequence, “Start
Step” will return to “1”.
The sequence can be started from any step by writing the step number to the “Start Step” box.
Write “1” to the “Start Step” box and click [Start] button, when restarting the process from the beginning.
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[AKD4103A-B]
[Sequence(File)]
Click [Sequence(File)] button to open sequence setting file dialog box.
Those files saved in the “Sequence setting dialog” can be applied in this dialog.
Figure 8. Window of [ Sequence(File) ]
[Open (left)] : Opening a sequence setting file (*.aks).
[Start]
: Executing the sequence setting.
[Start All]
: Executing all sequence settings.
Sequences are executed in descending order.
[Help]
: Pop up the help window.
[Save]
: Saving sequence setting file assignment. The file name is “*.mas”.
[Open(right)] : Opening a saved sequence setting file assignment “*. mas”.
[Close]
: Closing the dialog box and finish the process.
*Operating Suggestions
(1) Those files saved by [Save] button and opened by [Open] button on the right of the dialog
“*.mas” should be stored in the same folder.
(2) When “Stop” is selected in the sequence the process will be paused and a pop-up message will appear. Click “OK”
to continue the process.
Figure 9. Window of [ Sequence Pause ]
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[AKD4103A-B]
1. [REG]: Register Map
This tab is for a register writing and reading.
Each bit on the register map is a push-button switch.
Button Down indicates “H” or “1” and the bit name is in red (when read only it is in deep red).
Button Up indicates “L” or “0” and the bit name is in blue (when read only it is in gray)
Grayout registers are Read Only registers. They can not be controlled.
The registers which is not defined in the datasheet are indicated as “---”.
Figure 10. Window of [ REG]
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[Write]: Data Writing Dialog
It is for when changing two or more bits on the same address at the same time.
Click [Write] button located on the right of the each corresponded address for a pop-up dialog box.
When checking the checkbox, the register will be “H” or “1”, when not checking the register will be “L” or ”0”.
Click [OK] to write setting value to the registers, or click [Cancel] to cancel this setting.
Figure 11. Window of [ Register Set ]
[Read]: Data Read
Click [Read] button located on the right of the each corresponded address to execute register reading.
After register reading, the display will be updated regarding to the register status.
Button Down indicates “H” or “1” and the bit name is in red (when read only it is in deep red).
Button Up indicates “L” or “0” and the bit name is in blue (when read only it is in gray)
Please be aware that button statuses will be changed by Read command.
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[AKD4103A-B]
Revision History
Date
(yy/mm/dd)
Manual
Revision
Board
Revision
Reason
04/11/22
05/11/21
10/03/05
11/07/27
KM076800
KM076801
KM076802
KM076803
0
0
0
0
First edition
Modification
Change
Change
15/08/11
KM076804
1
Change
Page
2
6-14
6-14
19
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Contents
Block diagram at DIT Evaluation was added.
“Control Soft Manual” was changed.
“Control Soft Manual” was changed.
Circuit diagram was changed.
PORT4: “Mount” -> “No Mount”
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[AKD4103A-B]
IMPORTANT NOTICE
0. Asahi Kasei Microdevices Corporation (“AKM”) reserves the right to make changes to the information
contained in this document without notice. When you consider any use or application of AKM product
stipulated in this document (“Product”), please make inquiries the sales office of AKM or authorized
distributors as to current status of the Products.
1. All information included in this document are provided only to illustrate the operation and application
examples of AKM Products. AKM neither makes warranties or representations with respect to the accuracy
or completeness of the information contained in this document nor grants any license to any intellectual
property rights or any other rights of AKM or any third party with respect to the information in this document.
You are fully responsible for use of such information contained in this document in your product design or
applications. AKM ASSUMES NO LIABILITY FOR ANY LOSSES INCURRED BY YOU OR THIRD
PARTIES ARISING FROM THE USE OF SUCH INFORMATION IN YOUR PRODUCT DESIGN OR
APPLICATIONS.
2. The Product is neither intended nor warranted for use in equipment or systems that require extraordinarily
high levels of quality and/or reliability and/or a malfunction or failure of which may cause loss of human life,
bodily injury, serious property damage or serious public impact, including but not limited to, equipment used
in nuclear facilities, equipment used in the aerospace industry, medical equipment, equipment used for
automobiles, trains, ships and other transportation, traffic signaling equipment, equipment used to control
combustions or explosions, safety devices, elevators and escalators, devices related to electric power, and
equipment used in finance-related fields. Do not use Product for the above use unless specifically agreed by
AKM in writing.
3. Though AKM works continually to improve the Product’s quality and reliability, you are responsible for
complying with safety standards and for providing adequate designs and safeguards for your hardware,
software and systems which minimize risk and avoid situations in which a malfunction or failure of the
Product could cause loss of human life, bodily injury or damage to property, including data loss or corruption.
4. Do not use or otherwise make available the Product or related technology or any information contained in this
document for any military purposes, including without limitation, for the design, development, use,
stockpiling or manufacturing of nuclear, chemical, or biological weapons or missile technology products
(mass destruction weapons). When exporting the Products or related technology or any information
contained in this document, you should comply with the applicable export control laws and regulations and
follow the procedures required by such laws and regulations. The Products and related technology may not be
used for or incorporated into any products or systems whose manufacture, use, or sale is prohibited under any
applicable domestic or foreign laws or regulations.
5. Please contact AKM sales representative for details as to environmental matters such as the RoHS
compatibility of the Product. Please use the Product in compliance with all applicable laws and regulations
that regulate the inclusion or use of controlled substances, including without limitation, the EU RoHS
Directive. AKM assumes no liability for damages or losses occurring as a result of noncompliance with
applicable laws and regulations.
6. Resale of the Product with provisions different from the statement and/or technical features set forth in this
document shall immediately void any warranty granted by AKM for the Product and shall not create or extend
in any manner whatsoever, any liability of AKM.
7. This document may not be reproduced or duplicated, in any form, in whole or in part, without prior written
consent of AKM.
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5
4
3
2
1
33
LRCK
MCLK
34
35
36
37
FS3/CDTO
38
FS1/CDTI
39
FS2/CCLK
FS0/CSN
CKS1
D
40
41
42
43
44
45
46
CKS1
47
TRANS
48
CN3
D
FS3/CDTO
CN4
CN2
BICK
49
BICK
32
U7
50
31
1
V1
U1
24
51
30
2
TRANS
DIF2
PDN
DIF1
23
DIF2
52
29
3
C
22
C
DIF1
53
28
4
MCLK
DIF0
SDTI
TXP
BICK
TXN
LRCK
VSS
21
DIF0
54
27
5
20
55
26
6
BICK
19
56
25
18
2
7
C19
FS0/CSN
VDD
FS1/CDTI
CKS1
FS2/CCLK
CKS0
17
0.1u
1
8
+
57
TXN
C20
TXP
58
9
16
24
10u
23
CKS1
59
22
10
B
1
15
2 JP19
CKS0
B
VDD
60
11
FS3/CDTO
FS3/CDTO
BLS
C1
ANS
V
61
12
1
13
20
2 JP20
ANS
U
62
AK4103A
63
21
14
C
BLS
64
19
18
17
DIF2
DIF1
CN1
5
16
15
14
13
12
11
10
9
SDTI
8
7
6
DIF2
5
PDN
4
3
DIF0
1
DIF1
A
DIF0
2
A
Title
Size
A3
- 174
3
Date:
2
AKD4103A-B
Document Number
Rev
AKD4103A-B-SUB
Tuesday, August 11, 2015
Sheet
1
1
3
of
3
5
4
3
2
1
CN4
For U6
For U1, U2, U5
VD
D3V
D3V
VD
JP1
1
D3V
2
3
VD
49
For U3, U4
D3V/VD
50
51
C1
C2 C3 C4
C5
0.1u
0.1u0.1u0.1u
0.1u 0.1u
C6
AVDD
D
P/SN/ANS
ACKS
+5V
L2
1
P/SN/ANS
ACKS
RXN0
10u
2
AVDD
52
D
53
54
55
TVDD/VDD
RXP0
R4
56
VD
57
short
RX1
C14
47u
AVDD
1
1
IN
+
2
2
+
OUT
3
1
2
GND
T3
RX2
C15
47u
IPS0
DIF0
DIF1
DIF2/XSEL
IPS1/IIC
P/SN/ANS
TEST
ACKS
R8
C
AVDD
D3V
short
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
D3V
RX3
AVDD
AVDD
IPS0/RX4
JP8
1
RX5
2
3
DIF0
9
8
7
6
5
4
3
2
1
JP9
1
RX6
2
3
DIF1
TEST
TEST
DIF1/RX6
15
1
K
EMCK2
14
H
C
63
64
1
2
3
4
5
U2B
74HC14
4
VIN
R10
DAUX2
VIN
6
DAUX
7
8
100
C16
SW 2
PDN
3
L
DAUX2
DVDD
7
100
R12
1
A
R11
U2A
74HC14
2
3
12
100
7
4Y
9
62
B
7
1
3Y
DVDD
D3V
10k
D1
14
16
D3V
1Y
2Y
8
G
A/B
D3V
4
DIF2/XSEL/RX7
9
0.1u
MCKO1
2
DAUX1
R9
GND
EMCK1
1A
1B
2A
2B
3A
3B
4A
4B
PDN
JP10
1
RX7
2
3
DIF2/XSEL
D3V
U1
60
CN1
DIF0/RX5
IPS1/IIC
P/SN/ANS
TEST
ACKS
47k
2
3
5
6
11
10
14
13
59
61
SW1
RP1
B
58
10
74LVC157
MCKO2
OVDD
OVDD
11
12
13
BICK
SDTO
LRCK
A
Title
- 18-
Size
A3
Date:
5
4
3
2
14
15
A
16
AKD4103A-B
Document Number
Rev
MAIN
Tuesday, August 11, 2015
1
Sheet
1
1
of
2
5
4
3
2
1
CN2
PORT3
GND
+5V
JP19
1
3
5
1
OPT
XLR
BNC
1
1
2
3
4
5
2
4
6
TXP1
R29
R30
R31
R32
D
VOUT
TVDD
4
C17
1
0.1u
5
R37
330
5
JP14
1:1
TXN1
XLR
TXN1
BNC
XLOUT
1 MCKO
JP15
100
1:1
3 EMCK
1
2
3
4
5
R82
R83
1 DC
DAUX1
C
DIT
22
2
JP16
23
24
27
D3V/VD
U4
MCLK
BICK
LRCK
DAUX
D
21
EMCK1
100k
PORT5
10
9
8
7
6
20
26
2
MCLK
R38
GND
GND
GND
GND
NC
19
25
J3
100
100
3 AC
ELRCK
R42
R40
R41
100k
100k
47k
47k
47k
47k
47k
47k
28
B0
B1
B2
B3
B4
B5
B6
B7
GND
100k
R84
R85
R86
R87
R88
R89
18
17
16
15
14
13
12
11
20
4
1
8
1
3
3
4
1
4
2
56
D3V/VD
2
1
TXP1
8
0.1u
R36
18
R34
0.1u
T5
17
2
R33
1k
T4
DA02-F
J4
2
3
4
5
47k
47k
47k
47k
TX0
VD
(No Mount)
TX0
U
1
4
3
2
1
IN
VCC
IF
GND
6
C
VIN
TVDD/VDD
PORT4
5
B
100
100
100
100
100
3
6
R24
R25
R26
R27
R28
B
C
U
VOUT
VIN
BCUV
+5V
5
10
9
8
7
6
2
3
4
5
6
7
8
9
A0
A1
A2
A3
A4
A5
A6
A7
R96
R97
R90
R91
R92
R93
R94
R95
1
19
DIR
OE
100
100
47k
47k
47k
47k
47k
47k
29
OVDD
OVDD
30
C
31
EBICK
DIT_I/O
32
14
10
74AC245
CN3
U2C
6
EMCK
EMCK2
5
33
DC 1
2 JP17
AC 3
14
7
74HC14
ELRCK
ELRCK
INT0
U2D
8
INT1
9
14
11
10
R54
10k
R55
470
PORT6
10
8
6
4
2
14 7
74HC14
U2F
9
7
5
3
1
CSN
R56
SCL/CCLK
SDA/CDTI
51
SDA(ACK)/CDTO
P/SN/ANS
12
15
1
1A
1B
2A
2B
3A
3B
4A
4B
4
1Y
R53
12
4Y
G
A/B
CM1/CDTI/SDA
100
37
38
B
100
VD
9
3Y
36
R50
7
2Y
8
13
2
3
5
6
11
10
14
13
OCKS1/CCLK/SCL
14
470
35
39
U6A
OCKS0/CSN/CAD0
1
2
74LVC157
DVDD
DVDD
74LS07
40
41
7
470
R52
D3V
R49
10k
CM0/CDTO/CAD1
GND
7
10k
R51
U2E
B
U5
R48
VD
16
D3V
74HC14
34
uP-I/F
7
74HC14
R58
JP18
1
SDA
CDTO/CM0=H 3
5
CM0=L
D3V
CM1/FS1
OCKS1/FS2
OCKS0/FS0
PSEL
XTL0/CKS1
XTL1/TRANS
DIR_I/O
DIT_I/O
1
2
3
4
5
6
7
8
SW3
16
15
14
13
12
11
10
9
10k
D3V
D3V
2
4
6
42
R57
R59
10k
R60
SDA/CDTO
43
100
IPS1/IIC
100
IPS1/IIC
PSEL
D3V/VD
XTL0
RP2
XTL1
U6D
8
9
7
U6C
6
5
- 19-
11
74LS07
7
47k
4
3
A
74LS07
U6E
10
Title
74LS07
Size
A3
Date:
5
47
12
74LS07
7
74LS07
DIR_I/O
DIT_I/O
46
48
U6F
13
45
7
U6B
4
3
7
9
8
7
6
5
4
3
2
1
A
44
2
AKD4103A-B
Document Number
Rev
MAIN
Tuesday, August 11, 2015
1
Sheet
1
2
of
2
- 20-
- 21-
- 22-
- 23-
- 24-
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