AK4614VQ

[AKD4614-A]
AKD4614-A
AK4614 Evaluation Board Rev.2
GENERAL DESCRIPTION
AKD4614-A is an evaluation board for AK4614: 24bits, one-chip CODEC that includes six channels of
ADC and twelve channels of DAC. AKD4614-A, it has the interface with the evaluation board of ADC and
DAC of AKEMD’s, so it is easy to evaluate A/D and D/A. And also, AKD4614-A, it has the digital audio
interface, so it is available to achieve the interface with the equipments of digital audio systems, via RCA
connectors.
„ Ordering guide
AKD4614-A -- AK4614 Evaluation Board
The 10-line flat cable to connect with the printer port of PC (IBM-AT compatible),
the control software, and the drivers for Windows 2000/XP are packed with this.
The control software does not work on Windows NT.
Windows 2000/XP requires the installation of the drivers.
Windows 95/98/ME does not require the installation of the drivers.
FUNCTION
† Clock generate circuits (x2, use AK4114)
† 2 types of digital audio interface
- RCA/Opt (S/PDIF) input/Output
- 10pin headers (x2) for the interface with external equipments
† RCA connectors for the external clock inputs
† 10pin header for serial control (register control)
-12V
+12V
+1.8V
+3.3V
Regulator
GND
10pin Header
Regulator
LIN1
RIN1
LIN2
RIN2
LIN3
RIN3
LOUT1
ROUT1
LOUT2
ROUT2
LOUT3
ROUT3
LOUT4
ROUT4
LOUT5
ROUT5
LOUT6
ROUT6
OPT
IN
AK4114
(DIR)
OP
Amp
Buffer
AK4614
COAX
IN
EXT-MCLK
EXT-BICK
EXT-LRCK
MCLK
BICK
LRCK
10pin
Header
OP
Amp
AK4114
(DIT)
10pin Header
Control Data
COAX
OUT
OPT
OUT
10pin Header
(Note) AK4114 includes DIR, DIT, X’tal Oscillator
Figure1. AKD4614-A Block Diagram (*Circuit diagram and PCB layout are attached at the end of this manual.)
<KM090302>
2008/10
-1-
[AKD4614-A]
Evaluation Board Manual
„ Operation sequence
[1] The settings of the power supply lines
[2] The settings of the jumper pins
[3] The settings of the DIP switches
[4] The settings of the toggle switches
[5] The indications of the LEDs
[6] The register control (The serial control)
[7] The evaluation modes
Refer to the following pages on the details.
<KM090302>
2008/10
-2-
[AKD4614-A]
[1] The settings of the power supply lines
Jack
Names
VOP
PLUS
Jack
Colors
Red
Voltage
Ranges
+9∼+12V
Typ
Voltages
+12V
VOP
MINUS
Red
-9∼-12V
-12V
AVDD1
Red
+3.0∼+3.6V
+3.3V
Used for
The power supply
of the regulator,
The plus terminal
of the power supply
of the OPAmp
The minus terminal
of the power supply
of the OPAmp
AVDD1 of AK4614
AVDD2
Red
+3.0∼+3.6V
+3.3V
AVDD2 of AK4614
TVDD1
Red
+3.3V
TVDD1 of AK4614,
The power supply
of the level shifter
TVDD2
Red
+1.6∼+3.6V
or
+3.0∼+3.6V
(Note1)
+1.6∼+3.6V
+3.3V
DVDD
Red
+1.6∼+2.0V
+1.8V
AK4614: TVDD2,
The power supply
of the level shifter
DVDD of AK4614
VDD
Red
+3.0∼+3.6V
+3.3V
AGND
DGND
Black
Black
0V
0V
0V
0V
VDD of AK4114,
The power supply
of the level shifter,
The power supply
of the logic IC.
Analog ground
Digital ground
Comments and attentions
Should be always connected.
Default
Settings
+12V
Should be always connected.
-12V
When the regulator of 3.3V is used
(JP99=REG side), this jack should
be open.
When the regulator of 3.3V is used
(JP101=REG side), this jack should
be open.
When the regulator of 3.3V is used
(JP97=REG side), this jack should
be open.
Open
When the regulator of 3.3V is used
(JP98=REG side), this jack should
be open.
When the regulator of 1.8V is used
(JP96=REG side), this jack should
be open.
When the regulator of 3.3V is used
(JP102=REG side), this jack should
be open.
Open
Should be always connected.
Should be always connected.
0V
0V
Open
Open
Open
Open
Table 1. The settings of the power supply lines
Note 2. The voltage range of TVDD1 is +1.6∼+3.6V on the Stereo Mode and the Normal Speed Mode,
and +3.0∼+3.6V on the other modes.
Note 3. The each supply lines should be distributed from the power supply units.
<KM090302>
2008/10
-3-
[AKD4614-A]
[2] The settings of the jumper pins
No
99
AVDD1
Names
101
AVDD2
97
TVDD1
98
TVDD2
96
DVDD
102
VDD
100
GND
92
AK4614-4-wire / I2C
93
CDTO / SDA (ACK)
65
AK4614-Master / Slave
Functions
The selection of the power supply to “AVDD1”.
REG: Regulator “T2”. (Default)
(When regulator “T2” is selected, power supply jack “AVDD1” should be open.)
JACK: Power supply jack “AVDD1”.
The selection of the power supply to “AVDD2”.
REG: Regulator “T2”. (Default)
(When regulator “T2” is selected, power supply jack “AVDD2” should be open.)
JACK: Power supply jack “AVDD2”.
The selection of the power supply to “TVDD1”.
REG: Regulator “T4”. (Default)
(When regulator “T4” is selected, power supply jack “TVDD1” should be open.)
JACK: Power supply jack “TVDD1”.
The selection of the power supply to “TVDD2”.
REG: Regulator “T4”. (Default)
(When regulator “T4” is selected, power supply jack “TVDD2” should be open.)
JACK: Power supply jack “TVDD2”.
The selection of the power supply to “DVDD”.
REG: Regulator “T3”. (Default)
(When regulator “T3” is selected, power supply jack “DVDD” should be open.)
JACK: Power supply jack “DVDD”.
The selection of the power supply to “VDD”.
REG: Regulator “T4”. (Default)
(When regulator “T4” is selected, power supply jack “VDD” should be open.)
JACK: Power supply jack “VDD”.
The selection of the connection / separation between analog ground and digital
ground.
Open: Separate analog ground from digital ground. (Default)
Short: Connect analog ground to digital ground.
The selection of “4-wire Serial Mode” / “I2C Bus Mode” of AK4614 (U1).
4-wire: “4-wire Serial Mode”. (Default)
I2C: “I2C Bus Mode”.
When “4-wire Serial Mode” is selected, “CDTO” should be selected at JP93 at same
time. And Set No.3 pin (“I2C”) of DIP switch SW2 to “L” (“4-wire Serial Mode”).
When “I2C Bus Mode” is selected, “SDA (ACK) ” should be selected at JP93 at same
time. And Set No.3 pin (“I2C”) of DIP switch SW2 to “H” (“I2C Bus Mode”).
The selection of “CDTO” (“4-wire Serial Mode”) / “SDA (ACK) ” (“I2C Bus
Mode”).
CDTO: “CDTO” (“4-wire Serial Mode”). (Default)
SDA (ACK): “SDA (ACK)” (“I2C Bus Mode”).
When “CDTO” (“4-wire Serial Mode”) is selected, “4-wire Serial Mode” should be
selected at JP92 at same time. And Set No.3 pin (“I2C”) of DIP switch SW2 to “L”
(“4-wire Serial Mode”).
When “SDA (ACK) ” (“I2C Bus Mode”) is selected, “I2C Bus Mode” should be
selected at JP92 at same time. And Set No.3 pin (“I2C”) of DIP switch SW2 to “H”
(“I2C Bus Mode”).
The selection of the direction of signal flow adapted to “Master Mode” / “Slave
Mode” of AK4614 (U1) at level shifter (U16).
Master: Direction of the signal flow adapted to “Master Mode” of AK4614 (U1).
Slave: Direction of the signal flow adapted to “Slave Mode” of AK4614 (U1).
<KM090302>
2008/10
-4-
[AKD4614-A]
94
RX
95
TX
1
XTI / MCKI
63
AK4614-XTI / MCKI
64
AK4614-BICK
66
AK4614-LRCK
67
DIR-AK4114-XTI
70
DIR-AK4114-BICK
71
DIR-AK4114-LRCK
(Default)
When “Master Mode” is selected, Set No.4 pin (“M/S”) of DIP switch SW2 to “H”
(“Master Mode”).
When “Slave Mode” is selected, Set No.4 pin (“M/S”) of DIP switch SW2 to “L”
(“Slave Mode”).
The selection of the input to RX0 of DIR: AK4114 (U23).
OPT: Optical connector. (Default).
COAX: RCA connector (COAX).
The selection of the output to TX1of DIT: AK4114 (U26).
OPT: Optical connector. (Default).
COAX: RCA connector (COAX).
The selection of the input to XTI / MCKI of AK4614 (U1).
Open: No input.
Short: MCLK-Buffer. (Default)
When the setting of JP63 is except “open”, and setting of JP1 is “short”, remove X’tal:
X1.
The selection of the input to buffer which outputs to XTI / MCKI of AK4614 (U1).
BNC: EXT-MCLK.
10-pin: 10pin-MCLK.
DIR: DIR-AK4114-MCKO1.
DIT: DIT-AK4114-MCKO1. (Default)
Open: No input.
When the setting of JP63 is except “open”, and setting of JP1 is “short”, remove X’tal:
X1.
The selection of the input to buffer which outputs to BICK of AK4614 (U1).
BNC: EXT-BICK.
10-pin: 10pin-BICK.
DIR: DIR-AK4114-BICK.
DIT: DIT-AK4114-BICK. (Default)
Open: No input.
The selection of the input to buffer which outputs to LRCK of AK4614 (U1).
BNC: EXT-LRCK.
10-pin: 10pin-LRCK.
DIR: DIR-AK4114-LRCK.
DIT: DIT-AK4114-LRCK. (Default)
Open: No input.
The selection of the input to buffer which outputs to XTI of DIR: AK4114 (U23).
BNC: EXT-MCLK.
10-pin: 10pin-MCLK.
CODEC: AK4614-MCKO-Buffer.
DIT: DIT-AK4114-MCKO1.
Open: No input. (Default)
When the setting of JP67 is except “open”, remove X’tal: X2.
The selection of the input to buffer which outputs to BICK of DIR: AK4114 (U23).
BNC: EXT-BICK.
10-pin: 10pin-BICK.
CODEC: AK4614-BICK-Buffer.
DIT: DIT-AK4114-BICK. (Default)
Open: No input.
The selection of the input to buffer which outputs to LRCK of DIR: AK4114 (U23).
BNC: EXT-LRCK.
10-pin: 10pin-LRCK.
CODEC: AK4614-LRCK-Buffer.
<KM090302>
2008/10
-5-
[AKD4614-A]
73
DIT-AK4114-XTI
75
DIT-AK4114-BICK
76
DIT-AK4114-LRCK
68
GND
72
GND
74
GND
69
BICK-THR / INV
201
SDTI1
202
SDTI2
203
SDTI3
204
SDTI4
205
SDTI5
DIT: DIT-AK4114-LRCK. (Default)
Open: No input.
The selection of the input to buffer which outputs to XTI of DIT: AK4114 (U26).
BNC: EXT-MCLK.
10-pin: 10pin-MCLK.
CODEC: AK4614-MCKO-Buffer.
DIR: DIR-AK4114-MCKO1.
Open: No input. (Default)
When the setting of JP73 is except “open”, remove X’tal: X3.
The selection of the input to buffer which outputs to BICK of DIT: AK4114 (U26).
BNC: EXT-BICK.
10-pin: 10pin-BICK.
CODEC: AK4614-BICK-Buffer.
DIR: DIR-AK4114-BICK.
Open: No input. (Default)
The selection of the input to buffer which outputs to LRCK of DIT: AK4114 (U26).
BNC: EXT-LRCK.
10-pin: 10pin-LRCK.
CODEC: AK4614-LRCK-Buffer.
DIR: DIR-AK4114-LRCK.
Open: No input. (Default)
The selection of the termination of the input to EXT-MCLK.
Open: No termination.
Short: 51Ω to GND. (Default)
The selection of the termination of the input to EXT-BICK.
Open: No termination.
Short: 51Ω to GND. (Default)
The selection of the termination of the input to EXT-LRCK.
Open: No termination.
Short: 51Ω to GND. (Default)
The selection of the polarity (non-inverted output / inverted output) of 10pin-BICK
outputs.
THR: Non-inverted output. (Default)
INV: Inverted output.
The selection of the input to SDTI1 of AK4614 (U1).
DIR: DIR-AK4114-SDTO. (Default)
10pin: 10pin-SDTI1.
GND: Digital ground.
The selection of the input to SDTI2 of AK4614 (U1).
DIR: DIR-AK4114-SDTO. (Default)
10pin: 10pin-SDTI2.
GND: Digital ground.
The selection of the input to SDTI3 of AK4614 (U1).
DIR: DIR-AK4114-SDTO. (Default)
10pin: 10pin-SDTI3.
GND: Digital ground.
The selection of the input to SDTI4 of AK4614 (U1).
DIR: DIR-AK4114-SDTO. (Default)
10pin: 10pin-SDTI4.
GND: Digital ground.
The selection of the input to SDTI5 of AK4614 (U1).
DIR: DIR-AK4114-SDTO. (Default)
10pin: 10pin-SDTI5.
<KM090302>
2008/10
-6-
[AKD4614-A]
206
SDTI6
207
SDTO
2
LIN1 (LIN1+ / LIN1-)
3
LIN1+ / LIN1
4
LIN1-
5
GND
6
RIN1 (RIN1+ / RIN1-)
7
RIN1+ / RIN1
8
RIN1-
9
GND
10
LIN2 (LIN2+ / LIN2-)
11
LIN2+ / LIN2
12
LIN2-
13
GND
14
RIN2 (RIN2+ / RIN2-)
15
RIN2+ / RIN2
GND: Digital ground.
The selection of the input to SDTI6 of AK4614 (U1).
DIR: DIR-AK4114-SDTO. (Default)
10pin: 10pin-SDTI6.
GND: Digital ground.
The selection of the input to DAUX of DIT: AK4114 (U26).
SDTO1: AK4614-SDTO1 / 10pin-SDTO1. (Default)
SDTO2: AK4614-SDTO2 / 10pin-SDTO2.
SDTO3: AK4614-SDTO3 / 10pin-SDTO3.
Open: Connect a pin of DIT-AK4114-DAUX input side of JP207 to digital ground
with the clip. Connect no signal.
The selection of the input to LIN1 (LIN1+ / LIN1-).
SINGLE: LIN1 (Single-End).
DIFF: LIN1 (Differential). (Default)
The selection of the input to LIN1+ / LIN1.
SINGLE: LIN1 (Single-End).
DIFF: LIN1+ (Differential). (Default)
The selection of the input to LIN1-.
Open: None (Single-End).
Short: LIN1- (Differential). (Default)
The selection of the termination of the input to LIN1-.
Short: GND (Single-End).
Open: None (Differential). (Default)
The selection of the input to RIN1 (RIN1+ / RIN1-).
SINGLE: RIN1 (Single-End).
DIFF: RIN1 (Differential). (Default)
The selection of the input to RIN1+ / RIN1.
SINGLE: RIN1 (Single-End).
DIFF: RIN1+ (Differential). (Default)
The selection of the input to RIN1-.
Open: None (Single-End).
Short: RIN1- (Differential). (Default)
The selection of the termination of the input to RIN1-.
Short: GND (Single-End).
Open: None (Differential). (Default)
The selection of the input to LIN2 (LIN2+ / LIN2-).
SINGLE: LIN2 (Single-End).
DIFF: LIN2 (Differential). (Default)
The selection of the input to LIN2+ / LIN2.
SINGLE: LIN2 (Single-End).
DIFF: LIN2+ (Differential). (Default)
The selection of the input to LIN2-.
Open: None (Single-End).
Short: LIN2- (Differential). (Default)
The selection of the termination of the input to LIN2-.
Short: GND (Single-End).
Open: None (Differential). (Default)
The selection of the input to RIN2 (RIN2+ / RIN2-).
SINGLE: RIN2 (Single-End).
DIFF: RIN2 (Differential). (Default)
The selection of the input to RIN2+ / RIN2.
SINGLE: RIN2 (Single-End).
DIFF: RIN2+ (Differential). (Default)
<KM090302>
2008/10
-7-
[AKD4614-A]
16
RIN2-
17
GND
18
LIN3 (LIN3+ / LIN3-)
19
LIN3+ / LIN3
20
LIN3-
21
GND
22
RIN3 (RIN3+ / RIN3-)
23
RIN3+ / RIN3
24
RIN3-
25
GND
26
VA
27
LOUT1+ / LOUT1
28
LOUT1-
29
LOUT1
30
ROUT1+ / ROUT1
31
ROUT1-
32
ROUT1
33
LOUT2+ / LOUT2
The selection of the input to RIN2-.
Open: None (Single-End).
Short: RIN2- (Differential). (Default)
The selection of the termination of the input to RIN2-.
Short: GND (Single-End).
Open: None (Differential). (Default)
The selection of the input to LIN3 (LIN3+ / LIN3-).
SINGLE: LIN3 (Single-End).
DIFF: LIN3 (Differential). (Default)
The selection of the input to LIN3+ / LIN3.
SINGLE: LIN3 (Single-End).
DIFF: LIN3+ (Differential). (Default)
The selection of the input to LIN3-.
Open: None (Single-End).
Short: LIN3- (Differential). (Default)
The selection of the termination of the input to LIN3-.
Short: GND (Single-End).
Open: None (Differential). (Default)
The selection of the input to RIN3 (RIN3+ / RIN3-).
SINGLE: RIN3 (Single-End).
DIFF: RIN3 (Differential). (Default)
The selection of the input to RIN3+ / RIN3.
SINGLE: RIN3 (Single-End).
DIFF: RIN3+ (Differential). (Default)
The selection of the input to RIN3-.
Open: None (Single-End).
Short: RIN3- (Differential). (Default)
The selection of the termination of the input to RIN3-.
Short: GND (Single-End).
Open: None (Differential). (Default)
The selection of AIN-bias.
Open: AIN-bias = 0V.
Short: AIN-bias = 1/2 x AVDD1 = 1/2 x AVDD2. (Default)
The selection of the output from LOUT1+ / LOUT1.
SINGLE: LOUT1 (Single-End).
DIFF: LOUT1+ (Differential). (Default)
The selection of the output from LOUT1-.
Open: None (Single-End).
Short: LOUT1- (Differential). (Default)
The selection of the output from LOUT1.
SINGLE: LOUT1 (Single-End).
DIFF: LOUT1 (Differential). (Default)
The selection of the output from ROUT1+ / ROUT1.
SINGLE: ROUT1 (Single-End).
DIFF: ROUT1+ (Differential). (Default)
The selection of the output from ROUT1-.
Open: None (Single-End).
Short: ROUT1- (Differential). (Default)
The selection of the output from ROUT1.
SINGLE: ROUT1 (Single-End).
DIFF: ROUT1 (Differential). (Default)
The selection of the output from LOUT2+ / LOUT2.
SINGLE: LOUT2 (Single-End).
<KM090302>
2008/10
-8-
[AKD4614-A]
34
LOUT2-
35
LOUT2
36
ROUT2+ / ROUT2
37
ROUT2-
38
ROUT2
39
LOUT3+ / LOUT3
40
LOUT3-
41
LOUT3
42
ROUT3+ / ROUT3
43
ROUT3-
44
ROUT3
45
LOUT4+ / LOUT4
46
LOUT4-
47
LOUT4
48
ROUT4+ / ROUT4
49
ROUT4-
50
ROUT4
51
LOUT5+ / LOUT5
DIFF: LOUT2+ (Differential). (Default)
The selection of the output from LOUT2-.
Open: None (Single-End).
Short: LOUT2- (Differential). (Default)
The selection of the output from LOUT2.
SINGLE: LOUT2 (Single-End).
DIFF: LOUT2 (Differential). (Default)
The selection of the output from ROUT2+ / ROUT2.
SINGLE: ROUT2 (Single-End).
DIFF: ROUT2+ (Differential). (Default)
The selection of the output from ROUT2-.
Open: None (Single-End).
Short: ROUT2- (Differential). (Default)
The selection of the output from ROUT2.
SINGLE: ROUT2 (Single-End).
DIFF: ROUT2 (Differential). (Default)
The selection of the output from LOUT3+ / LOUT3.
SINGLE: LOUT3 (Single-End).
DIFF: LOUT3+ (Differential). (Default)
The selection of the output from LOUT3-.
Open: None (Single-End).
Short: LOUT3- (Differential). (Default)
The selection of the output from LOUT3.
SINGLE: LOUT3 (Single-End).
DIFF: LOUT3 (Differential). (Default)
The selection of the output from ROUT3+ / ROUT3.
SINGLE: ROUT3 (Single-End).
DIFF: ROUT3+ (Differential). (Default)
The selection of the output from ROUT3-.
Open: None (Single-End).
Short: ROUT3- (Differential). (Default)
The selection of the output from ROUT3.
SINGLE: ROUT3 (Single-End).
DIFF: ROUT3 (Differential). (Default)
The selection of the output from LOUT4+ / LOUT4.
SINGLE: LOUT4 (Single-End).
DIFF: LOUT4+ (Differential). (Default)
The selection of the output from LOUT4-.
Open: None (Single-End).
Short: LOUT4- (Differential). (Default)
The selection of the output from LOUT4.
SINGLE: LOUT4 (Single-End).
DIFF: LOUT4 (Differential). (Default)
The selection of the output from ROUT4+ / ROUT4.
SINGLE: ROUT4 (Single-End).
DIFF: ROUT4+ (Differential). (Default)
The selection of the output from ROUT4-.
Open: None (Single-End).
Short: ROUT4- (Differential). (Default)
The selection of the output from ROUT4.
SINGLE: ROUT4 (Single-End).
DIFF: ROUT4 (Differential). (Default)
The selection of the output from LOUT5+ / LOUT5.
<KM090302>
2008/10
-9-
[AKD4614-A]
52
LOUT5-
53
LOUT5
54
ROUT5+ / ROUT5
55
ROUT5-
56
ROUT5
57
LOUT6+ / LOUT6
58
LOUT6-
59
LOUT6
60
ROUT6+ / ROUT6
61
ROUT6-
62
ROUT6
SINGLE: LOUT5 (Single-End).
DIFF: LOUT5+ (Differential). (Default)
The selection of the output from LOUT5-.
Open: None (Single-End).
Short: LOUT5- (Differential). (Default)
The selection of the output from LOUT5.
SINGLE: LOUT5 (Single-End).
DIFF: LOUT5 (Differential). (Default)
The selection of the output from ROUT5+ / ROUT5.
SINGLE: ROUT5 (Single-End).
DIFF: ROUT5+ (Differential). (Default)
The selection of the output from ROUT5-.
Open: None (Single-End).
Short: ROUT5- (Differential). (Default)
The selection of the output from ROUT5.
SINGLE: ROUT5 (Single-End).
DIFF: ROUT5 (Differential). (Default)
The selection of the output from LOUT6+ / LOUT6.
SINGLE: LOUT6 (Single-End).
DIFF: LOUT6+ (Differential). (Default)
The selection of the output from LOUT6-.
Open: None (Single-End).
Short: LOUT6- (Differential). (Default)
The selection of the output from LOUT6.
SINGLE: LOUT6 (Single-End).
DIFF: LOUT6 (Differential). (Default)
The selection of the output from ROUT6+ / ROUT6.
SINGLE: ROUT6 (Single-End).
DIFF: ROUT6+ (Differential). (Default)
The selection of the output from ROUT6-.
Open: None (Single-End).
Short: ROUT6- (Differential). (Default)
The selection of the output from ROUT6.
SINGLE: ROUT6 (Single-End).
DIFF: ROUT6 (Differential). (Default)
Table 2. The settings of the jumper pins
<KM090302>
2008/10
-10-
[AKD4614-A]
[3] The settings of the DIP switches
(1). The settings of SW1 (Settings of AK4614 (U1))
Set up the TEST pin (TEST1, TEST3, TEST4, TEST5 and TEST2) of AK4614 (U1) by SW1. About the setting
of default, please refer to Table 3.
SW1
No.
1
2
3
4
5
6
7
8
Names
ON (“H”)
AK4614-TEST1
AK4614-TEST3
AK4614-TEST4
AK4614-TEST5
AK4614-TEST2
NC
NC
NC
OFF (“L”)
Default
L
L
L
L
L
L
L
L
TEST pin
Fixed to “L”.
N/A
Table 3. The settings of SW1
(2). The settings of SW2 (Settings of AK4614 (U1))
Set up the Chip Address Select (CAD1, CAD0), Serial Control Mode Select (4-wire Serial / I2C Bus), Master
/Slave Mode Select and DAC output control (VCOM / Hi-z) of AK4614 (U1) by SW2. About the setting of
default, please refer to Table 4.
SW2
No.
1
2
Names
CAD0
CAD1
3
I2C
4
M/S
5
DVMPD
6
7
8
NC
NC
NC
ON (“H”)
OFF (“L”)
Chip Address Select
Serial Control Mode Select
L: 4-wire Serial (Default)
H: I2C Bus
Master /Slave Mode Select
L: Slave Mode (Default)
H: Master Mode
DAC output control
L: VCOM voltage (Default)
H: Hi-z
Default
L
L
L
L
L
L
L
L
N/A
Table 4. The settings of SW2
<KM090302>
2008/10
-11-
[AKD4614-A]
(3). The settings of SW4 (Settings of DIR: AK4114 (U23))
ON is “H”, OFF is “L”.
The setting of default (Slave mode, 24bit I2S Compatible) is as follows. (Please refer to Table 5.)
SW4
No.
1
2
3
4
Mode
0
1
2
3
4
5
6
7
Names
DIF2
DIF1
DIF0
CM1
5
CM0
6
7
8
OCKS1
OCKS0
NC
DIF2
pin
L
L
L
L
H
H
H
H
ON (“H”)
OFF (“L”)
Default
H
H
H
L
AK4114 Output Audio Interface Format Setting
Please refer to Table 6.
AK4114 Clock Mode Setting
CM1=L, CM0=H: X’tal Mode
CM1=L, CM0=L: PLL Mode (Default)
AK4114 Master Clock Frequency Setting
Please refer to Table 7.
N/A
Table 5. The settings of SW4
LRCK
BICK
DIF1 DIF0
SDTO Formats
pin
pin
I/O
L
L
16bit, Right justified
H/L
O
64fs
L
H
18bit, Right justified
H/L
O
64fs
H
L
20bit, Right justified
H/L
O
64fs
H
H
24bit, Right justified
H/L
O
64fs
L
L
24bit, Left justified
H/L
O
64fs
L
H
24bit, I2S Compatible L/H
O
64fs
H
L
24bit, Left justified
H/L
I
64-128fs
H
H
24bit, I2S Compatible L/H
I
64-128fs
Table 6. The settings of AK4114 Output Audio Interface Formats
L
H
L
L
I/O
O
O
O
O
O
O
I
I
(Default)
OCKS1 OCKS0 MCKO1
fs (max)
pin
pin
0
L
L
256fs
96 kHz
1
L
H
256fs
96 kHz
2
H
L
512fs
48 kHz
(Default)
3
H
H
128fs
192 kHz
Table 7. The settings of AK4114 Master Clock Frequencies
Mode
<KM090302>
2008/10
-12-
[AKD4614-A]
(4). The settings of SW6 (Settings of DIT: AK4114 (U26))
ON is “H”, OFF is “L”.
The setting of default (Master mode, 24bit I2S Compatible) is as follows. (Please refer to Table 8.)
SW5
No.
1
2
3
4
DIF2
DIF1
DIF0
CM1
5
CM0
6
7
8
OCKS1
OCKS0
NC
Mode
0
1
2
3
4
5
6
7
Names
ON (“H”)
OFF (“L”)
Default
H
L
H
L
AK4114 Input Audio Interface Format Setting
Please refer to Table 9.
AK4114 Clock Mode Setting
CM1=L, CM0=H: X’tal Mode (Default)
CM1=L, CM0=L: PLL Mode
AK4114 Master Clock Frequency Setting
Please refer to Table 10.
N/A
Table 8. The settings of SW6
LRCK
BICK
DIF2 DIF1 DIF0
DAUX Formats
pin
pin
pin
I/O
L
L
L
24bit, Left justified
H/L
O
64fs
L
L
H
24bit, Left justified
H/L
O
64fs
L
H
L
24bit, Left justified
H/L
O
64fs
L
H
H
24bit, Left justified
H/L
O
64fs
H
L
L
24bit, Left justified
H/L
O
64fs
H
L
H
24bit, I2S Compatible L/H
O
64fs
H
H
L
24bit, Left justified
H/L
I
64-128fs
H
H
H
24bit, I2S Compatible L/H
I
64-128fs
Table 9. The settings of AK4114 Input Audio Interface Formats
H
H
L
L
I/O
O
O
O
O
O
O
I
I
(Default)
OCKS1 OCKS0 MCKO1 fs (max)
pin
pin
0
L
L
256fs
96 kHz
1
L
H
256fs
96 kHz
2
H
L
512fs
48 kHz
(Default)
3
H
H
128fs
192 kHz
Table 10. The settings of AK4114 Master Clock Frequencies
Mode
<KM090302>
2008/10
-13-
[AKD4614-A]
[4] The settings of the toggle switches
The settings of SW3, SW5, SW7
The power down switch of AK4614 (U1).
AK4614 (U1) should be reset once bringing this “L” upon power-up.
SW3 PDN-AK4614
Keep “H” during normal operation.
The power down switch of DIR: AK4114 (U23).
SW5 PDN-DIR-AK4114 DIR: AK4114 (U23) should be reset once bringing this “L” upon power-up.
Keep “H” during normal operation. Keep “L” when DIR: AK4114 (U23) is not used.
The power down switch of DIT: AK4114 (U26).
SW7 PDN-DIT-AK4114 DIT: AK4114 (U26) should be reset once bringing this “L” upon power-up.
Keep “H” during normal operation. Keep “L” when DIT: AK4114 (U26) is not used.
Table 11. The settings of SW3, SW5, SW7
[5] The indications of the LEDs
The indication of LED1
LED1
INT0
The output of INT0 pin of the DIR: AK4114 (U23). Turns on when DIR: AK4114 (U23) is
unlocked.
Table 12. The indication of LED1
[6] The register control (The serial control)
NC
CDTO / SDA (ACK)
CDTI / SDA
CCLK / SCL
9
CSN
AKD4614-A can be controlled via the printer port (parallel port) of IBM-AT compatible PC. Connect PORT5
(uP-I/F) with PC by 10-wire flat cable packed with the AKD4614-A. Take care of the direction of the 10-pin
connector and the 10-pin header. There is a mark on the no.1-pin of the 10-pin connector. Pin assignments of PORT5
are shown in Figure 2.
1
Red
GND
GND
GND
GND
10
GND
PORT5
uP I/F
2
Figure 2. The pin assignments of PORT5
The control software is packed with the evaluation board. The software operation sequence is included in the
evaluation board manual.
<KM090302>
2008/10
-14-
[AKD4614-A]
[7] The evaluation modes
(1) The evaluation mode of ADCÆDAC (Analog Æ Analog) by the internal loop back
(1)-1. Master mode
(2) The evaluation mode of ADCÆDAC (Analog Æ Analog) by the external loop back
with the jumper pins or 10 pin header (10 pin port, 10 pin connector) and the clips
(2)-1. Master mode
(3) The evaluation mode of ADCÆDAC (Analog Æ Analog) by the external loop back
with the external DIT: AK4114 (U26) and the external DIR: AK4114 (U23)
(3)-1. Master mode
(3)-2. Slave mode (Default)
(4) The evaluation mode of ADC (Analog Æ Digital) with the external DIT: AK4114 (U26)
(4)-1. Master mode
(4)-2. Slave mode
(5) The evaluation mode of DAC (Digital Æ Analog) with the external DIR: AK4114 (U23)
(5)-1. Master mode
(5)-2. Slave mode
(6) The evaluation mode of ADC (Analog Æ Digital) with the external clocks
(6)-1. Slave mode
(7) The evaluation mode of DAC (Digital Æ Analog) with the external clocks
(7)-1. Slave mode
<KM090302>
2008/10
-15-
[AKD4614-A]
(1) The evaluation mode of ADCÆDAC (Analog Æ Analog) by the internal loop back
(1)-1. Master mode
Devices (Parts)
AK4614 (U1)
DIR: AK4114 (U23)
DIT: AK4114 (U26)
X’tal: X1
X’tal: X2
X’tal: X3
Use
Not use
Removed
○
○
-
○
○
-
-
○
○
○
○
Clock sources
External clock
-
X’tal
○
-
PLL
-
Modes
Master
○
-
Slave
-
Table 13. Use / Not use of the devices (parts) and the modes of using
Jumper pins
Cables
Connectors
JP94 (RX)
JP95 (TX)
Optical cable
BNC cable
BNC-RCA
conversion
connector
PORT6
(RX: OPT)
PORT7
(TX: OPT)
J22
(RX: COAX)
J23
(TX: COAX)
OPT
COAX
-
-
Destinations of the connections
External
J23
J22
PORT7
optical
(TX:
(RX:
(TX:
COAX) COAX) connector
OPT)
PORT6
(RX:
OPT)
External
BNC
connector
Use
Not
use
-
○
○
○
-
○
-
-
-
-
-
-
-
○
-
-
-
-
-
-
-
○
-
-
-
-
-
-
-
○
-
-
-
-
-
-
Table 14. Use / Not use of the jumper pins, cables, connectors and the destinations of the connections
Jumper pins
JP65 (AK4614-Master/Slave)
JP1 (XTI/MCKI)
JP63 (AK4614-XTI/MCKI)
JP64 (AK4614-BICK)
JP66 (AK4614-LRCK)
JP67 (DIR-AK4114-XTI)
JP70 (DIR-AK4114-BICK)
JP71 (DIR-AK4114-LRCK)
JP73 (DIT-AK4114-XTI)
JP75 (DIT-AK4114-BICK)
JP76 (DIT-AK4114-LRCK)
Master
○
Slave
-
Short
Open
-
○
CODEC
DIR
DIT
BNC
10-pin
Open
-
-
-
-
-
○
○
○
○
○
○
○
○
○
Table 15. The settings of the jumper pins (modes and clocks)
<KM090302>
2008/10
-16-
[AKD4614-A]
JP207 (SDTO) should be open.
Jumper pins
JP207 (SDTO)
Always
JP201 (SDTI1)
JP202 (SDTI2)
JP203 (SDTI3)
JP204 (SDTI4)
JP205 (SDTI5)
JP206 (SDTI6)
Always
Always
Always
Always
Always
Always
SDTO1
-
SDTO2
-
SDTO3
Open
○
(Note1)
DIR
10-pin
GND
Open
-
-
○
○
○
○
○
○
-
Table 16. The settings of the jumper pins (digital inputs / digital outputs)
(Note1) Connect DAUX side of DIT: AK4114 (U26) to GND by the clips.
Switch names
SW2 (MODE-AK4614)
SW4 (DIR-AK4114-MODE)
SW6 (DIT-AK4114-MODE)
Pin
No.
4
1
2
3
4
5
1
2
3
4
5
Signal
names
M/S
DIF2
DIF1
DIF0
CM1
CM0
DIF2
DIF1
DIF0
CM1
CM0
Values
H
H
H
H
L
H
H
H
H
L
H
Functions
Master Mode
Slave Mode,
24bit I2S Compatible
X’tal Mode
Slave Mode,
24bit I2S Compatible
X’tal Mode
Table 17. The settings of the DIP switches
Switch on the power supply units, and do the settings of the toggle switches as follws.
Switch names
SW3 (PDN-AK4614)
SW5 (PDN-DIR-AK4114)
SW7 (PDN-DIT-AK4114)
Values
LÆH
L
L
Functions
Power downÆPower up
Power down
Power down
Table 18. The settings of the toggle switches
<KM090302>
2008/10
-17-
[AKD4614-A]
Start up the control software, click “Write default” button, write the default value, and write the settings as follows.
(The values except the settings as follows are default.)
Register
addresses
08H
08H
Bits
D7
D6
Signal
name
LOOP1
LOOP0
Values
0
0Æ1
Functions
Normal OperationÆLoop Back Mode
Table 19. The settings of the registers
The combinations of the settings of the registers and analog inputs / analog outputs paths are as follows.
Combinations
1
Settings of the registers
LOOP1, LOOP0=0,1
Analog inputs /
analog outputs
paths
LIN1ÆLOUT1,
LOUT2
RIN1ÆROUT1,
ROUT2
LIN2ÆLOUT3,
LOUT4
RIN2ÆROUT3,
ROUT4
LIN3ÆLOUT5,
LOUT6
RIN3ÆROUT5,
ROUT6
Table 20. The combinations of the settings of the registers and analog inputs / analog outputs paths
<KM090302>
2008/10
-18-
[AKD4614-A]
(2) The evaluation mode of ADCÆDAC (Analog Æ Analog) by the external loop back
with the jumper pins or 10 pin header (10 pin port, 10 pin connector) and the clips
(2)-1. Master mode
Devices (Parts)
Use
Not use
○
○
-
AK4614 (U1)
DIR: AK4114 (U23)
DIT: AK4114 (U26)
X’tal: X1
X’tal: X2
X’tal: X3
Clock sources
External clock
-
Removed
○
○
-
-
○
○
○
○
X’tal
○
-
Modes
Master
○
-
PLL
-
Slave
-
Table 21. Use / Not use of the devices (parts) and the modes of using
Jumper pins
Cables
Connectors
JP94 (RX)
JP95 (TX)
Optical cable
BNC cable
BNC-RCA
conversion
connrctor
PORT6
(RX: OPT)
PORT7
(TX: OPT)
J22
(RX: COAX)
J23
(TX: COAX)
OPT
COAX
-
-
Destinations of the connections
External
J23
J22
PORT7
optical
(TX:
(RX:
(TX:
COAX) COAX) connector
OPT)
PORT6
(RX:
OPT)
External
BNC
connector
Use
Not
use
-
○
○
○
-
○
-
-
-
-
-
-
-
○
-
-
-
-
-
-
-
○
-
-
-
-
-
-
-
○
-
-
-
-
-
-
Table 22. Use / Not use of the jumper pins, cables, connectors and the destinations of the connections
Jumper pins
JP65 (AK4614-Master/Slave)
JP1 (XTI/MCKI)
JP63 (AK4614-XTI/MCKI)
JP64 (AK4614-BICK)
JP66 (AK4614-LRCK)
JP67 (DIR-AK4114-XTI)
JP70 (DIR-AK4114-BICK)
JP71 (DIR-AK4114-LRCK)
JP73 (DIT-AK4114-XTI)
JP75 (DIT-AK4114-BICK)
JP76 (DIT-AK4114-LRCK)
Master
○
Slave
-
Short
Open
-
○
CODEC
DIR
DIT
BNC
10-pin
Open
-
-
-
-
-
○
○
○
○
○
○
○
○
○
Table 23. The settings of the jumper pins (modes and clocks)
<KM090302>
2008/10
-19-
[AKD4614-A]
Connect the jumper pins of digital outputs (3pins) and the jumper pins of digital inputs (6pins) by the clips.
Jumper pins of digital outputs (3pins)
(1) SDTO1 pin (U20 side pin of JP207 (SDTO))
(2) SDTO2 pin (U20 side pin of JP207 (SDTO))
(3) SDTO3 pin (U20 side pin of JP207 (SDTO))
Jumper pins of digital inputs (6pins)
(1) SDTI1 pin (U19 side pin of JP201 (SDTI1))
(2) SDTI2 pin (U19 side pin of JP202 (SDTI2))
(3) SDTI3 pin (U19 side pin of JP203 (SDTI3))
(4) SDTI4 pin (U19 side pin of JP204 (SDTI4))
(5) SDTI5 pin (U19 side pin of JP205 (SDTI5))
(6) SDTI6 pin (U19 side pin of JP206 (SDTI6))
Table 24. The connections of the jumper pins by the clips (digital inputs / digital outputs)
JP207 (SDTO) should be open. JP201 (SDTI1), JP202 (SDTI2), JP203 (SDTI3), JP204 (SDTI4), JP205 (SDTI5),
JP206 (SDTI6) should be open on signal input.
Jumper pins
JP207 (SDTO)
Always
JP201 (SDTI1)
SDTO1
-
SDTO2
-
SDTO3
-
Open
○
(Note1)
DIR
10-pin
GND
SDTI1 input
-
-
-
JP202 (SDTI2)
No input
SDTI2 input
-
-
○
-
JP203 (SDTI3)
No input
SDTI3 input
-
-
○
-
JP204 (SDTI4)
No input
SDTI4 input
-
-
○
-
JP205 (SDTI5)
No input
SDTI5 input
-
-
○
-
JP206 (SDTI6)
No input
SDTI6 input
-
-
○
-
No input
-
-
○
Open
○
(Note2)
○
(Note2)
○
(Note2)
○
(Note2)
○
(Note2)
○
(Note2)
-
Table 25. The settings of the jumper pins (digital inputs / digital outputs)
(Note1) Connect DAUX side of DIT: AK4114 (U26) to GND by the clips.
(Note2) Connect the jumper pins of digital outputs (3pins) and the jumper pins of digital inputs (6pins) by the clips.
(Please refer to Table 24. The connections of the jumper pins by the clips (digital inputs / digital outputs))
<KM090302>
2008/10
-20-
[AKD4614-A]
Switch names
SW2 (MODE-AK4614)
SW4 (DIR-AK4114-MODE)
SW6 (DIT-AK4114-MODE)
Pin
No.
4
1
2
3
4
5
1
2
3
4
5
Signal
names
M/S
DIF2
DIF1
DIF0
CM1
CM0
DIF2
DIF1
DIF0
CM1
CM0
Values
H
H
H
H
L
H
H
H
H
L
H
Functions
Master Mode
Slave Mode,
24bit I2S Compatible
X’tal Mode
Slave Mode,
24bit I2S Compatible
X’tal Mode
Table 26. The settings of the DIP switches
Switch on the power supply units, and do the settings of the toggle switches as follws.
Switch names
SW3 (PDN-AK4614)
SW5 (PDN-DIR-AK4114)
SW7 (PDN-DIT-AK4114)
Values
LÆH
L
L
Functions
Power downÆPower up
Power down
Power down
Table 27. The settings of the toggle switches
<KM090302>
2008/10
-21-
[AKD4614-A]
Starts up the control software, click “Write default” button, write the default value.
The combinations of the connections of the jumper pins by the clips and analog inputs / analog outputs paths are as
follows.
Combinations
1
Connections of the
jumper pins by the
clips
SDTO1ÆSDTI1,
SDTI2
SDTO2ÆSDTI3,
SDTI4
SDTO3ÆSDTI5,
SDTI6
2
SDTO1ÆSDTI1
SDTO2ÆSDTI2
SDTO3ÆSDTI3
3
SDTO1ÆSDTI4
SDTO2ÆSDTI5
SDTO3ÆSDTI6
4
SDTO1ÆSDTI1,
SDTI2,
SDTI3,
SDTI4,
SDTI5,
SDTI6
Analog input /
analog output
paths
LIN1ÆLOUT1,
LOUT2
RIN1ÆROUT1,
ROUT2
LIN2ÆLOUT3,
LOUT4
RIN2ÆROUT3,
ROUT4
LIN3ÆLOUT5,
LOUT6
RIN3ÆROUT5,
ROUT6
LIN1ÆLOUT1
RIN1ÆROUT1
LIN2ÆLOUT2
RIN2ÆROUT2
LIN3ÆLOUT3
RIN3ÆROUT3
LIN1ÆLOUT4
RIN1ÆROUT4
LIN2ÆLOUT5
RIN2ÆROUT5
LIN3ÆLOUT6
RIN3ÆROUT6
LIN1ÆLOUT1,
LOUT2,
LOUT3,
LOUT4,
LOUT5,
LOUT6
RIN1ÆROUT1,
ROUT2,
ROUT3,
ROUT4,
ROUT5,
ROUT6
Table 28. The combinations of the connections of the jumper pins by the clips and analog inputs / analog outputs
paths
<KM090302>
2008/10
-22-
[AKD4614-A]
(3) The evaluation mode of ADCÆDAC (Analog Æ Analog) by the external loop back
with the external DIT: AK4114 (U26) and the external DIR: AK4114 (U23)
(3)-1. Master mode
Devices (Parts)
Use
AK4614 (U1)
DIR: AK4114 (U23)
DIT: AK4114 (U26)
X’tal: X1
X’tal: X2
X’tal: X3
Not use
○
○
○
○
-
Removed
-
-
○
○
○
○
Clock sources
External clock
○
X’tal
○
-
PLL
○
-
Modes
Master
○
-
Slave
○
○
Table 29. Use / Not use of the devices (parts) and the modes of using
(a). In case of using optical cable and optical connector
Jumper pins
Cables
Connectors
JP94 (RX)
JP95 (TX)
Optical cable
BNC cable
BNC-RCA
conversion
connector
PORT6
(RX: OPT)
PORT7
(TX: OPT)
J22
(RX: COAX)
J23
(TX: COAX)
OPT
COAX
○
○
-
Use
Not
use
PORT6
(RX:
OPT)
Destinations of the connections
External
J23
J22
PORT7
optical
(TX:
(RX:
(TX:
COAX) COAX) connector
OPT)
External
BNC
connector
○
-
○
○
○
-
-
○
-
-
-
-
○
-
○
-
-
-
-
-
-
○
-
-
-
-
-
-
-
○
-
-
-
-
-
-
-
Table 30. Use / Not use of the jumper pins, cables, connectors and the destinations of the connections
<KM090302>
2008/10
-23-
[AKD4614-A]
(b). In case of using BNC cable and BNC-RCA conversion connector and RCA connector
Jumper pins
Cables
Connectors
JP94 (RX)
JP95 (TX)
Optical cable
BNC cable
BNC-RCA
conversion
connector
PORT6
(RX: OPT)
PORT7
(TX: OPT)
J22
(RX: COAX)
J23
(TX: COAX)
OPT
COAX
-
○
○
Use
Not
use
Destinations of the connections
External
J23
J22
PORT7
optical
(TX:
(RX:
(TX:
COAX) COAX) connector
OPT)
PORT6
(RX:
OPT)
External
BNC
connector
○
○
○
-
-
○
-
-
-
-
-
-
-
○
-
-
-
-
-
-
○
-
-
-
-
○
-
-
○
-
-
-
○
-
-
-
-
Table 31. Use / Not use of the jumper pins, cables, connectors and the destinations of the connections
(c). Other common setting
Jumper pins
JP65 (AK4614-Master/Slave)
JP1 (XTI/MCKI)
JP63 (AK4614-XTI/MCKI)
JP64 (AK4614-BICK)
JP66 (AK4614-LRCK)
JP67 (DIR-AK4114-XTI)
JP70 (DIR-AK4114-BICK)
JP71 (DIR-AK4114-LRCK)
JP73 (DIT-AK4114-XTI)
JP75 (DIT-AK4114-BICK)
JP76 (DIT-AK4114-LRCK)
Master
○
Slave
-
Short
Open
-
○
CODEC
DIR
DIT
BNC
10-pin
Open
-
-
-
-
-
○
○
○
○
-
○
○
○
○
○
Table 32. The settings of the jumper pins (modes and clocks)
<KM090302>
2008/10
-24-
[AKD4614-A]
Jumper pins
JP207 (SDTO)
JP201 (SDTI1)
JP202 (SDTI2)
JP203 (SDTI3)
JP204 (SDTI4)
JP205 (SDTI5)
JP206 (SDTI6)
SDTO1 output
SDTO2 output
SDTO3 output
SDTI1 input
No input
SDTI2 input
No input
SDTI3 input
No input
SDTI4 input
No input
SDTI5 input
No input
SDTI6 input
No input
SDTO1
○
-
SDTO2
○
-
SDTO3
○
Open
-
DIR
10-pin
○
-
-
○
○
○
○
○
-
GND
Open
-
-
○
○
○
○
○
○
Table 33. The settings of the jumper pins (digital inputs / digital outputs)
Switch names
SW2 (MODE-AK4614)
SW4 (DIR-AK4114-MODE)
SW6 (DIT-AK4114-MODE)
Pin
No.
4
1
2
3
4
5
1
2
3
4
5
Signal
names
M/S
DIF2
DIF1
DIF0
CM1
CM0
DIF2
DIF1
DIF0
CM1
CM0
Values
H
H
H
H
L
L
H
H
H
L
H
Functions
Master Mode
Slave Mode,
24bit I2S Compatible
PLL Mode
Slave Mode,
24bit I2S Compatible
X’tal Mode
Table 34. The settings of the DIP switches
Switch on the power supply units, and do the settings of the toggle switches as follws.
Switch names
SW3 (PDN-AK4614)
SW5 (PDN-DIR-AK4114)
SW7 (PDN-DIT-AK4114)
Values
LÆH
LÆH
LÆH
Functions
Power downÆPower up
Power downÆPower up
Power downÆPower up
Table 35. The settings of the toggle switches
<KM090302>
2008/10
-25-
[AKD4614-A]
Start up the control software, click “Write default” button, write the default value, and write the settings as follows.
(The values except the settings as follows are default.)
Register
addresses
04H
Bits
D6
Signal
names
MCKO
Values
0Æ1
Functions
MCKO: no signalÆ MCLK output
Table 36. The settings of the registers
The combinations of the settings of the jumper pins and analog inputs / analog outputs paths are as follows.
Combinations
1
Settings of the jumper
pins
JP207 (SDTO)=SDTO1
JP201 (SDTI1)=DIR
JP202 (SDTI2)=DIR
JP203 (SDTI3)= DIR
JP204 (SDTI4)= DIR
JP205 (SDTI5)= DIR
JP206 (SDTI6)= DIR
Analog inputs /
analog outputs
paths
LIN1ÆLOUT1,
LOUT2,
LOUT3,
LOUT4,
LOUT5,
LOUT6
RIN1ÆROUT1,
ROUT2,
ROUT3,
ROUT4,
ROUT5,
ROUT6
Table 37. The combinations of the settings of the jumper pins and analog inputs / analog outputs paths
<KM090302>
2008/10
-26-
[AKD4614-A]
(3)-2. Slave mode (Default)
Devices (Parts)
Use
Not use
○
○
○
-
AK4614 (U1)
DIR: AK4114 (U23)
DIT: AK4114 (U26)
X’tal: X1
X’tal: X2
X’tal: X3
Removed
○
○
-
○
○
○
-
Clock sources
External clock
○
-
X’tal
○
PLL
○
-
Modes
Master
○
Slave
○
○
-
Table 38. Use / Not use of devices (parts) and the modes of using
(a). In case of using optical cable and optical connector
Jumper pins
Cables
Connectors
JP94 (RX)
JP95 (TX)
Optical cable
BNC cable
BNC-RCA
conversion
connector
PORT6
(RX: OPT)
PORT7
(TX: OPT)
J22
(RX: COAX)
J23
(TX: COAX)
OPT
COAX
○
○
-
Use
Not
use
PORT6
(RX:
OPT)
Destinations of the connections
External
J23
J22
PORT7
optical
(TX:
(RX:
(TX:
COAX) COAX) connector
OPT)
External
BNC
connector
○
-
○
○
○
-
-
○
-
-
-
-
○
-
○
-
-
-
-
-
-
○
-
-
-
-
-
-
-
○
-
-
-
-
-
-
-
Table 39. Use / Not use of the jumper pins, cables, connectors and the destinations of the connections
<KM090302>
2008/10
-27-
[AKD4614-A]
(b). In case of using BNC cable and BNC-RCA conversion connector and RCA connector
Jumper pins
Cables
Connectors
JP94 (RX)
JP95 (TX)
Optical cable
BNC cable
BNC-RCA
conversion
connector
PORT6
(RX: OPT)
PORT7
(TX: OPT)
J22
(RX: COAX)
J23
(TX: COAX)
OPT
COAX
-
○
○
Use
Not
use
Destinations of the connections
External
J23
J22
PORT7
optical
(TX:
(RX:
(TX:
COAX) COAX) connector
OPT)
PORT6
(RX:
OPT)
External
BNC
connector
○
○
○
-
-
○
-
-
-
-
-
-
-
○
-
-
-
-
-
-
○
-
-
-
-
○
-
-
○
-
-
-
○
-
-
-
-
Table 40. Use / Not use of the jumper pins, cables, connectors and the destinations of the connections
(c). Other common setting
Jumper pins
JP65 (AK4614-Master/Slave)
JP1 (XTI/MCKI)
JP63 (AK4614-XTI/MCKI)
JP64 (AK4614-BICK)
JP66 (AK4614-LRCK)
JP67 (DIR-AK4114-XTI)
JP70 (DIR-AK4114-BICK)
JP71 (DIR-AK4114-LRCK)
JP73 (DIT-AK4114-XTI)
JP75 (DIT-AK4114-BICK)
JP76 (DIT-AK4114-LRCK)
Master
-
Slave
○
Short
Open
○
-
CODEC
DIR
DIT
BNC
10-pin
Open
-
-
○
○
○
-
-
-
-
○
○
-
○
○
○
○
Table 41. The settings of the jumper pins (modes and clocks)
<KM090302>
2008/10
-28-
[AKD4614-A]
Jumper pins
JP207 (SDTO)
JP201 (SDTI1)
JP202 (SDTI2)
JP203 (SDTI3)
JP204 (SDTI4)
JP205 (SDTI5)
JP206 (SDTI6)
SDTO1 output
SDTO2 output
SDTO3 output
SDTI1 input
No input
SDTI2 input
No input
SDTI3 input
No input
SDTI4 input
No input
SDTI5 input
No input
SDTI6 input
No input
SDTO1
○
-
SDTO2
○
-
SDTO3
○
Open
-
DIR
10-pin
○
-
-
○
○
○
○
○
-
GND
Open
-
-
○
○
○
○
○
○
Table 42. The settings of the jumper pins (digital inputs / digital outputs)
Switch names
SW2 (MODE-AK4614)
SW4 (DIR-AK4114-MODE)
SW6 (DIT-AK4114-MODE)
Pin
No.
4
1
2
3
4
5
1
2
3
4
5
Signal
names
M/S
DIF2
DIF1
DIF0
CM1
CM0
DIF2
DIF1
DIF0
CM1
CM0
Values
L
H
H
H
L
L
H
L
H
L
H
Functions
Slave Mode
Slave Mode,
24bit I2S Compatible
PLL Mode
Master Mode,
24bit I2S Compatible
X’tal Mode
Table 43. The settings of the DIP switches
Switch on the power supply unit, and do the setting of the toggle switches as follws.
Switch names
SW3 (PDN-AK4614)
SW5 (PDN-DIR-AK4114)
SW7 (PDN-DIT-AK4114)
Values
LÆH
LÆH
LÆH
Functions
Power downÆPower up
Power downÆPower up
Power downÆPower up
Table 44. The settings of the toggle switches
<KM090302>
2008/10
-29-
[AKD4614-A]
Starts up the control software, click “Write default” button, write the default value.
The combinations of the settings of the jumper pins and analog inputs / analog outputs paths are as follows.
Combinations
1
Settings of the jumper pins
JP207 (SDTO)=SDTO1
JP201 (SDTI1)=DIR
JP202 (SDTI2)=DIR
JP203 (SDTI3)= DIR
JP204 (SDTI4)= DIR
JP205 (SDTI5)= DIR
JP206 (SDTI6)= DIR
Analog inputs /
analog outputs
paths
LIN1ÆLOUT1,
LOUT2,
LOUT3,
LOUT4,
LOUT5,
LOUT6
RIN1ÆROUT1,
ROUT2,
ROUT3,
ROUT4,
ROUT5,
ROUT6
Table 45. The combinations of the settings of the jumper pins and analog inputs / analog outputs paths
<KM090302>
2008/10
-30-
[AKD4614-A]
(4) The evaluation mode of ADC (Analog Æ Digital) with the external DIT: AK4114 (U26)
(4)-1. Master mode
Devices (Parts)
Use
AK4614 (U1)
DIR: AK4114 (U23)
DIT: AK4114 (U26)
X’tal: X1
X’tal: X2
X’tal: X3
Not use
○
○
○
-
Removed
○
-
-
○
○
○
○
Clock sources
External clock
○
X’tal
○
-
PLL
-
Modes
Master
○
-
Slave
○
Table 46. Use / Not use of the devices (parts) and the modes of using
(a). In case of using optical cable and optical connector
Jumper pins
Cables
Connectors
JP94 (RX)
JP95 (TX)
Optical cable
BNC cable
BNC-RCA
conversion
connector
PORT6
(RX: OPT)
PORT7
(TX: OPT)
J22
(RX: COAX)
J23
(TX: COAX)
OPT
COAX
○
-
PORT6
(RX:
OPT)
Destinations of the connections
External
J23
J22
PORT7
optical
(TX:
(RX:
(TX:
COAX) COAX) connector
OPT)
External
BNC
connector
Use
Not
use
○
-
○
○
-
○
-
-
-
-
-
-
○
-
-
-
-
-
○
-
-
○
-
-
-
-
-
-
-
○
-
-
-
-
-
-
-
Table 47. Use / Not use of the jumper pins, cables, connectors and the destinations of the connections
<KM090302>
2008/10
-31-
[AKD4614-A]
(b). In case of using BNC cable and BNC-RCA conversion connector and RCA connector
Jumper pins
Cables
Connectors
JP94 (RX)
JP95 (TX)
Optical cable
BNC cable
BNC-RCA
conversion
connector
PORT6
(RX: OPT)
PORT7
(TX: OPT)
J22
(RX: COAX)
J23
(TX: COAX)
OPT
COAX
-
○
Use
Not
use
PORT6
(RX:
OPT)
PORT7
(TX:
OPT)
Destinations of the connections
External
J23
J22
optical
(TX:
(RX:
COAX) COAX) connector
External
BNC
connector
○
○
○
-
-
○
-
-
-
-
-
-
-
○
-
-
-
-
-
-
-
○
-
-
-
-
-
-
○
-
-
-
-
-
-
○
-
Table 48. Use / Not use of the jumper pins, cables, connectors and the destinations of the connections
(c). Other common setting
Jumper pins
JP65 (AK4614-Master/Slave)
JP1 (XTI/MCKI)
JP63 (AK4614-XTI/MCKI)
JP64 (AK4614-BICK)
JP66 (AK4614-LRCK)
JP67 (DIR-AK4114-XTI)
JP70 (DIR-AK4114-BICK)
JP71 (DIR-AK4114-LRCK)
JP73 (DIT-AK4114-XTI)
JP75 (DIT-AK4114-BICK)
JP76 (DIT-AK4114-LRCK)
Master
○
Slave
-
Short
Open
-
○
CODEC
DIR
DIT
BNC
10-pin
Open
-
-
-
-
-
○
○
○
○
○
○
-
○
○
○
Table 49. The settings of the jumper pins (modes and clocks)
<KM090302>
2008/10
-32-
[AKD4614-A]
Jumper pins
JP207 (SDTO)
JP201 (SDTI1)
JP202 (SDTI2)
JP203 (SDTI3)
JP204 (SDTI4)
JP205 (SDTI5)
JP206 (SDTI6)
SDTO1 output
SDTO2 output
SDTO3 output
Always
Always
Always
Always
Always
Always
SDTO1
○
-
SDTO2
○
-
SDTO3
○
Open
-
DIR
10-pin
GND
Open
-
-
○
○
○
○
○
○
-
Table 50. The settings of the jumper pins (digital inputs / digital outputs)
Switch names
SW2 (MODE-AK4614)
SW4 (DIR-AK4114-MODE)
SW6 (DIT-AK4114-MODE)
Pin
No.
4
1
2
3
4
5
1
2
3
4
5
Signal
names
M/S
DIF2
DIF1
DIF0
CM1
CM0
DIF2
DIF1
DIF0
CM1
CM0
Values
H
H
H
H
L
H
H
H
H
L
H
Functions
Master Mode
Slave Mode,
24bit I2S Compatible
X’tal Mode
Slave Mode,
24bit I2S Compatible
X’tal Mode
Table 51. The settings of the DIP switches
Switch on the power supply units, and do the settings of the toggle switches as follws.
Switch names
SW3 (PDN-AK4614)
SW5 (PDN-DIR-AK4114)
SW7 (PDN-DIT-AK4114)
Values
LÆH
L
LÆH
Functions
Power downÆPower up
Power down
Power downÆPower up
Table 52. The settings of the toggle switches
<KM090302>
2008/10
-33-
[AKD4614-A]
Start up the control software, click “Write default” button, write the default value, and write the settings as follows.
(The values except the settings as follows are default.)
Register
addresses
04H
Bits
D6
Signal
names
MCKO
Values
0Æ1
Functions
MCKO: no signalÆ MCLK output
Table 53. The settings of the registers
The combinations of the settings of the jumper pins and analog inputs / digital outputs paths are as follows.
Combinations
1
Settings of the jumper pins
JP207 (SDTO)=SDTO1
2
JP207 (SDTO)=SDTO2
3
JP207 (SDTO)=SDTO3
Analog inputs /
digital outputs
paths
LIN1ÆSDTO1-Lch
RIN1ÆSDTO1-Rch
LIN2ÆSDTO2-Lch
RIN2ÆSDTO2-Rch
LIN3ÆSDTO3-Lch
RIN3ÆSDTO3-Rch
Table 54. The combinations of the settings of the jumper pins and analog inputs / digital outputs paths
<KM090302>
2008/10
-34-
[AKD4614-A]
(4)-2. Slave mode
Devices (Parts)
Use
AK4614 (U1)
DIR: AK4114 (U23)
DIT: AK4114 (U26)
X’tal: X1
X’tal: X2
X’tal: X3
Not use
○
○
-
Removed
○
○
○
-
○
○
○
-
Clock sources
External clock
○
-
X’tal
○
PLL
-
Modes
Master
○
Slave
○
-
Table 55. Use / Not use of the devices (parts) and the modes of using
(a). In case of using optical cable and optical connector
Jumper pins
Cables
Connectors
JP94 (RX)
JP95 (TX)
Optical cable
BNC cable
BNC-RCA
conversion
connector
PORT6
(RX: OPT)
PORT7
(TX: OPT)
J22
(RX: COAX)
J23
(TX: COAX)
OPT
COAX
○
-
PORT6
(RX:
OPT)
Destinations of the connections
External
J23
J22
PORT7
optical
(TX:
(RX:
(TX:
COAX) COAX) connector
OPT)
External
BNC
connector
Use
Not
use
○
-
○
○
-
○
-
-
-
-
-
-
○
-
-
-
-
-
○
-
-
○
-
-
-
-
-
-
-
○
-
-
-
-
-
-
-
Table 56. Use / Not use of the jumper pins, cables, connectors and the destinations of the connections
<KM090302>
2008/10
-35-
[AKD4614-A]
(b). In case of using BNC cable and BNC-RCA conversion connector and RCA connector
Jumper pins
Cables
Connectors
JP94 (RX)
JP95 (TX)
Optical cable
BNC cable
BNC-RCA
conversion
connector
PORT6
(RX: OPT)
PORT7
(TX: OPT)
J22
(RX: COAX)
J23
(TX: COAX)
OPT
COAX
-
○
Use
Not
use
PORT6
(RX:
OPT)
PORT7
(TX:
OPT)
Destinations of the connections
External
J23
J22
optical
(TX:
(RX:
COAX) COAX) connector
External
BNC
connector
○
○
○
-
-
○
-
-
-
-
-
-
-
○
-
-
-
-
-
-
-
○
-
-
-
-
-
-
○
-
-
-
-
-
-
○
-
Table 57. Use / Not use of the jumper pins, cables, connectors and the destinations of the connections
(c). Other common setting
Jumper pins
JP65 (AK4614-Master/Slave)
JP1 (XTI/MCKI)
JP63 (AK4614-XTI/MCKI)
JP64 (AK4614-BICK)
JP66 (AK4614-LRCK)
JP67 (DIR-AK4114-XTI)
JP70 (DIR-AK4114-BICK)
JP71 (DIR-AK4114-LRCK)
JP73 (DIT-AK4114-XTI)
JP75 (DIT-AK4114-BICK)
JP76 (DIT-AK4114-LRCK)
Master
-
Slave
○
Short
Open
○
-
CODEC
DIR
DIT
BNC
10-pin
Open
-
-
○
○
○
-
-
-
○
○
○
○
○
○
Table 58. The settings of the jumper pins (modes and clocks)
<KM090302>
2008/10
-36-
[AKD4614-A]
Jumper pins
JP207 (SDTO)
JP201 (SDTI1)
JP202 (SDTI2)
JP203 (SDTI3)
JP204 (SDTI4)
JP205 (SDTI5)
JP206 (SDTI6)
SDTO1 output
SDTO2 output
SDTO3 output
Always
Always
Always
Always
Always
Always
SDTO1
○
-
SDTO2
○
-
SDTO3
○
Open
-
DIR
10-pin
GND
Open
-
-
○
○
○
○
○
○
-
Table 59. The settings of the jumper pins (digital inputs / digital outputs)
Switch names
SW2 (MODE-AK4614)
SW4 (DIR-AK4114-MODE)
SW6 (DIT-AK4114-MODE)
Pin
No.
4
1
2
3
4
5
1
2
3
4
5
Signal
names
M/S
DIF2
DIF1
DIF0
CM1
CM0
DIF2
DIF1
DIF0
CM1
CM0
Values
L
H
H
H
L
H
H
L
H
L
H
Functions
Slave Mode
Slave Mode,
24bit I2S Compatible
X’tal Mode
Master Mode,
24bit I2S Compatible
X’tal Mode
Table 60. The settings of the DIP switches
Switch on the power supply units, and do the settings of the toggle switches as follws.
Switch names
SW3 (PDN-AK4614)
SW5 (PDN-DIR-AK4114)
SW7 (PDN-DIT-AK4114)
Values
LÆH
L
LÆH
Functions
Power downÆPower up
Power down
Power downÆPower up
Table 61. The settings of the toggle switches
<KM090302>
2008/10
-37-
[AKD4614-A]
Starts up the control software, click “Write default” button, write the default value.
The combinations of the settings of the jumper pins and analog inputs / digital outputs paths are as follows.
Combinations
1
Settings of the jumper pins
JP207 (SDTO)=SDTO1
2
JP207 (SDTO)=SDTO2
3
JP207 (SDTO)=SDTO3
Analog inputs /
digital outputs
paths
LIN1ÆSDTO1-Lch
RIN1ÆSDTO1-Rch
LIN2ÆSDTO2-Lch
RIN2ÆSDTO2-Rch
LIN3ÆSDTO3-Lch
RIN3ÆSDTO3-Rch
Table 62. The combinations of the settings of the jumper pins and analog inputs / digital outputs paths
<KM090302>
2008/10
-38-
[AKD4614-A]
(5) The evaluation mode of DAC (Digital Æ Analog) with the external DIR: AK4114 (U23)
(5)-1. Master mode
Devices (Parts)
AK4614 (U1)
DIR: AK4114 (U23)
DIT: AK4114 (U26)
X’tal: X1
X’tal: X2
X’tal: X3
Use
Not use
○
○
-
○
○
○
○
Removed
○
○
○
Clock sources
External clock
○
-
X’tal
-
PLL
○
-
Modes
Master
○
-
Slave
○
-
Table 63. Use / Not use of the devices (parts) and the modes of using
(a). In case of using optical cable and optical connector
Jumper pins
Cables
Connectors
JP94 (RX)
JP95 (TX)
Optical cable
BNC cable
BNC-RCA
conversion
connector
PORT6
(RX: OPT)
PORT7
(TX: OPT)
J22
(RX: COAX)
J23
(TX: COAX)
OPT
COAX
○
-
-
PORT6
(RX:
OPT)
Destinations of the connections
External
J23
J22
PORT7
optical
(TX:
(RX:
(TX:
COAX) COAX) connector
OPT)
External
BNC
connector
Use
Not
use
○
-
○
○
○
-
-
-
-
-
○
-
-
-
-
-
-
-
-
-
-
○
-
-
-
-
-
-
-
○
-
-
-
-
-
-
-
Table 64. Use / Not use of the jumper pins, cables, connectors and the destinations of the connections
<KM090302>
2008/10
-39-
[AKD4614-A]
(b). In case of using BNC cable and BNC-RCA conversion connector and RCA connector
Jumper pins
Cables
Connectors
JP94 (RX)
JP95 (TX)
Optical cable
BNC cable
BNC-RCA
conversion
connector
PORT6
(RX: OPT)
PORT7
(TX: OPT)
J22
(RX: COAX)
J23
(TX: COAX)
OPT
COAX
-
○
-
Use
Not
use
Destinations of the connections
External
J23
J22
PORT7
optical
(TX:
(RX:
(TX:
COAX) COAX) connector
OPT)
PORT6
(RX:
OPT)
External
BNC
connector
○
○
○
-
-
○
-
-
-
-
-
-
-
○
-
-
-
-
-
-
○
-
-
-
-
-
-
○
-
○
-
-
-
-
-
-
-
Table 65. Use / Not use of the jumper pins, cables, connectors and the destinations of the connections
(c). Other common setting
Jumper pins
JP65 (AK4614-Master/Slave)
JP1 (XTI/MCKI)
JP63 (AK4614-XTI/MCKI)
JP64 (AK4614-BICK)
JP66 (AK4614-LRCK)
JP67 (DIR-AK4114-XTI)
JP70 (DIR-AK4114-BICK)
JP71 (DIR-AK4114-LRCK)
JP73 (DIT-AK4114-XTI)
JP75 (DIT-AK4114-BICK)
JP76 (DIT-AK4114-LRCK)
Master
○
Slave
-
Short
Open
○
-
CODEC
DIR
DIT
BNC
10-pin
-
○
-
-
-
-
○
○
-
Open
○
○
○
○
○
○
Table 66. The settings of the jumper pins (modes and clocks)
<KM090302>
2008/10
-40-
[AKD4614-A]
JP207 (SDTO) should be open.
Jumper pins
JP207 (SDTO)
JP201 (SDTI1)
JP202 (SDTI2)
JP203 (SDTI3)
JP204 (SDTI4)
JP205 (SDTI5)
JP206 (SDTI6)
SDTO1
-
Always
SDTO2
-
SDTO3
-
Open
○
(Note1)
SDTI1 input
No input
SDTI2 input
No input
SDTI3 input
No input
SDTI4 input
No input
SDTI5 input
No input
SDTI6 input
No input
DIR
10-pin
○
-
-
○
○
○
○
○
-
GND
Open
-
-
○
○
○
○
○
○
Table 67. The settings of the jumper pins (digital inputs / digital outputs)
(Note1) Connect DAUX side of DIT: AK4114 (U26) to GND by the clips.
Switch names
SW2 (MODE-AK4614)
SW4 (DIR-AK4114-MODE)
SW6 (DIT-AK4114-MODE)
Pin
No.
4
1
2
3
4
5
1
2
3
4
5
Signal
names
M/S
DIF2
DIF1
DIF0
CM1
CM0
DIF2
DIF1
DIF0
CM1
CM0
Values
H
H
H
H
L
L
H
H
H
L
H
Functions
Master Mode
Slave Mode,
24bit I2S Compatible
PLL Mode
Slave Mode,
24bit I2S Compatible
X’tal Mode
Table 68. The settings of the DIP switches
Switch on the power supply units, and do the settings of the toggle switches as follws.
Switch names
SW3 (PDN-AK4614)
SW5 (PDN-DIR-AK4114)
SW7 (PDN-DIT-AK4114)
Values
LÆH
LÆH
L
Functions
Power downÆPower up
Power downÆPower up
Power down
Table 69. The settings of the toggle switches
<KM090302>
2008/10
-41-
[AKD4614-A]
Starts up the control software, click “Write default” button, write the default value.
The combinations of settings of jumper pins and digital inputs / analog outputs paths are as follows.
Combinations
1
Settings of the jumper pins
JP201 (SDTI1)=DIR
JP202 (SDTI2)=DIR
JP203 (SDTI3)= DIR
JP204 (SDTI4)= DIR
JP205 (SDTI5)= DIR
JP206 (SDTI6)= DIR
Digital inputs /
analog outputs
paths
SDTI1-LchÆLOUT1
SDTI1-RchÆROUT1
SDTI2-LchÆLOUT2
SDTI2-RchÆROUT2
SDTI3-LchÆLOUT3
SDTI3-RchÆROUT3
SDTI4-LchÆLOUT4
SDTI4-RchÆROUT4
SDTI5-LchÆLOUT5
SDTI5-RchÆROUT5
SDTI6-LchÆLOUT6
SDTI6-RchÆROUT6
Table 70. The combinations of settings of the jumper pins and digital inputs / analog outputs paths
<KM090302>
2008/10
-42-
[AKD4614-A]
(5)-2. Slave mode
Devices (Parts)
Use
AK4614 (U1)
DIR: AK4114 (U23)
DIT: AK4114 (U26)
X’tal: X1
X’tal: X2
X’tal: X3
Not use
○
○
-
Removed
○
○
○
○
○
○
○
Clock sources
External clock
○
-
X’tal
-
PLL
○
-
Modes
Master
○
-
Slave
○
-
Table 71. Use / Not use of the devices (parts) and the modes of using
(a). In case of using optical cable and optical connector
Jumper pins
Cables
Connectors
JP94 (RX)
JP95 (TX)
Optical cable
BNC cable
BNC-RCA
conversion
connector
PORT6
(RX: OPT)
PORT7
(TX: OPT)
J22
(RX: COAX)
J23
(TX: COAX)
OPT
COAX
○
-
-
PORT6
(RX:
OPT)
PORT7
(TX:
OPT)
Destinations of the connections
External
J23
J22
optical
(TX:
(RX:
COAX) COAX) connector
External
BNC
connector
Use
Not
use
○
-
○
○
○
-
-
-
-
-
○
-
-
○
-
-
-
-
-
-
-
○
-
-
-
-
-
-
-
○
-
-
-
-
-
-
-
Table 72. Use / Not use of the jumper pins, cables, connectors and the destinations of the connections
<KM090302>
2008/10
-43-
[AKD4614-A]
(b). In case of using BNC cable and BNC-RCA conversion connector and RCA connector
Jumper pins
Cables
Connectors
JP94 (RX)
JP95 (TX)
Optical cable
BNC cable
BNC-RCA
conversion
connector
PORT6
(RX: OPT)
PORT7
(TX: OPT)
J22
(RX: COAX)
J23
(TX: COAX)
OPT
COAX
-
○
-
Use
Not
use
Destinations of the connections
External
J23
J22
PORT7
optical
(TX:
(RX:
(TX:
COAX) COAX) connector
OPT)
PORT6
(RX:
OPT)
External
BNC
connector
○
○
○
-
-
○
-
-
-
-
-
-
-
○
-
-
-
-
-
-
○
-
-
-
-
-
-
○
-
○
-
-
-
-
-
-
-
Table 73. Use / Not use of the jumper pins, cables, connectors and the destinations of the connections
(c). Other common setting
Jumper pins
JP65 (AK4614-Master/Slave)
JP1 (XTI/MCKI)
JP63 (AK4614-XTI/MCKI)
JP64 (AK4614-BICK)
JP66 (AK4614-LRCK)
JP67 (DIR-AK4114-XTI)
JP70 (DIR-AK4114-BICK)
JP71 (DIR-AK4114-LRCK)
JP73 (DIT-AK4114-XTI)
JP75 (DIT-AK4114-BICK)
JP76 (DIT-AK4114-LRCK)
Master
-
Slave
○
Short
Open
○
-
CODEC
DIR
DIT
BNC
10-pin
Open
-
○
○
○
-
-
-
-
○
○
○
○
○
○
Table 74. The settings of the jumper pins (modes and clocks)
<KM090302>
2008/10
-44-
[AKD4614-A]
JP207 (SDTO) should be open.
Jumper pins
JP207 (SDTO)
JP201 (SDTI1)
JP202 (SDTI2)
JP203 (SDTI3)
JP204 (SDTI4)
JP205 (SDTI5)
JP206 (SDTI6)
SDTO1
-
Always
SDTO2
-
SDTO3
-
Open
○
(Note1)
SDTI1 input
No input
SDTI2 input
No input
SDTI3 input
No input
SDTI4 input
No input
SDTI5 input
No input
SDTI6 input
No input
DIR
10-pin
○
-
-
○
○
○
○
○
-
GND
Open
-
-
○
○
○
○
○
○
Table 75. The settings of the jumper pins (digital inputs / digital outputs)
(Note1) Connect DAUX side of DIT: AK4114 (U26) to GND by the clips.
Switch names
SW2 (MODE-AK4614)
SW4 (DIR-AK4114-MODE)
SW6 (DIT-AK4114-MODE)
Pin
No.
4
1
2
3
4
5
1
2
3
4
5
Signal
names
M/S
DIF2
DIF1
DIF0
CM1
CM0
DIF2
DIF1
DIF0
CM1
CM0
Values
L
H
L
H
L
L
H
H
H
L
H
Functions
Slave Mode
Master Mode,
24bit I2S Compatible
PLL Mode
Slave Mode,
24bit I2S Compatible
X’tal Mode
Table 76. The settings of the DIP switches
Switch on the power supply units, and do the settings of the toggle switches as follws.
Switch names
SW3 (PDN-AK4614)
SW5 (PDN-DIR-AK4114)
SW7 (PDN-DIT-AK4114)
Values
LÆH
LÆH
L
Functions
Power downÆPower up
Power downÆPower up
Power down
Table 77. The settings of the toggle switches
<KM090302>
2008/10
-45-
[AKD4614-A]
Starts up the control software, click “Write default” button, write the default value.
The combinations of the settings of the jumper pins and digital inputs / analog outputs paths are as follows.
Combinations
1
Settings of the jumper pins
JP201 (SDTI1)=DIR
JP202 (SDTI2)=DIR
JP203 (SDTI3)= DIR
JP204 (SDTI4)= DIR
JP205 (SDTI5)= DIR
JP206 (SDTI6)= DIR
Digital inputs /
analog outputs
paths
SDTI1-LchÆLOUT1
SDTI1-RchÆROUT1
SDTI2-LchÆLOUT2
SDTI2-RchÆROUT2
SDTI3-LchÆLOUT3
SDTI3-RchÆROUT3
SDTI4-LchÆLOUT4
SDTI4-RchÆROUT4
SDTI5-LchÆLOUT5
SDTI5-RchÆROUT5
SDTI6-LchÆLOUT6
SDTI6-RchÆROUT6
Table 78. The combinations of the settings of the jumper pins and digital inputs / analog outputs paths
<KM090302>
2008/10
-46-
[AKD4614-A]
(6) The evaluation mode of ADC (Analog Æ Digital) with the external clocks
(6)-1. Slave mode
Devices (Parts)
Use
Not use
○
-
AK4614 (U1)
DIR: AK4114 (U23)
DIT: AK4114 (U26)
X’tal: X1
X’tal: X2
X’tal: X3
Clock sources
External clock
○
-
Removed
○
○
○
○
○
○
○
○
X’tal
-
Modes
Master
-
PLL
-
Slave
○
-
Table 79. Use / Not use of the devices (parts) and the modes of using
(a). In case of using 10-line flat cable and 10-pin connector for the external clock
(Using 10-line flat cable and 10-pin connector for the data)
Cables
Connectors
10-line
flat cable
BNC cable
BNC-RCA
conversion
connector
PORT1
(MCLK
BICK
LRCK)
PORT2
(SDTI1
SDTI2
SDTI3)
PORT3
(SDTI4
SDTI5
SDTI6)
PORT4
(SDTO1
SDTO2
SDTO3)
J19
(EXTMCLK)
J20
(EXTBICK)
J21
(EXTLRCK)
PORT1
(MCLK
BICK
LRCK)
PORT2
(SDTI1
SDTI2
SDTI3)
PORT3
(SDTI4
SDTI5
SDTI6)
Destinations of the connections
PORT4
J21
J20
J19
(SDTO1
(EXT(EXT(EXTSDTO2
LRCK)
BICK)
MCLK)
SDTO3)
External
10-pin
connector
External
BNC
connector
Use
Not
use
○
-
-
○
○
○
-
-
-
-
-
-
-
-
○
-
○
-
-
-
-
-
-
-
-
○
-
○
-
-
-
-
-
-
-
-
○
-
○
-
-
-
-
-
-
-
-
○
-
-
○
-
-
-
-
-
-
-
-
-
-
○
-
-
-
-
-
-
-
-
-
-
○
-
-
-
-
-
-
-
-
-
Table 80. Use / Not use of the cables, connectors and the destinations of the connections
<KM090302>
2008/10
-47-
[AKD4614-A]
Jumper pins
JP65 (AK4614-Master/Slave)
JP1 (XTI/MCKI)
JP63 (AK4614-XTI/MCKI)
JP64 (AK4614-BICK)
JP66 (AK4614-LRCK)
JP67 (DIR-AK4114-XTI)
JP70 (DIR-AK4114-BICK)
JP71 (DIR-AK4114-LRCK)
JP73 (DIT-AK4114-XTI)
JP75 (DIT-AK4114-BICK)
JP76 (DIT-AK4114-LRCK)
Master
-
Slave
○
Short
Open
○
-
CODEC
DIR
DIT
BNC
10-pin
Open
-
-
-
-
○
○
○
-
○
○
○
○
○
○
Table 81. The settings of the jumper pins (modes and clocks)
(i) In case of not using UPD. / In case of using UPD and not inverting BICK.
Jumper pins
JP69 (BICK-THR / INV)
THR
○
INV
-
Open
-
Table 82. The settings of the jumper pins (clocks)
(ii) In case of using UPD and inverting BICK.
Jumper pins
JP69 (BICK-THR / INV)
THR
-
INV
○
Open
-
Table 83. The settings of the jumper pins (clocks)
<KM090302>
2008/10
-48-
[AKD4614-A]
(b). In case of using BNC cable and BNC-RCA conversion connector and RCA connector
for the external clock
(Using 10-line flat cable and 10-pin connector for the data)
Cabless
Connectors
10-line
flat cable
BNC cable
BNC-RCA
conversion
connector
PORT1
(MCLK
BICK
LRCK)
PORT2
(SDTI1
SDTI2
SDTI3)
PORT3
(SDTI4
SDTI5
SDTI6)
PORT4
(SDTO1
SDTO2
SDTO3)
J19
(EXTMCLK)
J20
(EXTBICK)
J21
(EXTLRCK)
Destinations of the connections
PORT4
J21
J20
J19
(SDTO1
(EXT(EXT(EXTSDTO2
LRCK)
BICK)
MCLK)
SDTO3)
PORT1
(MCLK
BICK
LRCK)
PORT2
(SDTI1
SDTI2
SDTI3)
PORT3
(SDTI4
SDTI5
SDTI6)
-
-
-
-
-
-
○
-
-
-
-
-
○
-
-
-
-
○
-
-
-
Use
Not
use
○
-
○
○
-
-
○
External
10-pin
connector
External
BNC
connector
-
-
-
-
-
○
-
-
-
-
○
-
-
-
-
-
○
-
○
-
-
-
-
-
-
-
-
-
○
○
-
-
-
-
-
-
-
-
-
○
○
-
-
-
-
-
-
-
-
-
○
Table 84. Use / Not use of the cables, connectors and the destinations of the connections
Jumper pins
JP65 (AK4614-Master/Slave)
JP1 (XTI/MCKI)
JP63 (AK4614-XTI/MCKI)
JP64 (AK4614-BICK)
JP66 (AK4614-LRCK)
JP67 (DIR-AK4114-XTI)
JP70 (DIR-AK4114-BICK)
JP71 (DIR-AK4114-LRCK)
JP73 (DIT-AK4114-XTI)
JP75 (DIT-AK4114-BICK)
JP76 (DIT-AK4114-LRCK)
Master
-
Slave
○
Short
Open
○
-
CODEC
DIR
DIT
BNC
10-pin
Open
-
-
-
○
○
○
-
-
○
○
○
○
○
○
Table 85. The settings of the jumper pins (modes and clocks)
<KM090302>
2008/10
-49-
[AKD4614-A]
(i) In case of not using UPD.
Jumper pins
JP69 (BICK-THR / INV)
THR
○
INV
-
Open
-
Table 86. The settings of the jumper pins (clocks)
(c). Other common setting
JP207 (SDTO) should be open.
Jumper pins
JP207 (SDTO)
Always
JP201 (SDTI1)
JP202 (SDTI2)
JP203 (SDTI3)
JP204 (SDTI4)
JP205 (SDTI5)
JP206 (SDTI6)
Always
Always
Always
Always
Always
Always
SDTO1
-
SDTO2
-
SDTO3
-
Open
○
(Note1)
DIR
10-pin
GND
Open
-
-
○
○
○
○
○
○
-
Table 87. The settings of the jumper pins (digital inputs / digital outputs)
(Note1) Connect DAUX side of DIT: AK4114 (U26) to GND by the clips.
Switch names
SW2 (MODE-AK4614)
SW4 (DIR-AK4114-MODE)
SW6 (DIT-AK4114-MODE)
Pin
No.
4
1
2
3
4
5
1
2
3
4
5
Signal
names
M/S
DIF2
DIF1
DIF0
CM1
CM0
DIF2
DIF1
DIF0
CM1
CM0
Values
L
H
H
H
L
H
H
H
H
L
H
Functions
Slave Mode
Slave Mode,
24bit I2S Compatible
X’tal Mode
Slave Mode,
24bit I2S Compatible
X’tal Mode
Table 88. The settings of the DIP switches
<KM090302>
2008/10
-50-
[AKD4614-A]
Switch on the power supply units, and do the settings of toggle switches as follws.
Switch names
SW3 (PDN-AK4614)
SW5 (PDN-DIR-AK4114)
SW7 (PDN-DIT-AK4114)
Values
LÆH
L
L
Functions
Power downÆPower up
Power down
Power down
Table 89. The settings of the toggle switches
Starts up the control software, click “Write default” button, write the default value.
Analog inputs / digital outputs paths are as follows.
Analog inputs /
digital outputs
paths
LIN1ÆSDTO1-Lch
RIN1ÆSDTO1-Rch
LIN2ÆSDTO2-Lch
RIN2ÆSDTO2-Rch
LIN3ÆSDTO3-Lch
RIN3ÆSDTO3-Rch
Table 90. Analog inputs / digital outputs paths
<KM090302>
2008/10
-51-
[AKD4614-A]
(7) The evaluation mode of DAC (Digital Æ Analog) with the external clocks
(7)-1. Slave mode
Devices (Parts)
Use
Not use
○
-
AK4614 (U1)
DIR: AK4114 (U23)
DIT: AK4114 (U26)
X’tal: X1
X’tal: X2
X’tal: X3
Removed
○
○
○
○
○
○
○
○
Clock sources
External clock
○
-
X’tal
-
PLL
-
Modes
Master
-
Slave
○
-
Table 91. Use / Not use of the devices (parts) and the modes of using
(a). In case of using 10-line flat cable and 10-pin connector for the external clock
(Using 10-line flat cable and 10-pin connector for the data)
Cables
Connectors
10-line
flat cable
BNC cable
BNC-RCA
conversion
connector
PORT1
(MCLK
BICK
LRCK)
PORT2
(SDTI1
SDTI2
SDTI3)
PORT3
(SDTI4
SDTI5
SDTI6)
PORT4
(SDTO1
SDTO2
SDTO3)
J19
(EXTMCLK)
J20
(EXTBICK)
J21
(EXTLRCK)
PORT1
(MCLK
BICK
LRCK)
PORT2
(SDTI1
SDTI2
SDTI3)
PORT3
(SDTI4
SDTI5
SDTI6)
Destinations of the connections
PORT4
J21
J20
J19
(SDTO1
(EXT(EXT(EXTSDTO2
LRCK)
BICK)
MCLK)
SDTO3)
External
10-pin
connector
External
BNC
connector
Use
Not
use
○
-
-
○
○
○
-
-
-
-
-
-
-
-
○
-
○
-
-
-
-
-
-
-
-
○
-
○
-
-
-
-
-
-
-
-
○
-
○
-
-
-
-
-
-
-
-
○
-
-
○
-
-
-
-
-
-
-
-
-
-
○
-
-
-
-
-
-
-
-
-
-
○
-
-
-
-
-
-
-
-
-
Table 92. Use / Not use of the cables, connectors and the destinations of the connections
<KM090302>
2008/10
-52-
[AKD4614-A]
Jumper pins
JP65 (AK4614-Master/Slave)
JP1 (XTI/MCKI)
JP63 (AK4614-XTI/MCKI)
JP64 (AK4614-BICK)
JP66 (AK4614-LRCK)
JP67 (DIR-AK4114-XTI)
JP70 (DIR-AK4114-BICK)
JP71 (DIR-AK4114-LRCK)
JP73 (DIT-AK4114-XTI)
JP75 (DIT-AK4114-BICK)
JP76 (DIT-AK4114-LRCK)
Master
-
Slave
○
Short
Open
○
-
CODEC
DIR
DIT
BNC
10-pin
Open
-
-
-
-
○
○
○
-
○
○
○
○
○
○
Table 93. The settings of the jumper pins (modes and clocks)
(i) In case of not using UPD. / In case of using UPD and not inverting BICK.
Jumper pins
JP69 (BICK-THR / INV)
THR
○
INV
-
Open
-
Table 94. The settings of the jumper pins (clocks)
(ii) In case of using UPD and inverting BICK.
Jumper pins
JP69 (BICK-THR / INV)
THR
-
INV
○
Open
-
Table 95. The settings of the jumper pins (clocks)
<KM090302>
2008/10
-53-
[AKD4614-A]
(b). In case of using BNC cable and BNC-RCA conversion connector and RCA connector
for the external clock
(Using 10-line flat cable and 10-pin connector for the data)
Cables
Connectors
10-line
flat cable
BNC cable
BNC-RCA
conversion
connector
PORT1
(MCLK
BICK
LRCK)
PORT2
(SDTI1
SDTI2
SDTI3)
PORT3
(SDTI4
SDTI5
SDTI6)
PORT4
(SDTO1
SDTO2
SDTO3)
J19
(EXTMCLK)
J20
(EXTBICK)
J21
(EXTLRCK)
Destinations of the connections
PORT4
J21
J20
J19
(SDTO1
(EXT(EXT(EXTSDTO2
LRCK)
BICK)
MCLK)
SDTO3)
PORT1
(MCLK
BICK
LRCK)
PORT2
(SDTI1
SDTI2
SDTI3)
PORT3
(SDTI4
SDTI5
SDTI6)
-
-
-
-
-
-
○
-
-
-
-
-
○
-
-
-
-
○
-
-
-
Use
Not
use
○
-
○
○
-
-
○
External
10-pin
connector
External
BNC
connector
-
-
-
-
-
○
-
-
-
-
○
-
-
-
-
-
○
-
○
-
-
-
-
-
-
-
-
-
○
○
-
-
-
-
-
-
-
-
-
○
○
-
-
-
-
-
-
-
-
-
○
Table 96. Use / Not use of the cables, connectors and the destinations of the connections
Jumper pins
JP65 (AK4614-Master/Slave)
JP1 (XTI/MCKI)
JP63 (AK4614-XTI/MCKI)
JP64 (AK4614-BICK)
JP66 (AK4614-LRCK)
JP67 (DIR-AK4114-XTI)
JP70 (DIR-AK4114-BICK)
JP71 (DIR-AK4114-LRCK)
JP73 (DIT-AK4114-XTI)
JP75 (DIT-AK4114-BICK)
JP76 (DIT-AK4114-LRCK)
Master
-
Slave
○
Short
Open
○
-
CODEC
DIR
DIT
BNC
10-pin
Open
-
-
-
○
○
○
-
-
○
○
○
○
○
○
Table 97. The settings of the jumper pins (modes and clocks)
<KM090302>
2008/10
-54-
[AKD4614-A]
(i) In case of not using UPD.
Jumper pins
JP69 (BICK-THR / INV)
THR
○
INV
-
Open
-
Table 98. The settings of the jumper pins (clocks)
(c). Other common setting
JP207 (SDTO) should be open.
Jumper pins
JP207 (SDTO)
JP201 (SDTI1)
JP202 (SDTI2)
JP203 (SDTI3)
JP204 (SDTI4)
JP205 (SDTI5)
JP206 (SDTI6)
SDTO1
-
Always
SDTO2
-
SDTO3
-
Open
○
(Note1)
SDTI1 input
No input
SDTI2 input
No input
SDTI3 input
No input
SDTI4 input
No input
SDTI5 input
No input
SDTI6 input
No input
DIR
10-pin
GND
Open
-
○
-
-
-
○
○
○
○
○
-
○
○
○
○
○
○
Table 99. The settings of jumper pins (digital inputs / digital outputs)
(Note1) Connect DAUX side of DIT: AK4114 (U26) to GND by the clips.
Switch names
SW2 (MODE-AK4614)
SW4 (DIR-AK4114-MODE)
SW6 (DIT-AK4114-MODE)
Pin
No.
4
1
2
3
4
5
1
2
3
4
5
Signal
names
M/S
DIF2
DIF1
DIF0
CM1
CM0
DIF2
DIF1
DIF0
CM1
CM0
Values
L
H
H
H
L
H
H
H
H
L
H
Functions
Slave Mode
Slave Mode,
24bit I2S Compatible
X’tal Mode
Slave Mode,
24bit I2S Compatible
X’tal Mode
Table 100. The settings of the DIP switches
<KM090302>
2008/10
-55-
[AKD4614-A]
Switch on the power supply units, and do the settings of toggle switches as follws.
Switch names
SW3 (PDN-AK4614)
SW5 (PDN-DIR-AK4114)
SW7 (PDN-DIT-AK4114)
Values
LÆH
L
L
Functions
Power downÆPower up
Power down
Power down
Table 101. The settings of the toggle switches
Starts up the control software, click “Write default” button, write the default value.
The combinations of the settings of the jumper pins and digital inputs / analog outputs paths are as follows.
Combinations
1
Settings of the jumper pins
JP201 (SDTI1)= 10-pin
JP202 (SDTI2)= 10-pin
JP203 (SDTI3)= 10-pin
JP204 (SDTI4)= 10-pin
JP205 (SDTI5)= 10-pin
JP206 (SDTI6)= 10-pin
Digital inputs /
analog outputs
paths
SDTI1-LchÆLOUT1
SDTI1-RchÆROUT1
SDTI2-LchÆLOUT2
SDTI2-RchÆROUT2
SDTI3-LchÆLOUT3
SDTI3-RchÆROUT3
SDTI4-LchÆLOUT4
SDTI4-RchÆROUT4
SDTI5-LchÆLOUT5
SDTI5-RchÆROUT5
SDTI6-LchÆLOUT6
SDTI6-RchÆROUT6
Table 102. The combinations of the settings of the jumper pins and digital inputs / analog outputs paths
<KM090302>
2008/10
-56-
[AKD4614-A]
Control Software Manual
„ Set-up of evaluation board and control software
1. Set up the AKD4614-A according to previous term.
2. Connect IBM-AT compatible PC with AKD4614-A by 10-line type flat cable (packed with AKD4614-A).
Take care of the direction of 10pin header. (Please install the driver in the CD-ROM when this control software
is used on Windows 2000/XP. Please refer “Installation Manual of Control Software Driver by AKM device
control software”. In case of Windows95/98/ME, this installation is not needed. This control software does not
operate on Windows NT.)
3. Insert the CD-ROM labeled “AKD4614-A Evaluation Kit” into the CD-ROM drive.
4. Access the CD-ROM drive, double-click the icon of “akd4614-a.exe” and set up the control program.
5. Then evaluate according to the follows.
„ Operation flow
Keep the following flow.
1. Set up the control program according to explanation above.
2. Click “Write default” button.
3. Then set up the dialog and input the data and evaluate the AK4614.
„ Explanation of each buttons
1. [Port Reset]:
2. [Write Default]:
3. [All Write]:
4. [All Read]:
5. [Function1]:
6. [Function2]:
7. [Function3]:
8. [Function4]:
9. [Function5]:
10. [Save]:
11. [Open]:
12. [Write]:
13. [Read]:
Set up the USB interface board (AKDUSBIF-A).
Initialize the register of AK4614.
Write all registers that are currently displayed.
Read all registers of the AK4614.
Dialog to write data by keyboard operation.
Dialog to write data by keyboard operation.
The sequence of register setting can be set and executed.
The sequence that is created on [Function3] can be assigned to buttons and executed.
The register setting that is created by [SAVE] function on main window can be assigned to
buttons and executed.
Save the current register setting.
Write the saved values to all register.
Dialog to write data by mouse operation.
Dialog to read data by mouse operation.
„ Indication of data
Input data is indicated on the register map. Red letter indicates “H” or “1” and blue one indicates “L” or “0”. Blank
is the part that is not defined in the datasheet.
<KM090302>
2008/10
-57-
[AKD4614-A]
„ Explanation of each dialog
1. [Write Dialog]: Dialog to write data by mouse operation
There are dialogs corresponding to each register.
Click the [Write] button corresponding to each register to set up the dialog. If you check the check box, data becomes
“H” or “1”. If not, “L” or “0”.
If you want to write the input data to AK4614, click [OK] button. If not, click [Cancel] button.
2. [Function1 Dialog]: Dialog to write data by keyboard operation
Address Box:
Data Box:
Input registers address in 2 figures of hexadecimal.
Input registers data in 2 figures of hexadecimal.
If you want to write the input data to AK4614, click [OK] button. If not, click [Cancel] button.
3. [Function2 Dialog]: Dialog to evaluate Volume Control
Address Box:
Input registers address in 2 figures of hexadecimal.
Start Data Box:
Input starts data in 2 figures of hexadecimal.
End Data Box:
Input end data in 2 figures of hexadecimal.
Interval Box:
Data is written to AK4614 by this interval.
Step Box:
Data changes by this step.
Mode Select Box:
If you check this check box, data reaches end data, and returns to start data.
[Example]
Start Data = 00, End Data = 09
Data flow: 00 01 02 03 04 05 06 07 08 09 09 08 07 06 05 04 03 02 01 00
If you do not check this check box, data reaches end data, but does not return to start data.
[Example]
Start Data = 00, End Data = 09
Data flow: 00 01 02 03 04 05 06 07 08 09
If you want to write the input data to AK4614, click [OK] button. If not, click [Cancel] button.
4. [Save] and [Open]
4-1. [Save]
Save the current register setting data. The extension of file name is “akr”.
<Operation flow>
(1) Click [Save] Button.
(2) Set the file name and push [Save] Button. The extension of file name is “akr”.
4-2. [Open]
The register setting data saved by [Save] is written to AK4614. The file type is the same as [Save].
<Operation flow>
(1) Click [Open] Button.
(2) Select the file (*.akr) and Click [Open] Button.
<KM090302>
2008/10
-58-
[AKD4614-A]
5. [Function3 Dialog]
The sequence of register setting can be set and executed.
(1) Click [F3] Button.
(2) Set the control sequence.
Set the address, Data and Interval time. Set “-1” to the address of the step where the sequence should be
paused.
(3) Click [Start] button. Then this sequence is executed.
The sequence is paused at the step of Interval="-1". Click [START] button, the sequence restarts from the paused
step.
This sequence can be saved and opened by [Save] and [Open] button on the Function3 window. The extension of
file name is “aks”.
Figure 3. Window of [F3]
<KM090302>
2008/10
-59-
[AKD4614-A]
6. [Function4 Dialog]
The sequence that is created on [Function3] can be assigned to buttons and executed. When [F4] button is clicked,
the window as shown in Figure 4. is opened.
Figure 4. [F4] window
<KM090302>
2008/10
-60-
[AKD4614-A]
6-1. [OPEN] buttons on left side and [START] buttons
(1) Click [OPEN] button and select the sequence file (*.aks).
The sequence file name is displayed as shown in Figure 5.
Figure 5. [F4] window (2)
(2) Click [START] button, then the sequence is executed.
6-2. [SAVE] and [OPEN] buttons on right side
[SAVE]: The sequence file names can assign be saved. The file name is *.ak4.
[OPEN]: The sequence file names assign that are saved in *.ak4 are loaded.
6-3. Note
(1) This function doesn't support the pause function of sequence function.
(2) All files need to be in same folder used by [SAVE] and [OPEN] function on right side.
(3) When the sequence is changed in [Function3], the file should be loaded again in order to reflect the change.
<KM090302>
2008/10
-61-
[AKD4614-A]
7. [Function5 Dialog]
The register setting that is created by [SAVE] function on main window can be assigned to buttons and executed.
When [F5] button is clicked, the following window as shown in Figure 6.opens.
Figure 6. [F5] window
7-1. [OPEN] buttons on left side and [WRITE] button
(1) Click [OPEN] button and select the register setting file (*.akr).
The register setting file name is displayed as shown in Figure 7.
(2) Click [WRITE] button, then the register setting is executed.
<KM090302>
2008/10
-62-
[AKD4614-A]
Figure 7. [F5] windows (2)
7-2. [SAVE] and [OPEN] buttons on right side
[SAVE]: The register setting file names assign can be saved. The file name is *.ak5.
[OPEN]: The register setting file names assign that are saved in *.ak5 are loaded.
7-3. Note
(1) All files need to be in same folder used by [SAVE] and [OPEN] function on right side.
(2) When the register setting is changed by [Save] Button in main window, the file should be loaded again in
order to reflect the change
<KM090302>
2008/10
-63-
[AKD4614-A]
Revision History
Date
Manual
Board
Reason
(yy/mm/dd) Revision Revision
07/11/08 KM090300
0
First Edition
08/10/31
KM090302
2
Circuit
Diagram
Change
Page
Contents
65 Differencial Output Circuit:
70-72 LOUT1 (LOUT1+, LOUT1-), ROUT1 (ROUT1+, ROUT1),
LOUT2 (LOUT2+, LOUT2-), ROUT2 (ROUT2+, ROUT2),
LOUT3 (LOUT3+, LOUT3-), ROUT3 (ROUT3+, ROUT3),
LOUT4 (LOUT4+, LOUT4-), ROUT4 (ROUT4+, ROUT4),
LOUT5 (LOUT5+, LOUT5-), ROUT5 (ROUT5+, ROUT5),
LOUT6 (LOUT6+, LOUT6-), ROUT6 (ROUT6+, ROUT6)
Circuit Constant (Capacitance, Resistance, OPAmp) Change:
(1) Capacitance change: C401, C402, C403, C404, C405, C406, C 407,
C408, C409, C410, C411, C412:
470pÆOpen
(2) Resistance change: R15, R16, R17, R18, R19, R20, R21, R22, R23,
R25, R27, R29, R32, R33, R34, R35, R39, R41, R42, R59, R58,
R57, R56, R55:
ShortÆ20Ω
(3) Capacitance added:
C413, C414, C415, C416, C417, C418, C419, C420, C421, C422,
C423, C424:
OpenÆ2200p
(4) OPAmp deleted:
U101A, U101B, U102A, U102B, U103A, U103B,
U104A, U104B, U105A, U105B, U106A, U106B
IMPORTANT NOTICE
z These products and their specifications are subject to change without notice.
When you consider any use or application of these products, please make inquiries the sales office of Asahi Kasei EMD
Corporation (AKEMD) or authorized distributors as to current status of the products.
z AKEMD assumes no liability for infringement of any patent, intellectual property, or other rights in the application or use of any
information contained herein.
z Any export of these products, or devices or systems containing them, may require an export license or other official approval under
the law and regulations of the country of export pertaining to customs and tariffs, currency exchange, or strategic materials.
z AKEMD products are neither intended nor authorized for use as critical componentsNote1) in any safety, life support, or other hazard
related device or systemNote2), and AKEMD assumes no responsibility for such use, except for the use approved with the express
written consent by Representative Director of AKEMD. As used here:
Note1) A critical component is one whose failure to function or perform may reasonably be expected to result, whether directly
or indirectly, in the loss of the safety or effectiveness of the device or system containing it, and which must therefore meet very
high standards of performance and reliability.
Note2) A hazard related device or system is one designed or intended for life support or maintenance of safety or for
applications in medicine, aerospace, nuclear energy, or other fields, in which its failure to function or perform may reasonably
be expected to result in loss of life or in significant injury or damage to person or property.
z It is the responsibility of the buyer or distributor of AKEMD products, who distributes, disposes of, or otherwise places the product
with a third party, to notify such third party in advance of the above content and conditions, and the buyer or distributor agrees to
assume any and all responsibility and liability for and hold AKEMD harmless from any and all claims arising from the use of said
product in the absence of such notification.
<KM090302>
2008/10
-64-
ROUT6+ / ROUT6
AK4614-DZF1 / OVF1
ROUT6-
LIN1+ / LIN1
AK4614-DZF2 / OVF2
1
LIN1-
RIN1+ / RIN1
LIN2+ / LIN2
RIN1-
LIN2-
RIN2-
LIN3-
RIN3+ / RIN3
RIN2+ / RIN2
2
LIN3+ / LIN3
3
AK4614-AVDD1
4
RIN3-
5
C413
2200p
R1
(short)
R2
(short)
R3
(short)
SW1
DSS108
R8
(short)
R9
(short)
R10
(short)
R11
(short)
R12
(short)
R13
(short)
R14
(short)
R15
20
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
+
C2
10u
+
C1
2.2u
VSS1
61
ROUT6-
ROUT6+ / ROUT6
62
DZF1 / OVF1
63
65
64
DZF2 / OVF2
LIN1-
LIN1+ / LIN1
67
66
RIN1+ / RIN1
69
68
RIN1-
LIN2+ / LIN2
70
71
RIN2-
LIN2-
72
73
74
LIN3-
AVDD1
VSS1
75
76
77
78
VREFH1
RIN2+ / RIN2
TST1
VSS1
C4
0.1u
LIN3+ / LIN3
1
1
VCOM
RIN3+ / RIN3
RIN3-
CN2
80pin_1
79
80
C3
0.1u
47K
SW2
DSS108
AK4614-CAD0
AK4614-CAD1
AK4614-I2C
AK4614-M/S
AK4614-DVMPD
1
2
3
4
5
6
7
8
CN3
80pin_3
R17 20
LOUT6-
60
60
LOUT6R18 20
16
15
14
13
12
11
10
9
AK4614-TVDD2
2
2
TST3
LOUT6+ / LOUT6
59
59
3
3
TST4
ROUT5-
58
58
4
4
TST5
ROUT5+ / ROUT5
57
57
5
5
CAD0
LOUT5-
56
56
6
6
CAD1
LOUT5+ / LOUT5
55
55
7
7
I2C
ROUT4-
54
54
8
8
CCLK / SCL
ROUT4+ / ROUT4
53
53
LOUT4-
52
52
LOUT4+ / LOUT4
51
51
VREFH2
50
50
AVDD2
49
C414
2200p
LOUT6+ / LOUT6
R19 20
AK4614-TVDD1
ROUT5R20 20
MODE-AK4614
RP2
M9-1-473
R16
20
AK4614-TVDD1
AK4614-TST1
AK4614-TST3
AK4614-TST4
AK4614-TST5
AK4614-TST2
9
8
7
6
5
4
3
2
1
R7
(short)
D
CN1
80pin_4
TST-AK4614
RP1
M9-1-473
R6
(short)
AK4614-TVDD2
78
16
15
14
13
12
11
10
9
79
1
2
3
4
5
6
7
8
R5
(short)
VSS1
80
AK4614-TST1
AK4614-TST3
AK4614-TST4
AK4614-TST5
AK4614-TST2
D
R4
(short)
C415
2200p
ROUT5+ / ROUT5
R21 20
AK4614-CAD0
AK4614-CAD1
AK4614-I2C
AK4614-M/S
AK4614-DVMPD
9
8
7
6
5
4
3
2
1
C
LOUT5R22 20
C
C416
2200p
LOUT5+ / LOUT5
R23 20
ROUT4-
47K
R25 20
AK4614-CCLK / SCL
R24
(short)
R26
(short)
R28
(short)
R31
(short)
C417
2200p
ROUT4+ / ROUT4
R27 20
AK4614-CSN
9
9
10
10
11
11
CDTO
12
12
TVDD2
CSN
LOUT4-
VDD
2
AK4614-CDTI / SDA / SDA (ACK)
R30
1
D1
HSU119
10k
AK4614-CDTO
R29 20
U1
AK4614
CDTI / SDA
C418
2200p
LOUT4+ / LOUT4
AK4614-PDN-SW3
1
H
3
L
SW3
ATE1D-2M3
AK4614-TVDD2
C5
C6
0.1u
10u
+
C7
VSS3
VSS3
AK4614-DVDD
C10
C11
10u
0.1u
+
2
13
PDN-AK4614
14
13
VSS3
VSS2
48
14
DVDD
ROUT3-
47
AK4614-AVDD2
49
C8
0.1u
0.1u
+
C9
10u
48
VSS2
ROUT3R33 20
15
NC
16
16
TST2
17
17
M/S
18
18
MCKO
15
VSS2
R32 20
47
ROUT3+ / ROUT3
46
46
LOUT3-
45
45
LOUT3+ / LOUT3
44
44
ROUT2-
43
43
C419
2200p
ROUT3+ / ROUT3
B
B
VSS4
R34 20
LOUT3R35 20
C420
2200p
LOUT3+ / LOUT3
R39 20
AK4614-MCKO
R38
(short)
R40
(short)
ROUT2R41 20
LOUT2+ / LOUT2
42
41
41
ROUT2+ / ROUT2
LOUT2-
40
ROUT1-
ROUT1+ / ROUT1
39
38
LOUT1-
LOUT1+ / LOUT1
37
36
DVMPD
SDTI6
35
34
SDTI5
SDTI4
33
32
SDTI3
SDTI2
31
30
SDTI1
29
28
BICK
LRCK
SDTO3
27
26
42
R42 20
LOUT2-
C12
0.1u
2
C13
X1
HC-49/U C15
10p
10p
+
1
25
TVDD1
22
21
24.576MHz
SDTO2
ROUT2+ / ROUT2
SDTO1
XTO
24
PDN
20
VSS4
19
20
23
19
XTI / MCKI
AK4614-PDN
C421
2200p
VSS4
R45
(short)
R46
(short)
R47
(short)
R48
(short)
R49
(short)
R50
(short)
R51
(short)
R52
(short)
R53
(short)
R57
20
40
C422
2200p
ROUT1+ / ROUT1
C423
2200p
LOUT1-
LOUT1+ / LOUT1
AK4614-SDTI6
AK4614-SDTI5
AK4614-SDTI4
AK4614-SDTI3
AK4614-SDTI2
AK4614-BICK
AK4614-SDTI1
AK4614-LRCK
AK4614-SDTO3
AK4614-SDTO2
AK4614-SDTO1
AK4614-TVDD1
R59
20
R54
(short)
C424
2200p
-65-
R58
20
ROUT1-
R44
(short)
R56
20
LOUT2+ / LOUT2
VSS4
R43
(short)
JP1
HIF3G-50P-2.54DSA (2x1)
XTI / MCKI
39
A
R55
20
AK4614-XTI / MCKI
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
CN4
80pin_2
A
21
C17
10u
Title
Size
A2
Date:
5
4
3
2
AKD4614-A
AK4614
Document Number
Wednesday, October 08, 2008
1
Sheet
1
of
Rev
2
12
5
4
3
2
1
VDD
L1
47u
PORT6
TORX141
RX(OPT)
VCC
3
GND
OUT
2
1
C135
0.1u
R271
470
OPT
RX
D
D
JP94
HIF3G-50P-2.54DSA (3x1)
COAX
0.1u
VDD
10u
C138
DIR-AK4114-MODE
1
9
8
7
6
5
4
3
2
1
INT1
18k
38
R273
0.47u
39
C139
40
42
41
AVSS
NC
RX0
43
44
RX1
45
46
RX2
RX3
NC
47
48
VDD
VCOM
16
15
14
13
12
11
10
9
TEST1
RP3
M9-1-473
1
2
3
4
5
6
7
8
+
DIF2
DIF1
DIF0
CM1
CM0
OCKS1
OCKS0
37
0.1u
SW4
DSS108
AVDD
C137
75
+
R272
R
C136
2
3
1
RX(COAX)
IPS0
INT0
36
U24A
1
OCKS0
3
DIF0
OCKS1
34
4
TEST2
CM1
33
5
DIF1
CM0
32
U23
AK4114
6
NC
7
DIF2
U25A
1
VDD
2
U25B
3
74HC14
30
1k
2
LED1
SML-210LT
1
VDD
INT0
DIR-AK4114-XTI
C140
10p
HC-49/U
24.576MHz
4
IPS1
XTO
29
28
7
7
74HC14
1
3
H
31
XTI
X2
8
L
PDN
R274
C
2
10k VDD
14
R275
D2
HSU119
14
1
2
VDD
1
47K
C
NC
35
2
7
74AC14
2
VDD
14
J22
MR-552LS
C141
10p
C142
SW5
ATE1D-2M3
0.1u
9
P/SN
DAUX
10
XTL0
MCKO2
27
BICK
26
DIR-AK4114-BICK
SDTO
25
DIR-AK4114-SDTO
2
VDD
10u
LRCK
MCKO1
23
24
DIR-AK4114-LRCK
DIR-AK4114-MCKO1
B
+
C146
22
DVSS
0.1u
10u
VDD
VDD
74AC14
7
14
U24E
11
8
6
10
7
7
74AC14
14
U24D
9
74AC14
U24C
5
4
7
74AC14
14
VDD
U24B
3
14
VDD
C144
C145
+
B
DVDD
VOUT
0.1u
21
20
COUT
UOUT
19
18
TX1
TX0
BOUT
17
13
C143
16
VIN
15
12
TVDD
XTL1
14
11
DVSS
PDN-DIR-AK4114
A
74AC14
12
7
U24F
13
14
A
-66-
Title
Size
A2
Date:
5
4
3
2
AKD4614-A
Document Number
DIR AK4114
Tuesday, October 07, 2008
1
Sheet
10
Rev
2
of
12
5
4
3
2
1
PORT7
TOTX141
TX(OPT)
IN
VCC
3
2
GND
1
VDD
C147
OPT
0.1u
COAX
JP95
HIF3G-50P-2.54DSA (3x1)
T1
DA-02F
VDD
R276
2
3
1
D
TX(COAX)
240
C148
C149
0.1u
+
J23
MR-552LS
TX
10u
D
R277
C150
150
0.1u
1:1
C151
1
IPS0
2
3
4
5
DIT-AK4114-MODE
9
8
7
6
5
4
3
2
1
47K
6
7
C
37
INT1
39
R
AVDD
40
42
41
AVSS
VCOM
NC
RX0
43
44
RX1
46
45
TEST1
NC
47
48
VDD
INT0
36
NC
OCKS0
35
DIF0
OCKS1
34
TEST2
CM1
33
DIF1
CM0
32
U26
AK4114
NC
PDN
31
XTI
30
DIT-AK4114-XTI
DIF2
1
RP4
M9-1-473
16
15
14
13
12
11
10
9
RX2
1
2
3
4
5
6
7
8
RX3
DIF2
DIF1
DIF0
CM1
CM0
OCKS1
OCKS0
38
0.47u
+
SW6
DSS108
C152
10p
C
VDD
X3
HC-49/U
2
74HC14
1
3
H
6
U25D
9
74HC14
14
VDD
VDD
29
9
P/SN
DAUX
28
10
XTL0
MCKO2
27
11
XTL1
BICK
26
12
VIN
SDTO
25
C153
10p
DIT-AK4114-DAUX
8
7
U25C
5
14
10k VDD
7
1
XTO
R278
D3
HSU119
L
C154
SW7
ATE1D-2M3
0.1u
DIT-AK4114-BICK
C158
10u
LRCK
24
MCKO1
DVSS
0.1u
10u
22
C156
C157
23
DVDD
VOUT
0.1u
21
20
COUT
UOUT
19
18
TX1
BOUT
17
16
TX0
15
TVDD
13
C155
14
DVSS
2
PDN-DIT-AK4114
IPS1
2
24.576MHz
8
DIT-AK4114-LRCK
+
+
DIT-AK4114-MCKO1
VDD
VDD
B
B
A
7
14
U25F
13
74HC14
10
A
12
7
U25E
11
74HC14
14
VDD
-67-
Title
Size
A2
Date:
5
4
3
2
AKD4614-A
Document Number
DIT AK4114
Tuesday, October 07, 2008
1
Sheet
11
Rev
2
of
12
5
4
3
2
1
LIN1
R60
10k
6
5
7
2
U3B
NJM5532
AIN-bias
3
8
8
AIN-bias
VOP-ADC-minus
R64
LIN1+ (Inverted)4.7k
4
R62
10k
4
C18
22u
+
DIFF
LIN1
-
SINGLE
LIN1+
C19
JP3
10u
HIF3G-50P-2.54DSA (3x1)
LIN1+ / LIN1
SINGLE
DIFF
1
TEST1
D
LIN1+ / LIN1
+
JP2
HIF3G-50P-2.54DSA (3x1)
LIN1 (LIN1+ / LIN1-)
R63
47K
+
LIN1 (LIN1+ / LIN1-)
+
2
3
1
D
R61
4.7K
VOP-ADC-minus
-
J1
MR-552LS
U3A
NJM5532
VOP-ADC-plus
VOP-ADC-plus
JP4
HIF3G-50P-2.54DSA (2x1)
LIN1-
C20
10u
TEST2
LIN1-
+
LIN1GND
JP5
HIF3G-50P-2.54DSA (2x1)
RIN1
R65
10k
6
7
2
U4B
NJM5532
AIN-bias
3
8
8
+
5
AIN-bias
VOP-ADC-minus
R68
RIN1+ (Inverted)4.7k
4
R69
10k
4
C22
22u
-
DIFF
RIN1
+
SINGLE
C21
JP7
10u
HIF3G-50P-2.54DSA (3x1)
RIN1+ / RIN1
SINGLE
DIFF
RIN1+
1
TEST3
RIN1+ / RIN1
+
JP6
HIF3G-50P-2.54DSA (3x1)
RIN1 (RIN1+ / RIN1-)
R67
47K
+
2
3
1
RIN1 (RIN1+ / RIN1-)
R66
4.7K
VOP-ADC-minus
-
J2
MR-552LS
U4A
NJM5532
VOP-ADC-plus
C
C
VOP-ADC-plus
JP8
HIF3G-50P-2.54DSA (2x1)
RIN1-
C23
10u
TEST4
RIN1-
+
RIN1GND
JP9
HIF3G-50P-2.54DSA (2x1)
LIN2
R70
10k
VOP-ADC-minus
R72
10k
4
C24
22u
6
U5B
NJM5532
AIN-bias
3
8
8
2
LIN2+
C25
JP11
10u
HIF3G-50P-2.54DSA (3x1)
LIN2+ / LIN2
SINGLE
DIFF
1
TEST5
LIN2+ / LIN2
+
5
AIN-bias
VOP-ADC-minus
R74
LIN2+ (Inverted)4.7k
7
4
LIN2
+
DIFF
-
SINGLE
+
JP10
HIF3G-50P-2.54DSA (3x1)
LIN2 (LIN2+ / LIN2-)
R73
47K
+
2
3
1
-
J3
MR-552LS
LIN2 (LIN2+ / LIN2-)
R71
4.7K
U5A
NJM5532
VOP-ADC-plus
VOP-ADC-plus
JP12
HIF3G-50P-2.54DSA (2x1)
LIN2-
B
C26
10u
TEST6
GND
B
LIN2-
+
LIN2-
JP13
HIF3G-50P-2.54DSA (2x1)
RIN2
R75
10k
VOP-ADC-minus
4
6
5
7
2
U6B
NJM5532
AIN-bias
3
8
8
AIN-bias
VOP-ADC-minus
R79
RIN2+ (Inverted)4.7k
4
R78
10k
+
C27
22u
-
DIFF
RIN2
+
SINGLE
C28
JP15
10u
HIF3G-50P-2.54DSA (3x1)
RIN2+ / RIN2
SINGLE
RIN2+
1
DIFF
TEST7
RIN2+ / RIN2
+
JP14
HIF3G-50P-2.54DSA (3x1)
RIN2 (RIN2+ / RIN2-)
R77
47K
+
2
3
1
-
J4
MR-552LS
RIN2 (RIN2+ / RIN2-)
R76
4.7K
U6A
NJM5532
VOP-ADC-plus
VOP-ADC-plus
JP16
HIF3G-50P-2.54DSA (2x1)
RIN2-
C29
10u
+
RIN2GND
TEST8
RIN2-
JP17
HIF3G-50P-2.54DSA (2x1)
A
A
-68-
Title
Size
A2
Date:
5
4
3
2
AKD4614-A
Document Number
Rev
ANALOG INPUT RCA-1 / RCA-2
Tuesday, October 07, 2008
1
Sheet
2
of
2
12
5
4
3
2
1
LIN3
R80
10k
VOP-ADC-minus
R83
10k
4
C30
22u
6
U7B
NJM5532
AIN-bias
3
8
8
+
D
2
LIN3+
C31
JP19
10u
HIF3G-50P-2.54DSA (3x1)
LIN3+ / LIN3
SINGLE
DIFF
1
TEST9
LIN3+ / LIN3
+
5
AIN-bias
VOP-ADC-minus
R84
LIN3+ (Inverted)4.7k
7
4
LIN3
+
DIFF
-
SINGLE
R82
47K
+
JP18
HIF3G-50P-2.54DSA (3x1)
LIN3 (LIN3+ / LIN3-)
2
3
1
-
J5
MR-552LS
LIN3 (LIN3+ / LIN3-)
R81
4.7K
U7A
NJM5532
D
VOP-ADC-plus
VOP-ADC-plus
JP20
HIF3G-50P-2.54DSA (2x1)
LIN3-
C32
10u
TEST10
LIN3-
+
LIN3GND
JP21
HIF3G-50P-2.54DSA (2x1)
RIN3
R85
10k
VOP-ADC-minus
R88
10k
4
C33
22u
6
U8B
NJM5532
AIN-bias
3
8
8
2
SINGLE
RIN3+
1
DIFF
C34
JP23
10u
HIF3G-50P-2.54DSA (3x1)
RIN3+ / RIN3
TEST11
RIN3+ / RIN3
+
5
AIN-bias
VOP-ADC-minus
R89
RIN3+ (Inverted)4.7k
7
4
RIN3
+
DIFF
-
SINGLE
+
R87
47K
+
JP22
HIF3G-50P-2.54DSA (3x1)
RIN3 (RIN3+ / RIN3-)
2
3
1
-
J6
MR-552LS
RIN3 (RIN3+ / RIN3-)
R86
4.7K
U8A
NJM5532
VOP-ADC-plus
VOP-ADC-plus
JP24
HIF3G-50P-2.54DSA (2x1)
RIN3-
C35
10u
TEST12
+
C
RIN3GND
RIN3-
C
JP25
HIF3G-50P-2.54DSA (2x1)
VA
JP26
VA
HIF3G-50P-2.54DSA (2x1)
R90
10k
AIN-bias
C36
C37
0.1u
10u
+
R91
10k
B
B
A
A
-69-
Title
Size
A2
Date:
5
4
3
2
AKD4614-A
Document Number
Rev
ANALOG INPUT RCA-3
Tuesday, October 07, 2008
1
Sheet
2
3
of
12
5
4
TEST13
LOUT1+ / LOUT1
JP27
HIF3G-50P-2.54DSA (3x1)
LOUT1+ / LOUT1
SINGLE
LOUT1
DIFF
R93
(open)
R94
4.7K
C39
470p
D
C40
22u
LOUT1-
JP30
HIF3G-50P-2.54DSA (3x1)
ROUT1+ / ROUT1
LOUT2-
LOUT2-
JP34
HIF3G-50P-2.54DSA (2x1)
LOUT2-
C54
22u
R119
(open)
B
TEST19
ROUT2+ / ROUT2
C59
22u
R125
(open)
ROUT2-
ROUT2-
JP37
HIF3G-50P-2.54DSA (2x1)
ROUT2-
C61
22u
R130
(open)
2
3
1
8
R105
4.7K
ROUT1-
R106
4.7K
VOP-DAC-minus
C48
3900p
R110
(open)
C46
470p
R107
180
C49
(open)
4
TEST102
2
R111
4.7K
R112
180
R113
4.7K
NJM5532
U9A
SINGLE
ROUT1
1
DIFF
JP32
HIF3G-50P-2.54DSA (3x1)
ROUT1
R109
(short)
J8
MR-552LS
ROUT1
C
C50
(open)
8
3
ROUT1+
VOP-DAC-plus
C51
470p
TEST203
JP33
HIF3G-50P-2.54DSA (3x1)
LOUT2+ / LOUT2
SINGLE
LOUT2
DIFF
R115
(open)
R116
4.7K
TEST103
LOUT2-
R117
4.7K
C53
470p
R118
180
VOP-DAC-minus
C55
3900p
R120
(open)
C56
(open)
6
5
LOUT2+
R122
4.7K
R123
180
R124
4.7K
NJM5532
U10B
SINGLE
LOUT2
7
DIFF
JP35
HIF3G-50P-2.54DSA (3x1)
LOUT2
R121
(short)
J9
MR-552LS
LOUT2
2
3
1
LOUT2
B
C57
(open)
VOP-DAC-plus
C58
470p
TEST204
JP36
HIF3G-50P-2.54DSA (3x1)
ROUT2+ / ROUT2
SINGLE
ROUT2
DIFF
R126
(open)
R127
4.7K
TEST104
ROUT2-
+
TEST20
ROUT1
LOUT1
ROUT1
R104
(open)
+
ROUT2+ / ROUT2
SINGLE
+
TEST18
2
3
1
470p
4
R114
(open)
J7
MR-552LS
LOUT1
DIFF
+
C52
22u
R99
(short)
C43
(open)
8
LOUT2+ / LOUT2
DIFF
JP29
HIF3G-50P-2.54DSA (3x1)
LOUT1
VOP-DAC-plus
C44
R128
4.7K
VOP-DAC-minus
C62
3900p
R131
(open)
C60
470p
R129
180
C63
(open)
4
TEST17
LOUT2+ / LOUT2
R101
180
R102
4.7K
SINGLE
LOUT1
7
2
3
ROUT2+
R133
4.7K
R134
180
R135
4.7K
NJM5532
U10A
SINGLE
ROUT2
1
DIFF
JP38
HIF3G-50P-2.54DSA (3x1)
ROUT2
C65
R132
(short)
J10
MR-552LS
ROUT2
2
3
1
ROUT2
C64
(open)
8
R108
(open)
C
R100
4.7K
NJM5532
U9B
TEST202
+
ROUT1-
C47
22u
4
+
5
LOUT1+
+
JP31
HIF3G-50P-2.54DSA (2x1)
6
+
R103
(open)
C42
(open)
-
C45
22u
C41
3900p
R98
(open)
+
ROUT1+ / ROUT1
ROUT1-
D
-
TEST15
ROUT1-
R96
180
+
R97
(open)
TEST16
R95
4.7K
VOP-DAC-minus
LOUT1-
ROUT1+ / ROUT1
TEST101
-
LOUT1-
JP28
HIF3G-50P-2.54DSA (2x1)
+
TEST14
LOUT1-
1
TEST201
+
R92
(open)
2
-
LOUT1+ / LOUT1
C38
22u
3
VOP-DAC-plus
470p
A
A
-70-
Title
Size
A2
Date:
5
4
3
2
AKD4614-A
Document Number
Rev
ANALOG OUTPUT RCA-1 / RCA-2
Tuesday, October 07, 2008
1
Sheet
4
of
2
12
5
4
TEST21
LOUT3+ / LOUT3
C66
22u
R136
(open)
2
1
TEST205
JP39
HIF3G-50P-2.54DSA (3x1)
LOUT3+ / LOUT3
+
LOUT3+ / LOUT3
3
SINGLE
LOUT3
DIFF
R137
(open)
R138
4.7K
D
D
JP42
HIF3G-50P-2.54DSA (3x1)
ROUT3+ / ROUT3
LOUT4+ / LOUT4
R158
(open)
LOUT4-
LOUT4-
JP46
HIF3G-50P-2.54DSA (2x1)
LOUT4-
B
C82
22u
R163
(open)
TEST27
ROUT4+ / ROUT4
R148
(open)
C87
22u
R169
(open)
ROUT3-
ROUT4-
ROUT4-
JP49
HIF3G-50P-2.54DSA (2x1)
ROUT4-
R150
4.7K
C89
22u
R174
(open)
8
VOP-DAC-minus
C76
3900p
R153
(open)
LOUT4
2
3
1
ROUT4
2
3
1
C74
470p
R151
180
C77
(open)
4
TEST106
2
ROUT3+
R155
4.7K
R156
180
R157
4.7K
NJM5532
U11A
SINGLE
ROUT3
1
DIFF
JP44
HIF3G-50P-2.54DSA (3x1)
ROUT3
R154
(short)
J12
MR-552LS
VOP-DAC-plus
C79
470p
TEST207
JP45
HIF3G-50P-2.54DSA (3x1)
LOUT4+ / LOUT4
SINGLE
LOUT4
DIFF
R159
(open)
R160
4.7K
TEST107
LOUT4-
R161
4.7K
C81
470p
R162
180
VOP-DAC-minus
C83
3900p
R164
(open)
C84
(open)
6
5
LOUT4+
R166
4.7K
R167
180
R168
4.7K
NJM5532
U12B
SINGLE
LOUT4
7
DIFF
JP47
HIF3G-50P-2.54DSA (3x1)
LOUT4
R165
(short)
J13
MR-552LS
B
LOUT4
C85
(open)
VOP-DAC-plus
C86
470p
TEST208
JP48
HIF3G-50P-2.54DSA (3x1)
ROUT4+ / ROUT4
SINGLE
ROUT4
DIFF
R170
(open)
R171
4.7K
TEST108
ROUT4-
R172
4.7K
C88
470p
R173
180
VOP-DAC-minus
C90
3900p
R175
(open)
C91
(open)
2
3
ROUT4+
R177
4.7K
A
R178
180
R179
4.7K
NJM5532
U12A
SINGLE
ROUT4
1
DIFF
C93
JP50
HIF3G-50P-2.54DSA (3x1)
ROUT4
R176
(short)
J14
MR-552LS
VOP-DAC-plus
A
Title
Size
A2
Date:
4
3
ROUT4
C92
(open)
470p
-71-
5
C
ROUT3
C78
(open)
8
3
+
TEST28
2
3
1
R149
4.7K
+
ROUT4+ / ROUT4
ROUT3
LOUT3
ROUT3
+
TEST26
2
3
1
DIFF
+
C80
22u
J11
MR-552LS
LOUT3
470p
4
TEST25
LOUT4+ / LOUT4
R143
(short)
C71
(open)
8
R152
(open)
JP41
HIF3G-50P-2.54DSA (3x1)
LOUT3
VOP-DAC-plus
C72
4
ROUT3-
C
C75
22u
DIFF
8
ROUT3-
JP43
HIF3G-50P-2.54DSA (2x1)
R145
180
R146
4.7K
SINGLE
+
TEST24
ROUT3-
R144
4.7K
SINGLE
LOUT3
7
TEST206
+
R147
(open)
4
+
5
LOUT3+
NJM5532
U11B
+
C73
22u
6
-
ROUT3+ / ROUT3
C70
(open)
+
TEST23
VOP-DAC-minus
C69
3900p
R142
(open)
C67
470p
R140
180
-
R141
(open)
ROUT3+ / ROUT3
LOUT3-
R139
4.7K
+
LOUT3-
TEST105
-
LOUT3-
C68
22u
+
LOUT3-
JP40
HIF3G-50P-2.54DSA (2x1)
-
TEST22
2
AKD4614-A
Document Number
Rev
ANALOG OUTPUT RCA-3 / RCA-4
Tuesday, October 07, 2008
1
Sheet
5
of
12
2
4
LOUT5
R181
(open)
R182
4.7K
ROUT5-
C
JP55
HIF3G-50P-2.54DSA (2x1)
ROUT5-
C103
22u
R196
(open)
TEST33
LOUT6+ / LOUT6
JP54
HIF3G-50P-2.54DSA (3x1)
ROUT5+ / ROUT5
C108
22u
R202
(open)
LOUT6B
JP58
HIF3G-50P-2.54DSA (2x1)
LOUT6-
C110
22u
R208
(open)
TEST35
ROUT6+ / ROUT6
C115
22u
R213
(open)
ROUT6-
ROUT6-
JP61
HIF3G-50P-2.54DSA (2x1)
ROUT6-
C117
22u
R218
(open)
DIFF
4
JP53
HIF3G-50P-2.54DSA (3x1)
LOUT5
R187
(short)
J15
MR-552LS
LOUT5
2
3
1
ROUT5
2
3
1
LOUT6
2
3
1
ROUT6
2
3
1
C100
470p
R193
4.7K
ROUT5-
R194
4.7K
C102
470p
R195
180
VOP-DAC-minus
C104
3900p
R197
(open)
C105
(open)
2
3
ROUT5+
R199
4.7K
R200
180
R201
4.7K
NJM5532
U13A
SINGLE
ROUT5
1
DIFF
JP56
HIF3G-50P-2.54DSA (3x1)
ROUT5
R198
(short)
J16
MR-552LS
C
ROUT5
C106
(open)
VOP-DAC-plus
C107
470p
TEST211
JP57
HIF3G-50P-2.54DSA (3x1)
LOUT6+ / LOUT6
SINGLE
LOUT6
DIFF
R203
(open)
R204
4.7K
TEST111
LOUT6-
R205
4.7K
C109
470p
R206
180
VOP-DAC-minus
C111
3900p
R209
(open)
C112
(open)
6
5
LOUT6+
R210
4.7K
R211
180
R212
4.7K
NJM5532
U14B
SINGLE
LOUT6
7
DIFF
JP59
HIF3G-50P-2.54DSA (3x1)
LOUT6
R207
(short)
J17
MR-552LS
B
LOUT6
C113
(open)
VOP-DAC-plus
C114
470p
TEST212
JP60
HIF3G-50P-2.54DSA (3x1)
ROUT6+ / ROUT6
ROUT6
SINGLE
DIFF
R214
(open)
R215
4.7K
TEST112
ROUT6-
R219
(open)
R216
4.7K
C116
470p
R217
180
VOP-DAC-minus
C118
3900p
C119
(open)
2
3
ROUT6+
A
R221
4.7K
R222
180
R223
4.7K
NJM5532
U14A
SINGLE
ROUT6
1
DIFF
C121
JP62
HIF3G-50P-2.54DSA (3x1)
ROUT6
R220
(short)
J18
MR-552LS
VOP-DAC-plus
A
Title
Size
A2
Date:
4
3
ROUT6
C120
(open)
470p
-72-
5
LOUT5
C99
(open)
VOP-DAC-plus
ROUT5
+
TEST36
SINGLE
LOUT5
7
DIFF
TEST110
+
ROUT6+ / ROUT6
R189
180
R190
4.7K
NJM5532
U13B
SINGLE
+
TEST34
LOUT6-
R188
4.7K
R192
(open)
+
LOUT6+ / LOUT6
LOUT5+
+
TEST32
ROUT5-
5
4
R191
(open)
6
TEST210
+
C101
22u
R186
(open)
C98
(open)
8
ROUT5+ / ROUT5
VOP-DAC-minus
C97
3900p
4
TEST31
ROUT5+ / ROUT5
R184
180
8
R185
(open)
R183
4.7K
4
LOUT5-
LOUT5-
8
C96
22u
+
JP52
HIF3G-50P-2.54DSA (2x1)
D
C95
470p
-
LOUT5-
TEST109
+
TEST30
LOUT5-
+
D
8
+
JP51 SINGLE
HIF3G-50P-2.54DSA (3x1)
LOUT5+ / LOUT5
DIFF
-
R180
(open)
1
TEST209
+
C94
22u
-
LOUT5+ / LOUT5
2
+
TEST29
LOUT5+ / LOUT5
3
-
5
2
AKD4614-A
Document Number
Rev
ANALOG OUTPUT RCA-5 / RCA-6
Tuesday, October 07, 2008
1
Sheet
6
of
12
2
5
4
3
VDD
R224
R225
10k
10pin-MCLK
DIR-AK4114-MCKO1
AK4614-XTI/MCKI
R37
10k
JP63
HIF3G-50P-2.54DSA (4x2)
BNC
10-pin
DIR
DIT
1
AK4614-TVDD1
R36
10k
EXT-MCLK
2
10k
U15
4
1A1
1B1
13
AK4614-XTI / MCKI
AK4614-PDN-SW3
5
1A2
1B2
12
AK4614-PDN
AK4614-MCKO-Buffer
6
2A1
2B1
11
7
2A2
2B2
10
2
1DIR
3
2DIR
15
1OE
14
2OE
1
VCCAVCCB
16
8
GND
9
DIT-AK4114-MCKO1
D
VDD
C122
0.1u
GND
AK4614-MCKO
D
AK4614-TVDD1
C123
0.1u
74AVC4T245
R226
10k
JP64
HIF3G-50P-2.54DSA (4x2)
R228
10k
DIR-AK4114-BICK
4
1A1
1B1
13
AK4614-BICK
5
1A2
1B2
12
AK4614-LRCK
6
2A1
2B1
11
7
2A2
2B2
10
2
1DIR
AK4614-BICK
DIT-AK4114-BICK
JP66
HIF3G-50P-2.54DSA (4x2)
AK4614-LRCK-Buffer
VDD
BNC
10-pin
DIR
DIT
EXT-LRCK
10pin-LRCK
DIR-AK4114-LRCK
R229
10k
U16
BNC
10-pin
DIR
DIT
EXT-BICK
10pin-BICK
C
R227
10k
AK4614-BICK-Buffer
Slave
Master
JP65
HIF3G-50P-2.54DSA (3x1)
AK4614-Master/Slave
AK4614-LRCK
DIT-AK4114-LRCK
VDD
C124
0.1u
3
2DIR
15
1OE
14
2OE
C
1
VCCAVCCB
16
8
GND
9
GND
AK4614-TVDD1
C125
0.1u
74AVC4T245
JP67
HIF3G-50P-2.54DSA (4x2)
AK4614-MCKO-Buffer
J19
MR-552LS
DIR-AK4114-XTI
10pin-MCLK
2
3
1
EXT-MCLK
DIR-AK4114-XTI
GND
DIT-AK4114-MCKO1
BNC
10-pin
CODEC
DIT
10pin-BICK
AK4614-BICK-Buffer
THR
JP68
HIF3G-50P-2.54DSA (2x1)
VDD
10pin-BICK
U17A
1
JP70
HIF3G-50P-2.54DSA (4x2)
EXT-BICK
R230
51
R231
51
MCLK
EXT-MCLK
R232
51
DIR-AK4114-BICK
74AC14
JP69
HIF3G-50P-2.54DSA (3x1)
BICK-THR/INV
14
10pin-MCLK
2
PORT1
A1-10PA-2.54DSA
INV
BICK
7
BNC
10-pin
CODEC
DIT
EXT-MCLK
R233
10pin-LRCK
51
LRCK
DIR-AK4114-BICK
DIT-AK4114-BICK
J20
MR-552LS
JP71
HIF3G-50P-2.54DSA (4x2)
B
BNC
10-pin
CODEC
DIT
EXT-LRCK
10pin-LRCK
AK4614-LRCK-Buffer
DIR-AK4114-LRCK
2
3
1
EXT-BICK
R234
R235
R236
R237
220k
220k
220k
220k
1
3
5
7
9
2
4
6
8
10
OUTPUT
B
EXT-BICK
GND
JP72
HIF3G-50P-2.54DSA (2x1)
DIR-AK4114-LRCK
DIT-AK4114-LRCK
R238
51
DIT-AK4114-XTI
DIR-AK4114-MCKO1
R239
51
JP75
HIF3G-50P-2.54DSA (4x2)
BNC
10-pin
CODEC
DIR
EXT-BICK
10pin-BICK
AK4614-BICK-Buffer
U17D
9
74AC14
8
U17E
11
74AC14
14
14
U17C
5
74AC14
6
7
74AC14
14
JP74
HIF3G-50P-2.54DSA (2x1)
4
10
7
GND
VDD
U17B
3
7
EXT-LRCK
14
2
3
1
7
AK4614-MCKO-Buffer
EXT-LRCK
DIT-AK4114-BICK
U17F
13
DIT-AK4114-BICK
74AC14
DIR-AK4114-BICK
14
10pin-MCLK
DIT-AK4114-XTI
12
7
BNC
10-pin
CODEC
DIR
VDD
J21
MR-552LS
JP73
HIF3G-50P-2.54DSA (4x2)
EXT-MCLK
JP76
HIF3G-50P-2.54DSA (4x2)
BNC
10-pin
CODEC
DIR
EXT-LRCK
A
10pin-LRCK
AK4614-LRCK-Buffer
DIT-AK4114-LRCK
A
DIT-AK4114-LRCK
DIR-AK4114-LRCK
-73-
Title
Size
A2
Date:
5
4
3
2
AKD4614-A
Document Number
Rev
2
DIGITAL INPUT OUTPUT1
Tuesday, October 07, 2008
1
Sheet
7
of
12
5
4
3
2
1
U18
SDTO
DIR-AK4114-SDTO
SDTO
2
A1
Y1
18
SDTO
3
A2
Y2
17
SDTI6
SDTI5
4
A3
Y3
16
5
A4
Y4
15
SDTI4
6
A5
Y5
14
SDTI3
7
A6
Y6
13
SDTI2
8
A7
Y7
12
SDTI1
9
A8
Y8
11
D
VDD
C126
1
/OE1
19
/OE2
20
VCC
10
0.1u
D
GND
74LVC541
R245
R244
10k
R243
10k
10k
R242
R241
10k
10k
R240
10k
U19
C
AK4614-SDTI6
3
AK4614-SDTI5
4
AK4614-SDTI4
AK4614-SDTI3
JP206
HIF3G-50P-2.54DSA (3x2)
SDTI6
DIR
10pin
GND
B1
21
A2
B2
20
5
A3
B3
19
6
A4
B4
18
JP205
HIF3G-50P-2.54DSA (3x2)
AK4614-SDTI2
7
A5
B5
17
SDTI5
AK4614-SDTI1
8
A6
B6
16
9
A7
B7
15
10
A8
B8
14
2
DIR
22
OE
1
VCCAVCCB
24
11
GND VCCB
23
12
GND
13
AK4614-TVDD1
C127
0.1u
A1
SDTI1
SDTI2
51
PORT3
A1-10PA-2.54DSA
2
4
6
7
8
9
10
SDTI6 1
3
SDTI5 5
SDTI4
C
OUTPUT
R250
51
R249
51
GND
JP204
HIF3G-50P-2.54DSA (3x2)
SDTI4
GND
DIR
10pin
GND
R251
GND
DIR
10pin
GND
SDTI3
VDD
C128
GND
JP203
HIF3G-50P-2.54DSA (3x2)
0.1u
SDTI3
74AVC8T245
DIR
10pin
GND
SDTI4
R248
51
SDTI2 5
SDTI1
JP202
HIF3G-50P-2.54DSA (3x2)
SDTI2
DIR
10pin
GND
SDTI5
PORT2
A1-10PA-2.54DSA
2
4
6
7
8
9
10
SDTI3 1
3
GND
OUTPUT
R247
51
R246
51
GND
JP201
HIF3G-50P-2.54DSA (3x2)
SDTI1
DIR
10pin
GND
SDTI6
GND
B
B
JP207
HIF3G-50P-2.54DSA (3x2)
DIT-AK4114-DAUX
SDTO3
SDTO2
SDTO1
SDTO
SDTO
R254
10k
R253
10k
R252
10k
U20
4
AK4614-SDTO3
1A1
1B1
13
R257
51
SDTO2
51
SDTO1
AK4614-SDTO2
5
1A2
1B2
12
R256
AK4614-SDTO1
6
2A1
2B1
11
R255
7
2A2
2B2
10
2
1DIR
A
AK4614-TVDD1
C129
0.1u
51
PORT4
A1-10PA-2.54DSA
2
4
6
8
10
SDTO3 1
3
5
7
9
TEST37
DZF1/OVF1
TEST38
DZF2/OVF2
AK4614-DZF1 / OVF1
OUTPUT
AK4614-DZF2 / OVF2
3
2DIR
15
1OE
14
2OE
A
1
VCCAVCCB
16
8
GND
9
GND
VDD
C130
0.1u
74AVC4T245
-74-
Title
Size
A2
Date:
5
4
3
2
AKD4614-A
Document Number
Rev
2
DIGITAL INPUT OUTPUT2
Tuesday, October 07, 2008
1
Sheet
8
of
12
5
4
3
2
1
D
D
VDD
AK4614-TVDD2
R258
PORT5
A1-10PA-2.54DSA
CSN
10
9
8
7
CCLK / SCL
6
5
CDTI / SDA
4
3
CDTO / SDA
2
1
10k
R259
R260
10k
R261
10k
R262
1k
10k
R263
10k
U21
(ACK)
uP-I/F
I2C
4-wire
R264
470
4
1A1
1B1
13
R265
470
5
1A2
1B2
12
R266
470
6
2A1
2B1
11
AK4614-CDTI / SDA / SDA (ACK)
7
2A2
2B2
10
AK4614-CDTO
2
1DIR
1
VCCAVCCB
16
8
GND
9
JP92
HIF3G-50P-2.54DSA (3x1)
AK4614-4-wire/I2C
VDD
C131
3
2DIR
15
1OE
14
2OE
0.1u
GND
AK4614-CSN
AK4614-CCLK / SCL
AK4614-TVDD2
C132
0.1u
74AVC4T245
AK4614-TVDD2
R267
10k
R268
(open)
C
C
U22
VDD
C133
0.1u
4
1A1
1B1
13
5
1A2
1B2
12
6
2A1
2B1
11
7
2A2
2B2
10
2
1DIR
1
VCCAVCCB
16
8
GND
9
3
2DIR
15
1OE
14
2OE
GND
AK4614-TVDD2
C134
0.1u
74AVC4T245
JP93
HIF3G-50P-2.54DSA (3x1)
CDTO / SDA (ACK)
CDTO
R269
(short)
SDA (ACK)
R270
(short)
B
B
A
A
-75-
Title
Size
A2
Date:
5
4
3
2
AKD4614-A
Document Number
DIGITAL INPUTSheet
OUTPUT3
9
of
Tuesday, October 07, 2008
1
Rev
2
12
5
4
3
2
1
L2
VA
+12V-->+3.3V
(short)
T2
LT1963AEST-3.3
AGND
AGND
C172
+12V
VOPPLUS
T-45(R)
+3.3V
AVDD2
+3.3V
AVDD1
+3.3V
TVDD2
+3.3V
TVDD1
+1.8V
DVDD
+3.3V
VDD
DGND
T-45(R)
T-45(R)
T-45(R)
T-45(R)
T-45(R)
T-45(R)
T-45(BK)
AGND
VOPminus
VOPplus
AVDD2
AVDD1
TVDD2
TVDD1
DVDD
1
1
1
(Short)
L16
AGND
T-45(R)
1
AVDD2
47u
AVDD2
JACK
-12V
VOPMINUS
T-45(BK)
AK4614-AVDD2
1
0.1u
C162
AGND
R287
1
0.1u
AGND AGND
D
+
C161
(short)
1
47u
C160
JP101
HIF3G-50P-2.54DSA (3x1)
REG
3
1
+
OUT
2
C159
IN
1
L15
1
GND
L4
(short)
1
VOPplus
VDD
DGND
D
(short)
+
47u
JP100
HIF3G-50P-2.54DSA (2x1)
AGND
L13
JP99
HIF3G-50P-2.54DSA (3x1)
REG
(short)
AVDD1
GND
R286
AK4614-AVDD1
AVDD1
JACK
AGND
(Short)
DGND
L14
C171
(short)
+
47u
+12V-->+3.3V
AGND
T4
LT1963AEST-3.3
L11
1
C173
+
47u
C174
IN
OUT
+
C175
0.1u
0.1u
AGND AGND
AGND
AGND
JP98
HIF3G-50P-2.54DSA (3x1)
REG
3
2
(short)
GND
L18
(short)
C176
TVDD2
47u
R285
AK4614-TVDD2
TVDD2
JACK
(Short)
L12
AGND
C170
C
(short)
+
C
47u
R281
L8
VOP-ADC-plus
(short)
AGND
(Short)
L7
R282
VOP-DAC-plus
JP97
HIF3G-50P-2.54DSA (3x1)
REG
(short)
(Short)
R280
AK4614-TVDD1
TVDD1
JACK
TVDD1
(Short)
VOPminus
L9
R283
L10
VOP-ADC-minus
47u
(short)
C168
47u
(Short)
+
C169
(short)
+
R284
VOP-DAC-minus
AGND
(Short)
AGND
+3.3V-->+1.8V
T3
LT1963AEST-1.8
L3
L5
C163
+
47u
3
OUT
+
C165
0.1u
AGND
B
IN
C164
2
(short)
GND
1
0.1u
AGND
AGND
AGND
REG
(short)
C166
JACK
DVDD
47u
JP96
HIF3G-50P-2.54DSA (3x1)
DVDD
R279
AK4614-DVDD
(Short)
L6
AGND
C167
+
B
(short)
47u
for OP275GPZ (U3,4,5,6,7,8)
AGND
VOP-ADC-plus
+
+
+
+
+
L17
+
REG
(short)
C181
C182
C183
C184
C185
C186
C187
C188
C189
C190
C191
C192
10u
0.1u
10u
0.1u
10u
0.1u
10u
0.1u
10u
0.1u
10u
0.1u
JACK
VDD
JP102
HIF3G-50P-2.54DSA (3x1)
R288
VDD
VDD
(Short)
L19
for OP275GPZ (U3,4,5,6,7,8)
VOP-ADC-minus
C180
+
+
+
+
+
+
C194
C195
C196
C197
C198
C199
C200
C201
C202
C203
C204
10u
0.1u
10u
0.1u
10u
0.1u
10u
0.1u
10u
0.1u
10u
0.1u
C178
C179
0.1u
0.1u
0.1u
(short)
+
for
for
for
DGND 74HC14 74AC14 74AC14
(U17)
(U24)
(U25)
47u
C193
C177
DGND
for OP275GPZ (U9,10,11,12,13,14,101,102,103,104,105,106,107,108,109,110,111,112)
VOP-DAC-plus
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
A
A
C205
C206
C207
C208
C209
C210
C211
C212
C213
C214
C215
C216
C301
C302
C303
C304
C305
C306
C307
C308
C309
C310
C311
C312
C313
C314
C315
C316
C317
C318
C319
C320
C321
C322
C323
C324
10u
0.1u
10u
0.1u
10u
0.1u
10u
0.1u
10u
0.1u
10u
0.1u
10u
0.1u
10u
0.1u
10u
0.1u
10u
0.1u
10u
0.1u
10u
0.1u
10u
0.1u
10u
0.1u
10u
0.1u
10u
0.1u
10u
0.1u
10u
0.1u
for OP275GPZ (U9,10,11,12,13,14,101,102,103,104,105,106,107,108,109,110,111,112)
VOP-DAC-minus
+
+
+
-76-
+
+
Title
+
+
+
+
+
+
+
+
+
+
+
+
+
C217
C218
C219
C220
C221
C222
C223
C224
C225
C226
C227
C228
C325
C326
C327
C328
C329
C330
C331
C332
C333
C334
C335
C336
C337
C338
C339
C340
C341
C342
C343
C344
C345
C346
C347
C348
10u
0.1u
10u
0.1u
10u
0.1u
10u
0.1u
10u
0.1u
10u
0.1u
10u
0.1u
10u
0.1u
10u
0.1u
10u
0.1u
10u
0.1u
10u
0.1u
10u
0.1u
10u
0.1u
10u
0.1u
10u
0.1u
10u
0.1u
10u
0.1u
Size
A2
Date:
5
4
3
2
AKD4614-A
Document Number
Power Supply
Tuesday, October 07, 2008
1
Sheet
Rev
2
12
of
12
-77-
-78-
-79-
-80-
Similar pages