AKD8141 ＆ AK811x ver.2 Evaluation Board for AK8141 & 811x AKD8141_811x ver.2 For AK811x evaluation Description AKD8141_8111x _Evaluation Board is a common evaluation board for the ICs; AK8141 and AK8111x series. Ordering Information AKD8141_811x ◆ Device type １） AK8141 2) AK811x ※PKG type : 6SON (2.0x1.6mm) 6USON (2.0x1.８mm) 6USON (1.4x1.4mm) Configuration Block Diagram AK8141_811x Evaluation Board AKD8141_811x-E-00 Nov-10 -1- AKD8141_811x Functions 1. Power supply OSC 2. Clock input AK8141 AK811x AK811x (6USIN 1.4x1.4mm) AK8141_811x (6USIN 2.0x1.8mm or6SON ) 3. Clock output Figure 1. AKD8141_811x top view Circuit Diagram is attached in last page. ※ AK8141 Settings This manual only refer to AK811x evaluation. Please refer to AK8141 Datasheet and another manual for AK8141 evaluation. Nov-10 AKD8141_811x-E-00 -2- The brand name of AKM’s IC’s AKD8141_811x 1. Power Supply Please connect the lead line to VDD (3.3V; Red) and VSS (GND; Black). When using a crystal oscillator as an input, please supply 3.3V to VDD_OSC PAD (Orange) too. 2. Clock Input It is possible to input the clock from Crystal oscillator (DIP 8 pin compatible type or SMD type) and external clock from SMA-A connector. SMA-A Crystal Unit Y1-4: 2520 type crystal oscillator mountable. Clock output from crystal oscillator selected by setting “OE1-4 STANBY”. connector is is 8pin DIP socket “OE1-4 STANBY”=H: Clock output from Crystal oscillator is enabled “OE1-4 STANBY”=L: Oscillation stop Crystal oscillator U1-4: 8pin DIP compatible type crystal oscillator is available here. Figure.2 Clock Input External Clock U5-8: It is possible to input clock from SMA-A connector. R6.8.10.12 need to be connected, when using clock from SMA-A connector. 3. Clock output Clock output from AK8141_811x leads to each connector. Spectrum Analyzer or Oscilloscope is available to measure clock performances by connecting here. There are dummy capacitor loads, C5, C10, C15, and C20 beside each IC clock output. It is useful to measure clock performance or current consumption by loading capacitor which is virtually assumed in the system. A clock outputs from AK8141 and 811x lead to J1-4. Chassis mount test jacks for miniature probe (Tektronix 131-0258-00) are available by mounting there. IC GND OUTPUT Figure.3 Clock Output 4. AK811x Settings ・Clock output enable ”SW0x OE” enables each IC clock output. “SW0x OE”=H: Clock output from Crystal oscillator is enabled “SW0x OE”=L: Oscillation stop (x= 2, 4, 6) H : VDD M : OPEN L : GND Figure.4 Switch (SW0x_OE, SW0x_FSEL) ・Clock output Frequency settings ”SW0x FSEL” select output frequency of each IC (AK811x). Please refer to AK811x datasheet to see each IC output frequency. (x= 3, 5, 7) AKD8141_811x-E-00 Nov-10 -3- 1 3 4 5 6 7 8 9 10 AK8141 Evaluation_Board_Ver.2 VDD_OSC_Pad J VDD_Pad Pad1 TP_VSS TP_VDD 1 TP_OSC J VSS_Pad Pad2 1 1 Pad3 1 AKEMD. 2 TP01 I VDD_OSC 1 SW_ OE3 VDD_OSC 1 SW_ OE2 VDD_OSC SW_ OE1 VDD_OSC 1 1 4 3 1 4 1 4 + C1 22uF 2 3 3 TP01 + C2 22uF VDD_OSC 1 2 2 2 3 TP01 I VDD_OSC VDD_OSC SW_ OE4 1 4 VDD_OSC VDD 1 1 VDD_OSC STANBY VDD R8 MXO-50B 2 5 OUT R7 50 VDD_OSC 2 3 4 3 1 DIP-8pinSocket VDD_OSC DIP-8pinSocket SW_ 1 2 TP01 VDD_OSC 2 3 F VDD 1 2 3 SW03 4 3 2 1 VDD 1 TP01 SW05 PIC_S1 1 1 SW_ 1 811x_CKIN1 1 SW07 1 1 TP01 SW_ 8141_CKIN 1 1 SW_ F 811x_CKIN2 811x_FSEL1 2 3 3 IC5 S1 S2 S3 VDD 811x_FSEL2 VDD G SW_ PIC_S2 1 811x_FSEL3 811x_CKIN3 PIC_S3 3 CKIN GND 7 8 6 6 3 2 NC GND 0.1uf 7 GND3 4 OUT R9 VDD 5 C6 SW_ 1 R6 1 CKIN 50 VDD_OSC 4 7 6 6 3 3 8 1 7 VDD NC GND 0.1uf 2 GND3 4 OUT R11 50 2 5 C11 3 GND2 SMA 0 1 CKIN U5 FCXO-05 U1 2 GND1 GND OUTPUT VDD_OSC GND4 5 0 DIP-8pinSocket DIP-8pinSocket H Y1 2 3 R10 4 7 8 6 6 3 3 7 2 VDD 1 NC GND 0.1uf 2 GND3 4 R13 50 GND4 5 5 C16 C7 0.1uf GND3 4 2 3 2 GND1 U6 SMA 1 CKIN OUT MXO-50B 2 0 4 7 8 6 6 3 3 7 VDD NC 1 2 0.1uf 2 G VDD_OSC GND4 5 R12 1 C21 3 GND2 GND OUTPUT SMA 0.1uf MXO-50B GND4 5 0 U7 U3 VDD_OSC 2 3 SMA 2 3 MXO-50B 2 GND1 U8 U4 VDD_OSC 3 GND2 GND OUTPUT H C12 2 GND1 U2 Y2 3 GND2 FCXO-05 STANBY VDD Y3 FCXO-05 GND OUTPUT C17 0.1uf STANBY VDD C22 0.1uf STANBY VDD Y4 FCXO-05 C23 811x_OE2 PIC12F683 VDD SW_ TP01 1 VDD 3 TP01 C13 0.1uf 0.01uf WR Start OE VDD VSS C LKO U T R1 1 1 2 3 3.3k VDD C24 1 2 2 D 3 3 TP01 IC2_VSS TP01 1 0.1uf C8 IC1_VSS 0.01uf 1 TP01 0.1uf 1 C4 C3 0.1uf 0.01uf P_SW 1 C 0 R2 0 0 0 C15 0 C10 TP01 IC3_CLKOUT TP01 VSS_TP3 con1 TP01 VSS_TP2 con1 J4 C5 TP_01 1 1 IC4_CLKOUT1 VSS_TP4 R3 0 1 TP_01 R4 TP_01 1 C20 1 1 1 C9 R5 B VDD 1 2 3 4 C14 0 0 TP_01 TP_01 AK8141 IC2_CLKOUT TP01 con1 VSS_TP1 J1 J2 1 1 B con1 J3 1 TP01 AK8141_CLKOUT 1 C C L K IN FSEL OE TP01 IC3_VSS 0.01uf XLAT 1 1 SCLK TP_01 SDA 1 IC1 3 1 0.1uf 1 C18 1 2 IC2 AK811x IC1_VDD 1 IC4_VSS IC2_VDD E TP01 SW01 VDD VSS C LKO U T C L K IN FSEL OE TP01 1 C19 VDD VSS C LKO U T IC3_VDD VDD 1 2 3 IC4_VDD TP01 VDD 1 2 3 D IC3 AK811x SW 1 6 5 4 6 5 4 6 5 4 C L K IN FSEL OE VDD VSS C LKO U T VDD TP01 AK811x 8141_OE 2 3 IC4 VDD 1 2 3 SW02 5 6 7 8 SW04 C L K IN XLAT SC LK SDATA SW_ TP01 8 7 6 5 VDD 1 2 1 SW06 1 SW_ TP01 E 1 1 S S X V 811x_OE1 DA CL LAT SS 0.1uf 811x_OE3 Title AK8141_Evaluation_Board_Ver.2 A Size A3 Date: 1 2 3 4 5 6 7 8 A Document Number <Doc> Monday, July 14, 2008 9 Rev <RevCode> Sheet 1 of 10 1