AK8133E

AKD8133
Evaluation Board for AK8133
AKD8133
Ordering guide
Description
The AKD8133 is an evaluation board for AK8133
clock generator. Therefore, it is easy to evaluate
the jitters and XO performance.
4 types of boards are prepared depending on
crystal foot pattern.

AKD8133_X
X: Crystal type
N: Non Crystal
A: 49 Surface mount type
B: 5032 2 terminal
C: 3225 2 terminal
D: 3225 4 terminal
Block Diagram
VDD
VSS
CLK1
CLK2
S0-S3
4
AK8133
CLK3
CLK4
REFOUT
AK811x
AK8133 Evaluation Board
AKD0930-E-02
Sep-09
-1-
AKD8133
Functions
4.Crystal Unit
1.Power
2DIPSW
5.AK811x
Figure 1. AKD8133 top view
3. Dummy capacitor
1. Power Supply
Please connect the lead line to VDDPAD (3V) and VSSPAD (GND).
2. DIPSW Setting
DISPSW6-10 are connected to the mode setting pins of AK8133 and AK811x.
If these pins are controlled with general-purpose port, microprocessor or other methods, please keep these
pins “open”.
SWn
SWn
GND
(LO)
OPEN
SWn
VDD
(HIGH)
Table2.1 Dip Switch Connection
SW
SW6
SW7
SW8
SW9
SW10
Connect to:
AK8133 Pin2(S0)
AK8133 Pin3(S1)
AK8133 Pin14(S3)
AK811x Pin5
AK8133 Pin4(S2)
Sep-09
AKD0930-E-02
-2-
AKD8133
Table2.2 CLK1 Output Frequency
Selection Pin
Output Frequency(MHz)
SW8 (S3/Pin14) J10 (CLK1/Pin 7)
L
36.864
H
24.576
Table2.3 CLK2-4 Clock output Frequency
Sampling
Frequency
(kHz)
48.0
44.1
32.0
192.0
88.2
96.0
64.0
16.0/22.05
Selection Pin
Clock Output Frequency (MHz)
SW10
SW7
SW6
(S2/Pin 4)
(S1/Pin3)
(S0/Pin 2)
L
L
L
L
H
H
H
H
L
L
H
H
L
L
H
H
L
H
L
H
L
H
L
H
J11
256fs
(CLK2/Pin 8)
12.288
11.2896
8.192
49.152
22.5792
24.576
16.384
4.096
J9
384fs
(CLK3/Pin10)
18.432
16.9344
12.288
73.728
33.8688
36.864
24.576
8.4672
J8
(CLK4/Pin11)
33.8688
33.8688
33.8688
33.8688
33.8688
33.8688
33.8688
16.9344
3. Dummy capacitor loads
There are several dummy capacitor loads, C23 through C27. It is useful to measure clock performance or
current consumption by loading capacitor which is virtually assumed in the system. It is important to take line
capacitance into account and it is approximately 5pF. Consequently if there is 25pF capacitance assumed in
the system, another 20pF capacitor needs to be mounted. Each clock outputs from AK8133 lead to J8 through
J12. Chassis mount test jacks for miniature probe (Tektronix 131-0258-00) are available by mounting there.
Table1.2
Jn/Cn
J8/C8
J9/C9
J10/C10
J11/C11
J12/C12
Connect to:
AK8133 Pin11
AK8133 Pin10
AK8133 Pin7
AK8133 Pin8
AK8133 Pin9
4. Quartz oscillator foot pattern
There are 4 types of boards depending on quartz oscillator. C17 and C18 are the load capacitance for
crystal unit. In case of external clock input, please remove these capacitors.
5. AK811x foot pattern
It is possible to mount AK811x series 1ch-PLL on this board.
Sep-09
AKD0930-E-02
-3-
AKD8133
Jitter measurement
Device:AK8133E
Condition: S2/S1/S0=HHH, Dummy capacitor=0pF
Sep-09
AKD0930-E-02
-4-
3
AK813x Series, Evaluation Board.
2
3
D
3
TP
1
SW7
S1
2
3
TP
1
SW8
S2
2
1
1
SW9
S0
2
3
T PS5
VDD2
1
1
SW6
S0
2
T PS6
VDD3
VDD11
TP
D
VDD3
U4
C15
0.1u
C17
cap
C22
C18
cap
1
2
3
0.1u
[no mount]
6
5
4
VDD
CLKIN
VSS
FSEL
CLKOUT
OE
AK811x
VDD2
CRYST AL/SM
Clock out 11x
1
2
3
4
5
6
7
8
TP
VDD1
VSS8
C12
1
C14
C_filter
0.1u
XOUT
S0
S1
S2
VDD1
GND1
CLK1
CLK2
XIN
VDD3
S3
VDD2
GND2
CLK4
CLK3
REFOUT
16
15
14
13
12
11
10
9
VSS9
C13
0.1u
1
1
U3
R_filter
VIN
C
Y2
T P_VIN1
1
TP
1
VDD11
R2
SW10
S1
2
3
TP
1
1
T P8
T PS8
VDD11
1
T PS7
VDD3
1
1
VSS11 VSS12 VSS13 VSS14
1
T PS9
1
4
1
5
T P15 CLK INPUT
C
1
AK8133
J13
JP8
1
2
1
B
B
VDDPad
JP6
1
1
NP
NP
con1
VSSPad
C25
1
NP
con1
C26
1
con1
JP5
1
NP
1
con1
con1
VDD_6
VDD_12
1
VDD_5
1
VDD_4
1
1
VSS10
NP
J8
C27
1
1
2
J9
2
JP7
2
C24
J12
2
C23
J11
2
1
J10
1
2
J14
2
2
A
A
VDD1
+
C20
22uF VDD2
+
C19
22uF VDD3
+
C21
+
22uF VDD11
C16
T itle
AK8133 Evaluation Board
22uF 10V
Size
A
Document Number
<Doc>
Rev
O
Tantalum Capacitor
Date:
5
4
3
T uesday, December 18, 2007
2
Sheet
1
of
1
1
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