Dual PNP General Purpose Transistor

NST3906DP6T5G
Dual General Purpose
Transistor
The NST3906DP6T5G device is a spin−off of our popular
SOT−23/SOT−323/SOT−563 three−leaded device. It is designed for
general purpose amplifier applications and is housed in the SOT−963
six−leaded surface mount package. By putting two discrete devices in
one package, this device is ideal for low−power surface mount
applications where board space is at a premium.
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Features
•
•
•
•
•
•
hFE, 100−300
Low VCE(sat), ≤ 0.4 V
Simplifies Circuit Design
Reduces Board Space
Reduces Component Count
This is a Pb−Free Device
(3)
(2)
(1)
Q1
Q2
(4)
(5)
(6)
NST3906DP6T5G
MAXIMUM RATINGS
Symbol
Value
Unit
Collector −Emitter Voltage
Rating
VCEO
−40
V
Collector −Base Voltage
VCBO
−40
V
Emitter −Base Voltage
VEBO
−5.0
V
IC
−200
mA
ESD
Class
2
B
Symbol
Max
Unit
PD
240
1.9
mW
mW/°C
RqJA
520
°C/W
PD
280
2.2
mW
mW/°C
RqJA
446
°C/W
Symbol
Max
Unit
PD
350
2.8
mW
mW/°C
RqJA
357
°C/W
PD
420
3.4
mW
mW/°C
Device
Package
Shipping†
Thermal Resistance, Junction-to-Ambient
(Note 2)
RqJA
297
°C/W
NST3906DP6T5G
SOT−963
(Pb−Free)
8000/Tape & Reel
Junction and Storage Temperature Range
TJ, Tstg
−55 to
+150
°C
Collector Current − Continuous
Electrostatic Discharge
HBM
MM
6
Characteristic (Single Heated)
Thermal Resistance, Junction-to-Ambient
(Note 1)
Total Device Dissipation TA = 25°C
Derate above 25°C (Note 2)
Thermal Resistance, Junction-to-Ambient
(Note 2)
Characteristic (Dual Heated) (Note 3)
Total Device Dissipation TA = 25°C
Derate above 25°C (Note 1)
Thermal Resistance, Junction-to-Ambient
(Note 1)
Total Device Dissipation TA = 25°C
Derate above 25°C (Note 2)
April, 2008 − Rev. 0
2
3
SOT−963
CASE 527AD
PLASTIC
MARKING DIAGRAM
1
FMG
G
F = Device Code
M = Date Code
G
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. FR−4 @ 100 mm2, 1 oz. copper traces, still air.
2. FR−4 @ 500 mm2, 1 oz. copper traces, still air.
3. Dual heated values assume total power is sum of two equally powered channels.
© Semiconductor Components Industries, LLC, 2008
4
1
THERMAL CHARACTERISTICS
Total Device Dissipation TA = 25°C
Derate above 25°C (Note 1)
5
1
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
Publication Order Number:
NST3906DP6/D
NST3906DP6T5G
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Symbol
Min
Max
Unit
Collector −Emitter Breakdown Voltage (Note 4) (IC = 1.0 mAdc, IB = 0)
V(BR)CEO
−40
−
V
Collector −Base Breakdown Voltage (IC = 10 mAdc, IE = 0)
V(BR)CBO
−40
−
V
Emitter −Base Breakdown Voltage (IE = 10 mAdc, IC = 0)
V(BR)EBO
−5.0
−
V
Collector Cutoff Current (VCE = 30 Vdc, VEB = 3.0 Vdc)
ICEX
−
−50
nA
60
80
100
60
30
−
−
300
−
−
−
−
−0.25
−0.4
−0.65
−
−0.85
−0.95
fT
250
−
MHz
Output Capacitance (VCB = −5.0 V, IE = 0 mA, f = 1.0 MHz)
Cobo
−
4.5
pF
Input Capacitance (VEB = −0.5 V, IE = 0 mA, f = 1.0 MHz)
Cibo
−
10.0
pF
Noise Figure (VCE = −5.0 V, IC = −100 mA, RS = 1.0 k Ω, f = 1.0 kHz)
NF
−
4.0
dB
Characteristic
OFF CHARACTERISTICS
ON CHARACTERISTICS (Note 4)
DC Current Gain
(IC = −0.1 mA, VCE = −1.0 V)
(IC = −1.0 mA, VCE = −1.0 V)
(IC = −10 mA, VCE = −1.0 V)
(IC = −50 mA, VCE = −1.0 V)
(IC = −100 mA, VCE = −1.0 V)
hFE
Collector −Emitter Saturation Voltage
(IC = −10 mA, IB = −1.0 mA)
(IC = −50 mA, IB = −5.0 mA)
VCE(sat)
Base −Emitter Saturation Voltage
(IC = −10 mA, IB = −1.0 mA)
(IC = −50 mA, IB = −5.0 mA)
VBE(sat)
−
V
V
SMALL−SIGNAL CHARACTERISTICS
Current −Gain − Bandwidth Product (IC = 10 mAdc, VCE = 20 Vdc, f = 100 MHz)
SWITCHING CHARACTERISTICS
Delay Time
(VCC = −3.0 V, VBE = 0.5 V)
td
−
35
Rise Time
(IC = −10 mA, IB1 = −1.0 mA)
tr
−
35
Storage Time
(VCC = −3.0 V, IC = −10 mA)
ts
−
250
Fall Time
(IB1 = IB2 = −1.0 mA)
tf
−
50
ns
ns
4. Pulse Test: Pulse Width ≤ 300 μs; Duty Cycle ≤ 2.0%.
0.35
350
IC/IB = 10
hFE, DC CURRENT GAIN (V)
VCE(sat), COLLECTOR−EMITTER
SATURATION VOLTAGE (V)
0.40
VCE(sat) = 150°C
0.30
0.25
0.20
25°C
0.15
0.10
−55°C
0.05
0
150°C (5.0 V)
300
150°C (1.0 V)
250
200
25°C (5.0 V)
150
100
25°C (1.0 V)
−55°C (5.0 V)
−55°C (1.0 V)
50
0
0.0001
1
0.001
0.01
0.1
IC, COLLECTOR CURRENT (A)
Figure 1. Collector Emitter Saturation Voltage vs.
Collector Current
0.0001
0.001
0.01
0.1
IC, COLLECTOR CURRENT (A)
Figure 2. DC Current Gain vs. Collector Current
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2
1
NST3906DP6T5G
0.9
VBE(on), BASE−EMITTER TURN−ON
VOLTAGE (V)
1.0
1.1
IC/IB = 10
−55°C
0.8
0.7
25°C
0.6
0.5
0.4 150°C
0.3
0.0001
0.001
0.01
0.1
0.9
−55°C
0.8
0.7
25°C
0.6
0.5
0.4 150°C
0.3
0.0001
0.001
0.01
0.1
1
IC, COLLECTOR CURRENT (A)
Figure 3. Base Emitter Saturation Voltage vs.
Collector Current
Figure 4. Base Emitter Turn−On Voltage vs.
Collector Current
9.0
100 mA
0.9
0.8
80 mA
0.7
60 mA
0.6
40 mA
0.5
0.4
0.3
20 mA
0.2
IC = 10 mA
0.0001
0.001
0.01
8.0
7.0
6.0
Cib
5.0
4.0
3.0
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
Ib, BASE CURRENT (A)
Veb, EMITTER BASE VOLTAGE (V)
Figure 5. Saturation Region
Figure 6. Input Capacitance
6.0
Cobo, OUTPUT CAPACITANCE (pF)
0.1
0
VCE = 2.0 V
1.0
IC, COLLECTOR CURRENT (A)
1.0
VCE(sat), COLLECTOR−EMITTER
SATURATION VOLTAGE (V)
1
Cibo, INPUT CAPACITANCE (pF)
VBE(sat), BASE−EMITTER
SATURATION VOLTAGE (V)
1.1
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
Cob
0
5.0
10
15
20
25
Vcb, COLLECTOR BASE VOLTAGE (V)
Figure 7. Output Capacitance
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3
30
4.5 5.0
NST3906DP6T5G
PACKAGE DIMENSIONS
SOT−963
CASE 527AD−01
ISSUE B
D
6
5
A
B
A
L
4
HE
E
1 2
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETERS
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD THICKNESS
IS THE MINIMUM THICKNESS OF BASE MATERIAL.
C
3
e
6X
C
b
0.08 C A
MILLIMETERS
MIN
NOM
MAX
0.34
0.37
0.40
0.10
0.15
0.20
0.07
0.12
0.17
0.95
1.00
1.05
0.75
0.80
0.85
0.35 BSC
0.05
0.10
0.15
0.95
1.00
1.05
DIM
A
b
C
D
E
e
L
HE
B
MIN
INCHES
NOM
MAX
0.004
0.003
0.037
0.03
0.006 0.008
0.005 0.007
0.039 0.041
0.032 0.034
0.014 BSC
0.002 0.004 0.006
0.037 0.039 0.041
SOLDERING FOOTPRINT*
0.35
0.014
0.35
0.014
0.90
0.0354
0.20
0.08
0.20
0.08
SCALE 20:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
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associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
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PUBLICATION ORDERING INFORMATION
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4
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For additional information, please contact your local
Sales Representative
NST3906DP6/D
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