DG211B, DG212B Datasheet

DG211B, DG212B
Vishay Siliconix
Improved Quad CMOS Analog Switches
DESCRIPTION
FEATURES
The DG211B, DG212B analog switches are highly improved
versions of the industry-standard DG211, DG212. These
devices are fabricated in Vishay Siliconix’ proprietary silicon
gate CMOS process, resulting in lower on-resistance, lower
leakage, higher speed, and lower power consumption.
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These quad single-pole single-throw switches are designed
for a wide variety of applications in telecommunications,
instrumentation, process control, computer peripherals, etc.
An improved charge injection compensation design
minimizes switching transients. The DG211B and DG212B
can handle up to ± 22 V, and have an improved continuous
current rating of 30 mA. An epitaxial layer prevents latchup.
All devices feature true bi-directional performance in the on
condition, and will block signals to the supply levels in the off
condition.
The DG211B is a normally closed switch and the DG212B is
a normally open switch. (see Truth Table.)
± 22 V supply voltage rating
TTL and CMOS compatible logic
Low on-resistance - RDS(on): 50 
Low leakage - ID(on): 20 pA
Single supply operation possible
Extended temperature range
Fast switching - tON: 120 ns
• Low charge injection - Q: 1 pC
BENEFITS
• Wide analog signal range
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Simple logic interface
Higher accuracy
Minimum transients
Reduced power consumption
Superior to DG211, DG212
• Space savings (TSSOP)
APPLICATIONS
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Industrial instrumentation
Test equipment
Communications systems
Disk drives
Computer peripherals
Portable instruments
Sample-and-hold circuits
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
DG211B
Dual-In-Line, SOIC and TSSOP
IN1
1
16
IN2
D1
2
15
D2
14
S2
S1
3
V-
4
13
V+
GND
5
12
VL
S4
6
11
S3
D4
7
10
D3
IN4
8
9
IN3
TRUTH TABLE
Logic
DG211B
DG212B
0
ON
OFF
1
OFF
ON
Logic “0” 0.8 V
Logic “1” 2.4 V
Top View
* Pb containing terminations are not RoHS compliant, exemptions may apply.
Document Number: 70040
S11-0179-Rev. J, 07-Feb-11
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1
DG211B, DG212B
Vishay Siliconix
ORDERING INFORMATION
Temp. Range
Package
16-Pin Plastic DIP
16-Pin Narrow SOIC
- 40 °C to 85 °C
16-Pin TSSOP
Standard Part Number
Lead (Pb)-free Part Number
DG211BDJ
DG212BDJ
DG211BDY
DG211BDY-T1
DG211BDJ-E3
DG212BDJ-E3
DG211BDY-E3
DG211BDY-T1-E3
DG212BDY
DG212BDY-T1
DG212BDY-E3
DG212BDY-T1-E3
DG211BDQ
DG211BDQ-T1
DG211BDQ-E3
DG211BDQ-T1-E3
DG212BDQ
DG212BDQ-T1
DG212BDQ-E3
DG212BDQ-T1-E3
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C, unless otherwise noted)
Parameter
Limit
Voltages Referenced, V+ to V-
Unit
44
GND
25
Digital
Inputsa,
VS, VD
Current (Any terminal)
30
Peak Current, S or D (Pulsed at 1 ms, 10 % duty cycle max.)
100
Storage Temperature
mA
- 65 to 125
c
Power Dissipation (Package)b
V
(V-) - 2 to (V+) + 2
or 30 mA, whichever occurs first
16-Pin Plastic DIP
470
16-Pin Narrow SOIC and TSSOPd
640
°C
mW
Notes:
a. Signals on SX, DX, or INX exceeding V+ or V- will be clamped by internal diodes. Limit forward diode current to maximum current ratings.
b. All leads welded or soldered to PC board.
c. Derate 6.5 mW/°C above 75 °C.
d. Derate 7.6 mW/°C above 75 °C.
SCHEMATIC DIAGRAM (Typical Channel)
V+
SX
VL
Level
Shift/
Drive
INX
VV+
DX
GND
V-
Figure 1.
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Document Number: 70040
S11-0179-Rev. J, 07-Feb-11
DG211B, DG212B
Vishay Siliconix
SPECIFICATIONS
Parameter
Analog Switch
Analog Signal Ranged
Drain-Source
On-Resistance
RDS(on) Match
Symbol
Test Conditions
Unless Otherwise Specified
V+ = 15 V, V- = - 15 V
VL = 5 V, VIN = 2.4 V, 0.8 Ve
VANALOG
RDS(on)
RDS(on)
VD = ± 10 V, IS = 1 mA
D Suffix
- 40 °C to 85 °C
Temp.a
Min.b
Full
Room
Full
Room
Room
Full
Room
Full
Room
Full
- 15
- 0.5
-5
- 0.5
-5
- 0.5
- 10
2.4
Source Off Leakage Current
IS(off)
VS = ± 14 V, VD = ± 14 V
Drain Off Leakage Current
ID(off)
VD = ± 14 V, VS = ± 14 V
Drain On Leakage Current
ID(on)
VS = VD = ± 14 V
Digital Control
Input Voltage High
VINH
Full
Input Voltage Low
VINL
Full
Input Current
Input Capacitance
IINH or IINL
VINH or VINL
Dynamic Characteristics
Turn-On Time
tON
Turn-Off Time
tOFF
VS = 10 V
see figure 2
Q
CL = 1000 pF, Vgen = 0 V, Rgen = 0 
Charge Injection
Full
45
± 0.01
± 0.01
± 0.02
Unit
15
85
100
V
0.5
5
0.5
5
0.5
10
0.8
-1
1
5

300
Room
200
Room
1
Room
5
CS(off)
Drain-Off Capacitance
CD(off)
Room
5
Channel-On Capacitance
CD(on)
VD = VS = 0 V, f = 1 MHz
Room
16
Off Isolation
OIRR
90
XTALK
CL = 15 pF, RL = 50 
VS = 1 VRMS, f = 100 kHz
Room
Channel-to-Channel Crosstalk
Room
95
nA
V
µA
pF
Room
Source-Off Capacitance
VS = 0 V, f = 1 MHz
Max.b
2
Room
CIN
Typ.c
ns
pC
pF
dB
Power Supply
- 10
- 50
IL
Room
Full
Room
Full
Room
Full
VOP
Full
± 4.5
Positive Supply Current
I+
Negative Supply Current
I-
Logic Supply Current
VIN = 0 or 5 V
Power Supply Range for
Continuous Operation
Document Number: 70040
S11-0179-Rev. J, 07-Feb-11
10
50
µA
10
50
± 22
V
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DG211B, DG212B
Vishay Siliconix
SPECIFICATIONS (for Single Supply)
Test Conditions
Unless Otherwise Specified
V+ = 12 V, V- = 0 V
VL = 5 V, VIN = 2.4 V, 0.8 Ve
Temp.a
Min.b
0
RDS(on)
VD = 3 V, 8 V, IS = 1 mA
Full
Room
Full
Dynamic Characteristics
Turn-On Time
tON
300
tOFF
VS = 8 V
see figure 1
Room
Turn-Off Time
Room
200
Q
CL = 1 nF, Vgen = 6 V, Rgen = 0 
Room
Parameter
Symbol
Analog Switch
Analog Signal Ranged
Drain-Source
On-Resistance
D Suffix
- 40 °C to 85 °C
VANALOG
Charge Injection
Typ.c
90
Max.b
Unit
12
160
200
V
4

ns
pC
Power Supply
- 10
- 50
IL
Room
Full
Room
Full
Room
Full
VOP
Full
+ 4.5
Positive Supply Current
I+
Negative Supply Current
I-
Logic Supply Current
VIN = 0 or 5 V
Power Supply Range for
Continuous Operation
10
50
µA
10
50
+ 25
V
Notes:
a. Room = 25 °C, Full = as determined by the operating temperature suffix.
b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. Guaranteed by design, not subject to production test.
e. VIN = input voltage to perform proper function.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
110
100
100
90
R DS(on) - Drain-Source On-Resistance (Ω)
R DS(on) - Drain-Source On-Resistance (Ω)
TYPICAL CHARACTERISTICS (TA = 25 °C, unless otherwise noted)
90
±5V
80
70
± 10 V
60
50
± 15 V
40
± 20 V
30
20
10
- 20 - 16 - 12
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4
-8
-4
0
4
8
12
16
20
V+ = 15 V
V- = - 15 V
80
70
60
125 °C
85 °C
50
40
25 °C
30
- 55 °C
20
10
0
- 15
- 10
-5
0
5
10
VD - Drain Voltage (V)
VD - Drain Voltage (V)
RDS(on) vs. VD and Power Supply Voltages
RDS(on) vs. VD and Temperature
15
Document Number: 70040
S11-0179-Rev. J, 07-Feb-11
DG211B, DG212B
Vishay Siliconix
TYPICAL CHARACTERISTICS (TA = 25 °C, unless otherwise noted)
40
V+ = 5 V
225
V+ = 22 V
V- = - 22 V
TA = 25 °C
30
200
20
175
150
I S, I D - Current (pA)
RDS(on) - Drain-Source On-Resistance (Ω)
250
7V
125
10 V
100
12 V
15 V
75
ID(on)
10
IS(off), ID(off)
0
- 10
- 20
50
- 30
25
- 40
- 20
0
0
2
4
6
8
10
12
14
16
- 15
VD - Drain Voltage (V)
-5
0
5
10
15
20
VANALOG - Analog V oltage (V)
RDS(on) vs. VD and Single Power Supply Voltages
Leakage Currents vs. Analog Voltage
30
1 nA
V+ = 15 V
V- = - 15 V
VS, V D = ± 14 V
20
100 pA
10
Q - Charge (pC)
I S, ID - Current
- 10
IS(off), ID(off)
V+ = 15 V
V- = - 15 V
0
V+ = 12 V
V- = 0 V
- 10
10 pA
- 20
1 pA
- 55
- 35
- 15
5
25
45
65
85
- 30
- 15
105 125
- 10
-5
0
5
10
15
VANALOG - Analog Voltage (V)
Temperature (°C)
QS, QD - Charge Injection vs. Analog Voltage
Leakage Current vs. Temperature
120
V+ = + 15 V
V- = - 15 V
110
100
OIRR (dB)
90
RL = 50 Ω
80
70
60
50
40
10K
100K
1M
10M
f - Frequency (Hz)
Off Isolation vs. Frequency
Document Number: 70040
S11-0179-Rev. J, 07-Feb-11
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5
DG211B, DG212B
Vishay Siliconix
TEST CIRCUITS
+ 15 V
V+
S
VS = + 2 V
D
3V
Logic
Input
VO
tr < 20 ns
tf < 20 ns
50 %
0V
tOFF
IN
V-
GND
CL
35 pF
RL
1 kΩ
3V
90 %
Switch
Output
- 15 V
VO
tON
RL
VO = VS
RL + rDS(on)
Figure 2. Switching Time
+ 15 V
C
+ 15 V
C
V+
V+
S
VS
VO
D
S1
VS
Rg = 50 Ω
RL
IN
GND
V-
0 V, 2.4 V
S2
NC
C
- 15 V
Off Isolation = 20 log
C = RF bypass
VO
X TALK Isolation = 20 log
Figure 3. Off Isolation
V-
C
VS
VO
- 15 V
Figure 4. Channel-to-Channel Crosstalk
ΔVO
+ 15 V
VO
V+
S
D
IN
VO
CL
1000 pF
3V
GND
RL
GND
VS
VO
D2
IN2
0 V, 2.4 V
Vg
50 Ω
IN1
0V, 2.4 V
Rg
D1
Rg = 50 Ω
INX
ON
OFF
ON
VΔVO = measured voltage error due to charge injection
The charge injection in coulombs is Q = CL x ΔV O
- 15 V
Figure 5. Charge Injection
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Document Number: 70040
S11-0179-Rev. J, 07-Feb-11
DG211B, DG212B
Vishay Siliconix
APPLICATIONS
+ 15 V
+5V
VL
V+
Logic Input
Low = Sample
High = Hold
1 kΩ
+ 15 V
DG211B
+ 15 V
- 15 V
-
J202
LM101A
VIN
2N4400
+
5 MΩ
50 pF
200 W
5.1 MΩ
VOUT
1000 pF
V-
J507
J500
30 pF
- 15 V
Aquisition Time
Aperature Time
Sample to Hold Offset
Droop Rate
= 25 µs
= 1 µs
= 5 mV
= 5 mV/s
- 15 V
Figure 6. Sample-and-Hold
+ 15 V
160
V1
C4
fC3
Select
TTL
Control
150 pF
120
C3
1500 pF
Voltage Gain - dB
fC4
Select
C2
fC2
Select
0.015 µF
fC1
Select
0.15 µF
C1
80
fC1
fC2
fC3
DG211B
fL2
fL1
0
V-
fC4
40
fL3
fL4
GND
- 40
1
10
100
- 15 V
R3 = 1 MΩ
+ 15 V
- 15 V
R1 = 10 kΩ
LM101A
+
R2 = 10 kΩ
10K
100K
1M
VOUT
R3
AL (Voltage Gain Below Break Frequency) =
= 100 (40 dB)
R1
1
fC (Break Frequency) =
2πR3CX
fL (Unity Gain Frequency) =
30 pF
1K
Frequency - Hz
Max. Attenuation =
R DS(on)
10 kΩ
≈
1
2πR1CX
- 47 dB
Figure 7. Active Low Pass Filter with Digitally Selected Break Frequency
Document Number: 70040
S11-0179-Rev. J, 07-Feb-11
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7
DG211B, DG212B
Vishay Siliconix
APPLICATIONS
VIN1
+5V
+ 15 V
30 pF
VL
V+
+ 15 V
+
LM101A
VIN2
-
+ 15 V
DG419
- 15 V
RF1
18 kΩ
RF2
9.9 kΩ
RF3
100 kΩ
RG1
2 kΩ
RG2
100 Ω
RG3
100 Ω
DG212B
CH
GND
V-
- 15 V
Gain =
RF + RG
RG
Gain 1 (x1)
Gain 2 (x10)
Gain 3 (x100)
Gain 4 (x1000)
V-
GND
Logic High = Switch On
- 15 V
Figure 8. A Precision Amplifier with Digitally Programable Input and Gains
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?70040.
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8
Document Number: 70040
S11-0179-Rev. J, 07-Feb-11
Package Information
Vishay Siliconix
SOIC (NARROW):
16ĆLEAD
JEDEC Part Number: MS-012
MILLIMETERS
16
15
14
13
12
11
10
Dim
A
A1
B
C
D
E
e
H
L
Ĭ
9
E
1
2
3
4
5
6
7
8
INCHES
Min
Max
Min
Max
1.35
1.75
0.053
0.069
0.10
0.20
0.004
0.008
0.38
0.51
0.015
0.020
0.18
0.23
0.007
0.009
9.80
10.00
0.385
0.393
3.80
4.00
0.149
0.157
1.27 BSC
0.050 BSC
5.80
6.20
0.228
0.244
0.50
0.93
0.020
0.037
0_
8_
0_
8_
ECN: S-03946—Rev. F, 09-Jul-01
DWG: 5300
H
D
C
All Leads
e
Document Number: 71194
02-Jul-01
B
A1
L
Ĭ
0.101 mm
0.004 IN
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1
Package Information
Vishay Siliconix
PDIP: 16ĆLEAD
16
15
14
13
12
11
10
9
E
E1
1
2
3
4
5
6
7
8
D
S
Q1
A
A1
L
15°
MAX
C
B1
e1
Dim
A
A1
B
B1
C
D
E
E1
e1
eA
L
Q1
S
B
eA
MILLIMETERS
Min
Max
INCHES
Min
Max
3.81
5.08
0.150
0.200
0.38
1.27
0.015
0.050
0.38
0.51
0.015
0.020
0.89
1.65
0.035
0.065
0.20
0.30
0.008
0.012
18.93
21.33
0.745
0.840
7.62
8.26
0.300
0.325
5.59
7.11
0.220
0.280
2.29
2.79
0.090
0.110
7.37
7.87
0.290
0.310
2.79
3.81
0.110
0.150
1.27
2.03
0.050
0.080
0.38
1.52
.015
0.060
ECN: S-03946—Rev. D, 09-Jul-01
DWG: 5482
Document Number: 71261
06-Jul-01
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Package Information
Vishay Siliconix
TSSOP: 16-LEAD
DIMENSIONS IN MILLIMETERS
Symbols
Min
Nom
Max
A
-
1.10
1.20
A1
0.05
0.10
0.15
A2
-
1.00
1.05
0.38
B
0.22
0.28
C
-
0.127
-
D
4.90
5.00
5.10
E
6.10
6.40
6.70
E1
4.30
4.40
4.50
e
-
0.65
-
L
0.50
0.60
0.70
L1
0.90
1.00
1.10
y
-
-
0.10
θ1
0°
3°
6°
ECN: S-61920-Rev. D, 23-Oct-06
DWG: 5624
Document Number: 74417
23-Oct-06
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PAD Pattern
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Vishay Siliconix
RECOMMENDED MINIMUM PAD FOR TSSOP-16
0.193
(4.90)
0.171
0.014
0.026
0.012
(0.35)
(0.65)
(0.30)
(4.35)
(7.15)
0.281
0.055
(1.40)
Recommended Minimum Pads
Dimensions in inches (mm)
Revision: 02-Sep-11
1
Document Number: 63550
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Application Note 826
Vishay Siliconix
RECOMMENDED MINIMUM PADS FOR SO-16
RECOMMENDED MINIMUM PADS FOR SO-16
0.372
(9.449)
0.152
0.022
0.050
0.028
(0.559)
(1.270)
(0.711)
(3.861)
0.246
(6.248)
0.047
(1.194)
Recommended Minimum Pads
Dimensions in Inches/(mm)
Return to Index
APPLICATION NOTE
Return to Index
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Document Number: 72608
Revision: 21-Jan-08
Legal Disclaimer Notice
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requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference
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Revision: 02-Oct-12
1
Document Number: 91000
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