ISL59119 ® Data Sheet January 28, 2008 FN6319.1 Triple Channel Video Driver with LPF Features The ISL59119 is a triple channel reconstruction filter with a -3dB roll-off frequency of 8MHz. Operating from single supplies ranging from +3.0V to +5.5V and sinking an ultra-low 8mA quiescent current, the ISL59119 is ideally suited for low power, battery-operated applications. • 5th Order 8MHz Reconstruction Filter The ISL59119 is designed to meet the needs for micropower and bandwidth required in battery-operated communication, instrumentation and modern industrial applications such as video on demand, cable set-top boxes, and MP3 players. • Pb-free (RoHS compliant) The ISL59119 is available in an 8 Ld SO package and is specified for operation over the full -40°C to +85°C temperature range. • Low Supply Current (8mA typ) • Supplies from +3.0V to +5.5V • Rail-to-Rail Output Applications • Video Amplifiers • Portable and Handheld Products • Communications Devices • Video on Demand Ordering Information • Cable Set-top Boxes PART NUMBER (Note) PART MARKING ISL59119IBZ* 59119 IBZ TEMP. RANGE (°C) PACKAGE( Pb-Free) -40 to +85°C 8 Ld SOIC PKG. DWG. # MDP0027 *Add “-T13” suffix for tape and reel. Please refer to TB347 for details on reel specifications. NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate PLUS ANNEAL - e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. • Satellite Set-top Boxes • MP3 Players • Personal Video Recorder Block Diagram + 75mV YIN 8MHz - + x2 YOUT x2 COUT x2 CVBSOUT 1µA 500mV Pinout 75mV ISL59119 (8 LD SO) TOP VIEW 8MHz CIN YIN 1 8 YOUT CIN 2 7 COUT - + + 75mV CVBSIN 3 6 CVBSOUT VDD 4 8MHz CVBSIN - + 1µA 5 GND 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2007, 2008. All Rights Reserved. All other trademarks mentioned are the property of their respective owners. ISL59119 Absolute Maximum Ratings (TA = +25°C) Thermal Information Supply Voltage from VDD to GND . . . . . . . . . . . . . . . . . . . . . . . 6.0V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . VDD +0.3V to GND -0.3V Continuous Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . 40mA Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +125°C Ambient Operating Temperature . . . . . . . . . . . . . . . .-40°C to +85°C Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +125°C Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves Pb-free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA Electrical Specifications PARAMETER VDD = 3.3V, TA = +25°C, RL = 150Ω to GND, unless otherwise specified. DESCRIPTION CONDITIONS MIN TYP MAX UNIT 5.5 V INPUT CHARACTERISTICS VDD Supply Voltage Range IDD Quiescent Supply Current 3.0 VDD = 3.3V, VIN = 500mV, no load 8.4 11.5 mA VDD = 5.5V, VIN = 500mV, no load 9.5 12.5 mA VY_CLAMP Y Input Clamp Voltage IY = -100µA -40 0 +40 mV IY_DOWN Y Input Pull-down Current VY = 0.5V 0.5 1 2 µA IY_CLAMP Y Input Clamp Pull-up Current VY = -0.2V -2.6 -1.5 mA RY Y Input Resistance 0.5V < VY < 1V 10 VCVBS_CLAMP CVBS Input Clamp Voltage ICVBS = -100µA -40 0 40 mV ICVBS_DOWN CVBS Input Pull-down Current VCVBS = 0.5V 0.5 1 2 µA ICVBS_CLAMP CVBS Input Clamp Pull-up Current VCVBS = -0.2V -2.6 -1.5 mA RCVBS CVBS Input Resistance 0.5V < VCVBS < 1V VC_CLAMP C Input Clamp Voltage VY < 0.08V, IC = 0A 420 550 650 mV IC_DOWN C Input Clamp Pull-down Current VC = 1V, VY < 0.08V -60 -40 -25 µA IC_UP C Input Clamp Pull-up Current VC = 0V, VY < 0.08V 25 40 60 µA RC C Input Resistance VY < 0.08V, 0.25V < VC < 0.75V 5 7 10 kΩ IC C Input Bias Current VY > 0.2V -150 0 +150 nA VY_SYNC Y Input Sync Detect Voltage 80 145 200 mV AV Voltage Gain 1.95 2.0 2.04 V/V ΔAV C-Y-CVBS Channel Mismatch +2 % PSRR DC Power Supply Rejection RL = 150Ω MΩ 10 -2 MΩ VDD = 3.3V 35 44 dB VDD = 5.0V 45 48 dB VOS Output Level Shift Voltage VIN = 0V, no load 60 150 240 mV VOH Output Voltage High Swing VIN = 2V, RL = 75Ω to GND (dual load) 2.6 3.1 ISC Output Short-Circuit Current VIN = 2V, to GND through 10Ω, sourcing 65 mA VIN = 100mV, out short to VDD through 10Ω 65 mA -1 V AC PERFORMANCE PB Passband Flatness f = 4.2MHz relative to 1.1MHz, RL = 150Ω, CL = 5pF BW -3dB Bandwidth RL = 150Ω, CL = 5pF 2 0 8 +1 dB MHz FN6319.1 January 28, 2008 ISL59119 Electrical Specifications PARAMETER VDD = 3.3V, TA = +25°C, RL = 150Ω to GND, unless otherwise specified. (Continued) DESCRIPTION CONDITIONS MIN TYP MAX UNIT -60 -50 -40 dB SB Normalized Stopband Gain f = 27MHz relative to 1.1MHz dG Differential Gain NTSC and PAL 0.2 % dP Differential Phase NTSC and PAL 0.5 ° D/DT Group Delay Variation f = 100kHz, 5MHz 5.4 ns XTALK Crosstalk f = 1MHz, between any two channels -70 dB ROUT_AC Output Impedance f = 4.2MHz 1.5 Ω +SR Positive Slew Rate 10% to 90%, VIN = 1V step 15 25 45 V/µs -SR Negative Slew Rate 90% to 10%, VIN = 1V step 15 20 45 V/µs Connection Diagram 3.3V 0.1µF VDD S-VIDEO CABLE + 75mV YIN Y (LUMINANCE) 8MHz - + YOUT YOUT x2 0.1µF 75 1µA 75 500mV 75mV CIN C (CHROMINANCE) 8MHz - + COUT x2 COUT 0.1µF 75 75 + 75mV CVBSIN CVBS (COMPOSITE) 8MHz - + CVBSOUT CVBSOUT x2 0.1µF 75 1µA 75 Pin Descriptions PIN NUMBER PIN NAME 1 YIN Luminance Input 2 CIN Chrominance input 3 CVBSIN Composite Video input 4 VDD Positive power supply 5 GND Ground 6 CVBSOUT 7 COUT Chrominance output 8 YOUT Luminance output 3 DESCRIPTION Composite Video output FN6319.1 January 28, 2008 ISL59119 Typical Performance Curves 1 VDD = 3.3V VDD = 3.3V 0 -1 NORMALIZED GAIN (dB) NORMALIZED GAIN (dB) 1 VDD = 5V -2 -3 -4 VIN = 100mVP-P -5 0.1M 1M 10M 0 -1 VDD = 5V -2 -3 VIN = 700mVP-P -4 -5 0.1M 100M 1M FREQUENCY (Hz) 0.2 0 0 CL = 220pF -10 GAIN (dB) NORMALIZED GAIN (dB) 10 -20 -30 -0.2 CL = 39pF -0.4 -0.6 VIN = 100mVP-P OR 700mVP-P VIN = 100mVP-P -0.8 -50 -60 0.1M 1M 10M -1 0.1M 100M 1M FREQUENCY (Hz) 140 100M FIGURE 4. GAIN vs FREQUENCY FOR VARIOUS CLOAD 0 VDD = 3.3V -10 REJECTION (dB) 120 100 80 60 VDD = 5V 40 10M FREQUENCY (Hz) FIGURE 3. GAIN vs FREQUENCY -3dB POINT DELAY (ns) 100M FIGURE 2. LARGE SIGNAL GAIN vs FREQUENCY -0.1dB FIGURE 1. SMALL SIGNAL GAIN vs FREQUENCY -0.1dB -40 10M FREQUENCY (Hz) VAC = 100mVP-P -20 VDD = 3.3V -30 -40 -50 VDD = 5V -60 20 0 0.1M -70 1M 10M FREQUENCY (Hz) FIGURE 5. GROUP DELAY vs FREQUENCY 4 100M 1k 10k 100k 1M 10Mk FREQUENCY (Hz) FIGURE 6. PSRR vs FREQUENCY FN6319.1 January 28, 2008 ISL59119 80 0 70 -10 CROSSTALK (dB) IMPEDANCE (Z) Typical Performance Curves (Continued) 60 50 VDD = 3.3V 40 30 20 -20 CHROMA TO LUMA -30 -40 Y TO CHROMA -50 CV TO CHROMA -60 -70 10 -80 VDD = 5V 0 0.01M 0.1M 1M FREQUENCY (Hz) 10M CHROMA TO CV -90 0.1M 100M FIGURE 7. OUTPUT IMPEDANCE vs FREQUENCY CV TO Y 10M FREQUENCY (Hz) 100M FIGURE 8. CROSSTALK vs FREQUENCY 5.0 9.4 4.5 f = 500kHz INPUTS FLOATING NO LOAD 9.2 4.0 CURRENT (mA) OUTPUT MAGNITUDE (VP-P) 1M Y TO CV 3.5 3.0 2.5 2.0 1.5 9.0 8.8 8.6 8.4 1.0 8.2 0.5 0 0 0.5 1.0 1.5 2.0 INPUT MAGNITUDE (VP-P) 2.5 FIGURE 9. MAXIMUM OUTPUT MAGNITUDE vs INPUT MAGNITUDE fIN = 500kHz TIMEBASE = 200ns/DIV VERTICAL SCALE: 500mV/DIV 3.0 8.0 3.0 3.2 3.4 3.6 3.8 4.0 4.2 4.4 4.6 4.8 5.0 VOLTAGE (V) FIGURE 10. SUPPLY CURRENT vs SUPPLY VOLTAGE fIN = 500kHz TIMEBASE = 200ns/DIV VERTICAL SCALE: 100mV/DIV OUTPUT FIGURE 11. LARGE SIGNAL STEP RESPONSE 5 FIGURE 12. SMALL SIGNAL PULSE RESPONSE FN6319.1 January 28, 2008 ISL59119 Typical Performance Curves (Continued) TIMEBASE = 500ns/DIV INPUT: 200mV/DIV OUTPUT: 500mV/DIV TIMEBASE = 100ns/DIV INPUT: 200mV/DIV OUTPUT: 500mV/DIV INPUT INPUT OUTPUT OUTPUT FIGURE 13. 2T RESPONSE FIGURE 14. 12.5T RESPONSE TIMEBASE = 10µs/DIV INPUT: 500mV/DIV OUTPUT: 1V/DIV INPUT YOUT SYNC TIP: +130mV OUTPUT COUT AVERAGE LEVEL: +1.26V FIGURE 15. NTSC COLOR BAR FIGURE 16. S-VIDEO OUTPUT 0.1 VAC = 40mVP-P 0.15 DIFFERENTIAL PHASE (%) DIFFERENTIAL GAIN (%) 0.20 f = 3.58MHz 0.10 0.05 0 -0.05 -0.10 -0.15 0.3 TIMEBASE = 10µs/DIV YOUT: 500mV/DIV COUT: 500mV/DIV 0.4 0.5 0.6 0.7 0.8 INPUT DC VOLTAGE (V) FIGURE 17. DIFFERENTIAL GAIN 6 0.9 1.0 VAC = 40mVP-P 0 f = 3.58MHz -0.1 -0.2 -0.3 -0.4 -0.5 -0.6 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 INPUT DC LEVEL (V) FIGURE 18. DIFFERENTIAL PHASE FN6319.1 January 28, 2008 ISL59119 Typical Performance Curves (Continued) HARMONIC DISTORTION (dBc) 0 -20 0 VDD = 3.3V VOUT = 1.5VP-P, SINEWAVE RL = 150Ω -10 THD -10 THD (dBc) -40 -50 -60 2ND HD 3RD HD -40 -50 fIN = 500kHz -70 -90 -100 0.5M 1.0M 1.5M 2.0M 2.5M 3.0M 3.5M FREQUENCY (Hz) 4.0M 4.5M -80 0.5 5.0M FIGURE 19. HARMONIC DISTORTION vs FREQUENCY 0.9 1.3 1.7 OUTPUT VOLTAGE (VP-P) 2.1 2.5 FIGURE 20. HARMONIC DISTORTION vs OUTPUT VOLTAGE 200 8.7 180 8.6 160 -3dB POINT (MHz) VOLTAGE NOISE (nV/√Hz) -30 -60 -80 140 120 100 80 60 40 8.5 8.4 8.3 8.2 8.1 20 0 VDD = 3.3V RL = 150Ω -20 -30 -70 fIN = 5MHz 1k 10k 100k FREQUENCY (Hz) 1M 10M FIGURE 21. OUTPUT VOLTAGE NOISE vs FREQUNCY 8.0 0 100 200 300 INPUT RESISTANCE (Ω) 400 500 FIGURE 22. -3dB BANDWIDTH vs INPUT RESISTANCE INPUT = NTSC VIDEO + 2Hz SQUARE WAVE TIMEBASE = 500µs/DIV INPUT: 500mV/DIV (BEFORE COUPLING CAPACITOR) OUTPUT: 1V/DIV INPUT = NTSC VIDEO + 2Hz SQUARE WAVE (BEFORE COUPLING CAPACITOR) TIMEBASE = 10ms/DIV INPUT: 500mV/DIV OUTPUT: 1V/DIV OUTPUT OUTPUT FIGURE 23. RESPONSE TO +500mV DC STEP ON INPUT (SEE FIGURE 27) 7 FIGURE 24. RESPONSE TO -500mV DC STEP ON INPUT (SEE FIGURE 27) FN6319.1 January 28, 2008 ISL59119 Typical Performance Curves (Continued) JEDEC JESD51-7 HIGH EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD 0.7 0.4 θJ SO A= + 0.2 T2 3-6 23 0° C /W 0.5 /W 8 C SO 60° +1 = 435mW 0.6 625mW A /W 8 C S O 10 ° +1 = A 0.6 JEDEC JESD51-3 LOW EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD θJ POWER DISSIPATION (W) 909mW 0.8 θJ POWER DISSIPATION (W) 1.0 0.4 391mW θ 0.3 JA = 0.2 SO T2 3-6 +2 56 °C /W 0.1 0 0 0 25 50 75 85 100 125 150 0 FIGURE 25. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE Application Information The ISL59119 is a single-supply rail-to-rail triple (one S-video channel and one composite channel) video amplifier with internal sync tip clamps, a typical -3dB bandwidth of 8MHz and slew rate of about 25V/µs. This part is ideally suited for applications requiring high composite and S-video performance with very low power consumption. As the performance characteristics and features illustrate, the ISL59119 is optimized for portable video applications. 25 50 The simplified block diagram on page 1 shows the basic operation of the ISL59119’s sync clamp. The Y and CVBS inputs’ AC-coupled video sync signal is pulled negative by a current source at the input. When the sync tip goes below the comparator threshold, the comparator output goes high, pulling up on the input through the diode, forcing current into the coupling capacitor until the voltage at the input is again 0V, and the comparator turns off. This forces the sync tip clamp to always be 0V, setting the offset for the entire video signal. The C-Channel is slaved to the Y-Channel and clamped to a 500mV level at the input. 8 150 Figure 27 shows the setup for testing the clamp’s response to a large step response at the input. 1Hz SQUARE WAVE 500Ω CH1 CH2 NTSC VIDEO 75Ω The ISL59119 features an internal sync clamp and offset function that level shifts the entire video signal to the optimum level before it reaches the amplifiers’ input stage. These features also help avoid saturation of the output stage of the amplifier by setting the signal closer to the best voltage range. 125 FIGURE 26. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE ISL59119 Internal Sync Clamp Embedded video DACs typically use ground as their most negative supply. This places the sync tip voltage at a minimum of 0V. Presenting a 0V input to most single supply amplifiers will saturate the output stage of the amplifier resulting in a clipped sync tip and degraded video image. 75 85 100 AMBIENT TEMPERATURE (°C) AMBIENT TEMPERATURE (°C) 75Ω OUTPUT 0.1µF 150Ω FIGURE 27. DC STEP RESPONSE CIRCUIT Once the signals are clamped at the input they are level shifted by +65mV before being amplified by a gain of x2. The Sallen Key Low Pass Filter The Sallen Key is a classic low pass configuration. This provides a very stable low pass function, and in the case of the ISL59119, a three-pole roll-off at 8MHz. The three-pole function is accomplished with an RC low pass network placed in series with and before the Sallen Key. The first pole is formed by an RC network, with poles two and three generated with a Sallen Key, creating a nice three-pole roll-off at 8MHz. Output Coupling The ISL59119 can be AC or DC coupled to its output. When AC coupling, a 220µF coupling capacitor is recommended to ensure that low frequencies are passed, preventing video “tilt” or “droop” across a line. The ISL59119’s internal sync clamp makes it possible to DC couple the output to a video load, eliminating the need for any AC coupling capacitors, saving board space, cost, and eliminating any “tilt” or offset shift in the output signal. The FN6319.1 January 28, 2008 ISL59119 trade-off is larger supply current draw, since the DC component of the signal is now dissipated in the load resistor. Typical load current for AC coupled signals is 5mA compared to 10mA for DC coupling. Where: VS = Supply voltage ISMAX = Maximum quiescent supply current VOUT = Maximum output voltage of the application Output Drive Capability The ISL59119 does not have internal short circuit protection circuitry. If the output is shorted indefinitely, the power dissipation could easily overheat the die or the current could eventually compromise metal integrity. Maximum reliability is maintained if the output current never exceeds ±40mA. This limit is set by the design of the internal metal interconnect. Note that for transient short circuits, the part is robust. Short circuit protection can be provided externally with a back match resistor in series with the output placed close as possible to the output pin. In video applications this would be a 75Ω resistor and will provide adequate short circuit protection to the device. Care should still be taken not to stress the device with a short at the output. Power Dissipation With the high output drive capability of the ISL59119, it is possible to exceed the +125°C absolute maximum junction temperature under certain load current conditions. Therefore, it is important to calculate the maximum junction temperature for an application to determine if load conditions or package types need to be modified to assure operation of the amplifier in a safe operating area. RLOAD = Load resistance tied to ground ILOAD = Load current Power Supply Bypassing Printed Circuit Board Layout As with any modern operational amplifier, a good printed circuit board layout is necessary for optimum performance. Lead lengths should be as short as possible. The power supply pin must be well bypassed to reduce the risk of oscillation. For normal single supply operation, a single 4.7µF tantalum capacitor in parallel with a 0.1µF ceramic capacitor from VS+ to GND will suffice. Printed Circuit Board Layout For good AC performance, parasitic capacitance should be kept to minimum. Use of wire wound resistors should be avoided because of their additional series inductance. Use of sockets should also be avoided if possible. Sockets add parasitic inductance and capacitance that can result in compromised performance. The maximum power dissipation allowed in a package is determined according to Equation 1: T JMAX – T AMAX PD MAX = --------------------------------------------Θ JA (EQ. 1) Where: TJMAX = Maximum junction temperature TAMAX = Maximum ambient temperature ΘJA = Thermal resistance of the package The maximum power dissipation actually produced by an IC is the total quiescent supply current times the total power supply voltage, plus the power in the IC due to the load, or: for sourcing use Equation 2: V OUT PD MAX = V S × I SMAX + ( V S – V OUT ) × ---------------R (EQ. 2) L for sinking use Equation 3: PD MAX = V S × I SMAX + ( V OUT – V S ) × I LOAD (EQ. 3) All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 9 FN6319.1 January 28, 2008 ISL59119 Small Outline Package Family (SO) A D h X 45° (N/2)+1 N A PIN #1 I.D. MARK E1 E c SEE DETAIL “X” 1 (N/2) B L1 0.010 M C A B e H C A2 GAUGE PLANE SEATING PLANE A1 0.004 C 0.010 M C A B L b 0.010 4° ±4° DETAIL X MDP0027 SMALL OUTLINE PACKAGE FAMILY (SO) INCHES SYMBOL SO-14 SO16 (0.300”) (SOL-16) SO20 (SOL-20) SO24 (SOL-24) SO28 (SOL-28) TOLERANCE NOTES A 0.068 0.068 0.068 0.104 0.104 0.104 0.104 MAX - A1 0.006 0.006 0.006 0.007 0.007 0.007 0.007 ±0.003 - A2 0.057 0.057 0.057 0.092 0.092 0.092 0.092 ±0.002 - b 0.017 0.017 0.017 0.017 0.017 0.017 0.017 ±0.003 - c 0.009 0.009 0.009 0.011 0.011 0.011 0.011 ±0.001 - D 0.193 0.341 0.390 0.406 0.504 0.606 0.704 ±0.004 1, 3 E 0.236 0.236 0.236 0.406 0.406 0.406 0.406 ±0.008 - E1 0.154 0.154 0.154 0.295 0.295 0.295 0.295 ±0.004 2, 3 e 0.050 0.050 0.050 0.050 0.050 0.050 0.050 Basic - L 0.025 0.025 0.025 0.030 0.030 0.030 0.030 ±0.009 - L1 0.041 0.041 0.041 0.056 0.056 0.056 0.056 Basic - h 0.013 0.013 0.013 0.020 0.020 0.020 0.020 Reference - 16 20 24 28 Reference - N SO-8 SO16 (0.150”) 8 14 16 Rev. M 2/07 NOTES: 1. Plastic or metal protrusions of 0.006” maximum per side are not included. 2. Plastic interlead protrusions of 0.010” maximum per side are not included. 3. Dimensions “D” and “E1” are measured at Datum Plane “H”. 4. Dimensioning and tolerancing per ASME Y14.5M-1994 10 FN6319.1 January 28, 2008