INTERSIL ICM7213IPD

ICM7213
TM
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One Second/One Minute
Timebase Generator
December 2001
Features
Description
• Guaranteed 2V Operation
The ICM7213 is a fully integrated micropower oscillator and
frequency divider with four buffered outputs suitable for interfacing with most logic families. The power supply may be
either a two battery stack (Ni-cad, alkaline, etc.) or a regular
power supply greater than 2V. Depending upon the state of
the WIDTH, INHIBIT, and TEST inputs, using a
4.194304MHz crystal will produce a variety of output frequencies including 2048Hz, 1024Hz, 34.133Hz, 16Hz, 1Hz,
and 1/60Hz (plus composites).
• Very Low Current Consumption (Typ) . . . . 100µA at 3V
• All Outputs TTL Compatible
• On Chip Oscillator Feedback Resistor
• Oscillator Requires Only 3 External components:
Fixed Capacitor, Trim Capacitor, and A Quartz Crystal
• Output Inhibit Function
The ICM7213 utilizes a very high speed low power metal
gate CMOS technology which uses 6.4V zeners between the
drains and sources of each transistor and also across the
supply terminals. Consequently, the ICM7213 is limited to a
6V maximum VSUPPLY , although a simple dropping network
can be used to extend the VSUPPLY range well above 6V
(See Figure 9).
• 4 Simultaneous Outputs: One Pulse/s, One Pulse/Min,
16Hz and Composite 1024 + 16 + 2Hz Outputs
• Test Speed-Up Provides Other Frequency Outputs
Part Number Information
PART NUMBER
ICM7213IPD
TEMP.
RANGE ( oC)
-25 to 85
PACKAGE
14 Ld PDIP
PKG.
NO.
E14.3
Pinout
ICM7213
(PDIP)
TOP VIEW
WIDTH 1
14 OUT 4
OUT 3 2
13 OUT 2
INHIBIT 3
12 OUT 1
VSS 4
11 TEST
OSC OUT 5
10 VDD
OSC IN 6
9 N/ C
N/ C 7
8 N/ C
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2001. All Rights Reserved
1
File Number
3165.2
ICM7213
Functional Block Diagram
(4,194,304Hz)
OSC IN
(8192Hz)
(1024Hz)
(64Hz)
(16Hz)
(4Hz)
OSCILLATOR
÷ 29
6
÷ 23
÷22
÷ 24
÷ 22
RF
5
OSC OUT
(1/ 60Hz)
n
(1/2Hz)
÷
(1Hz)
³
(5 x 3 x 2)
÷2
(2Hz)
³
÷2
÷2
³
n
14
n
OUT 4
n
2
10
VDD
OUT 3
n
WIDTH
1
4
VSS
n
3
11
13
12
INHIBIT
OR RESET
TEST
OUT 2
OUT 1
2
ICM7213
Absolute Maximum Ratings
Thermal Information
Supply Voltage (V DD - VSS ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6V
Output Current (Any Output) . . . . . . . . . . . . . . . . . . . . . . . . . . 20mA
All Input and Oscillator Voltages. . . . . . . . VSS - 0.3V to VDD + 0.3V
All Output Voltages. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VSS to 6V
Thermal Resistance (Typical, Note 1)
θJA (oC/W)
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
100
Maximum Junction Temperature. . . . . . . . . . . . . . . . . . . . . . . 150oC
Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering, 10s) . . . . . . . . . . . . 300oC
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -25oC to 85oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on an evaluation PC board in free air.
VDD - VSS = 3.0V, fOSC = 4.194304MHz, Test Circuit, TA = 25oC, Unless Otherwise Specified
Electrical Specifications
PARAMETER
TEST CONDITIONS
Supply Current, IDD
MIN
TYP
MAX
UNIT
-
100
140
µA
2
-
4
V
Guaranteed Operating Supply
Voltage Range (VDD - VSS), VSUPPLY
-20oC to 85oC
Output Leakage Current, IOLK
Any output, VOUT = 6V
-
-
10
µA
Output Sat. Resistance, ROUT
Any output, IOLK = 2.5mA
-
120
200
Ω
Inhibit Input Current, II
Inhibit terminal connected to VDD
-
10
40
µA
Test Point Input Current, ITP
Test point terminal connected to VDD
-
10
40
µA
Width Input Current, IW
Width terminal connected to VDD
-
10
40
µA
Oscillator Transconductance, gM
VDD = 2V
100
-
-
µS
1
-
10
MHz
-
1.0
-
ppm
-
0.1
-
s
-
0.2
-
s
Oscillator Frequency Range (Note 1), fOSC
2V < VDD < 4V
Oscillator Stability, fSTAB
Oscillator Start Time, tS
VDD = 2V
NOTE:
1. The ICM7213 uses dynamic dividers for high frequency division. As with any dynamic system, information is stored on very small nodal
capacitances instead of latches (static system), therefore there is a lower frequency of operation. Dynamic dividers are used to improve
the high frequency performance while at the same time significantly decreasing power consumption. At low V SUPPLY , operation at less
than 1MHz is possible.
Output Definitions
(NOTE 1)
INPUT STATES
TEST
INHIBIT
WIDTH
PIN 12
OUT 1
PIN 13
OUT 2
PIN 2
OUT 3
L
L
L
16Hz ÷ 218
1024 + 16 + 2Hz (÷ 212 ÷ 218 ÷ 221) Composite
1Hz, 7.8ms ÷ 222
L
L
H
16Hz ÷ 218
1024 + 16 + 2Hz (÷ 212 ÷ 218 ÷ 221) Composite
1Hz, 7.8ms ÷ 222
1/
OFF
OFF
60Hz, 125ms
H
L
L
ON
H
L
H
ON
4096 + 1024Hz (÷ 210 ÷ 212) Composite
2048Hz ÷ 211
34.133Hz, 50% DC ÷
(213 x 5 x 3)
H
H
L
ON
1024Hz ÷ 212
ON
OFF
212
ON
OFF
L
H
H
H
H
L
H
H
16Hz ÷
ON
218
218
1024 + 16Hz (÷
1/60Hz, 1s
÷ (224 x 3 x 5)
÷
1024 + 16Hz (÷
÷ 218) Composite
4096 + 1024Hz (÷ 210 ÷ 212) Composite
L
16Hz ÷
PIN 14
OUT 4
212
218) Composite
212
1024Hz ÷
OFF
211
34.133Hz, 50% DC ÷
(213 x 5 x 3)
2048Hz ÷
See Waveforms
NOTE:
1. When TEST and RESET are connected to ground, or left open, all outputs except for OUT 3 and OUT 4 have a 50% duty cycle.
3
ICM7213
Timing Waveforms
1024Hz
16Hz
OUT 2
2Hz
FIGURE 1. OUTPUT WAVEFORM
INHIBIT
OUT 3
<7.8ms
CASE 1
0.75s to 1.0s
OUT4
CASE 2
(PULSE 3
COINCIDENT
WITH INHIBIT)
59.75s
to 60s
<7.8ms
OUT 3
<125ms
<7.8ms
OUT 4
OUT 3
CASE 3
(EFFECT OF
WIDTH
ON OUT 4)
OUT 4
tICS
WIDTH
OUT 3
CASE 4
(EFFECT OF
WIDTH
ON OUT 4)
OUT 4
1s
WIDTH
FIGURE 2. EFFECT OF THE INHIBIT (TEST CONNECTED TO VSS OR LEFT OPEN)
Typical Performance Curves
300
130
TA = 25 oC
VSUPPLY = 3V
SUPPLY CURRENT (µA)
120
SUPPLY CURRENT, IDD (µA)
CIN = COUT = 30pF
FOSC = 4.19MHz
110
100
90
80
250
fOSC = 4.194304 MHz
200
150
C IN = COUT = 30pF
100
50
CIN = C OUT = 10pF
70
-40
-20
0
20
40
TEMPERATURE (oC)
60
0
2.0
80
3.0
4.0
5.0
SUPPLY VOLTAGE VDD - VSS (V)
FIGURE 3. SUPPLY CURRENT AS A FUNCTION OF
TEMPERATURE
FIGURE 4. SUPPLY CURRENT AS A FUNCTION OF SUPPLY
VOLTAGE
4
ICM7213
Typical Performance Curves
(Continued)
30
+1.5
OSCILLATOR FREQUENCY DEVIATION,
∆f/f IN ppm
TA = 25 oC
OUTPUT CURRENT - mA
25
VSUPPLY = 5V
20
15
VSUPPLY = 3V
10
VSUPPLY = 2V
5
0
0
0.1
0.2
0.3
0.4
0.5
VDD - VSS = 3V
+1.0
MAINTAINED AT 25 oC
fOSC = 4.19MHz
+0.5
0.0
-0.5
-1.0
-1.5
-40
0.6
CIN , COUT AND QUARTZ CRYSTAL
-20
+3
40
60
80
6
TA = 25 oC
fOSC = 4.194304MHz
5
+1
4
VOLTAGE
SUPPLY
OSCILLATOR FREQUENCY DEVIATION,
∆f/f IN ppm
20
FIGURE 6. OSCILLATOR STABILITY AS A FUNCTION OF
DEVICE TEMPERATURE
FIGURE 5. OUTPUT CURRENT AS A FUNCTION OF OUTPUT
+2
0
TEMPERATURE (oC)
OUTPUT SATURATION VOLTAGE (ANY OUTPUT) (V)
0
-1
CIN = COUT = 30pF
3
OPERATING
WINDOW
2
CIN = C OUT = 10pF
-2
1
-3
3.0
2.0
4.0
5.0
0
SUPPLY VOLTAGE VDD - VSS (V)
10kHz
FIGURE 7. OSCILLATOR STABILITY AS A FUNCTION OF
SUPPLY VOLTAGE
100kHz
1MHz
FIGURE 8. WINDOW OF CORRECT OPERATION
Test Circuit
WIDTH
INHIBIT
N.O.
N.O.
1
14
2
13
3
12
4
ICM7213
CRYSTAL PARAMETER
f = 4.194304MHz
RS = 35Ω
(PARALLEL RESONANT)
CM = 17mpF
CO = 2.5pF
N.O.
11
5
10
6
9
7
8
+
IDD
30pF
T.P.
VSUPPLY
-
30pF
5
10MHz
ICM7213
Detailed Description
Control Inputs
The TEST input inhibits the 218 output and applies the 29
output to the 221 divider, thereby permitting a speedup of the
testing of the ÷ 60 section by a factor of 2048 times. This
also results in alternative output frequencies (see table).
Supply Voltage Considerations
The ICM7213 may be used to provide various precision
outputs with frequencies from 2048Hz to 1/60Hz using a
4.194304MHz quartz oscillator, and other output frequencies
may be obtained using other quartz crystal frequencies.
Since the ICM7213 uses dynamic high frequency dividers for
the initial frequency division there are limitations on the
VSUPPLY range depending on the oscillator frequency. If, for
example, a low frequency quartz crystal is selected, the
VSUPPLY should be selected in the center of the operating
window, or approximately 1.7V.
The WIDTH input may be used to change the pulse width of
OUT 4 from 125ms to 1s, or to change the state of OUT 4
from ON to OFF during INHIBIT.
See Figures 1 and 2 for output waveforms and effect of
control inputs.
VS +
The V SUPPLY to the ICM7213 may be derived from a high
voltage supply by using a simple resistor divider (if power is
of no concern), by using a series resistor for minimum
current consumption, or by means of a regulator.
EXAMPLE:
R1
f = 4.2MHz
8V ≤ V ≤ 12V (10 NOMINAL)
I1 ≈ 100µA
I2 ≈ 1mA
R2 ≈ 3kΩ
R2
R1 ≈ 6.8kΩ
Outputs
Pull up resistors will generally be required to interface with
other logic families. These resistors must be connected
between the various outputs and the positive power supply.
CBYPASS 0.01µF
I1
VDD
ICM
7213
I2
VSS
Oscillator Considerations
VS -
The oscillator consists of a CMOS inverter and a feedback
resistor whose value is dependent on the voltage at the
oscillator input and output terminals and the V SUPPLY .
Oscillator stabilities of approximately 0.1ppm per 0.1V variation are achievable with a nominal V SUPPLY of 5V and a single voltage dropping resistor. The crystal specifications are
shown in the Test Circuit.
FIGURE 9A.
EXAMPLE:
VS +
fOSC = 4.2MHz
8V ≤ V ≤ 12V (10 NOMINAL)
R3
I1 ≈ 100µA
R3 = (10 - 3)
I1
10 - 4 kΩ
≈ 68kΩ
It is recommended that the crystal load capacitance (CL) be
no greater than 22pF for a crystal having a series resistance
equal to or less than 75Ω, otherwise the output amplitude of
the oscillator may be too low to drive the divider reliably.
CBYPASS 0.01µF
It a very high quality oscillator is desired, it is recommended
that a quartz crystal be used having a tight tuning tolerance
±10ppm, a low series resistance (less than 25Ω), a low
motional capacitance of 5mpF and a load capacitance of
20pF. The fixed capacitor CIN should be 30pF and the oscillator tuning capacitor should range between approximately
16pF and 60pF.
VDD
ICM
7213
VSS
VS -
FIGURE 9B.
Use of a high quality crystal will result in typical stabilities of
0.05ppm per 0.1V change of VSUPPLY .
FIGURE 9. BIASING SCHEMES WITH HIGH VOLTAGE SUPPLIES
All Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice.
Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may
result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
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