Package Outline Drawing (POD)

Plastic Packages for Integrated Circuits
Small Outline Transistor Plastic Packages (SC70-3)
0.20 (0.008) M
P3.049
VIEW C
C
3 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE
CL
b
INCHES
SYMBOL
6
5
4
CL
CL
E1
E
1
2
3
e
e1
D
C
CL
A
A2
SEATING
PLANE
A1
-C-
PLATING
b1
0.043
0.80
1.10
-
0.004
0.00
0.10
-
A2
0.031
0.039
0.80
1.00
-
b
0.009
0.016
0.25
0.40
-
b1
0.009
0.014
0.25
0.35
c
0.004
0.007
0.10
0.18
6
c1
0.004
0.007
0.10
0.16
6
D
0.071
0.087
1.80
2.20
3
E
0.071
0.094
1.80
2.40
-
E1
0.045
0.053
1.15
1.35
3
e
0.0256 Ref
0.65 Ref
-
e1
0.0512 Ref
1.30 Ref
-
0.010
0.018
0.017 Ref.
0.26
0.46
4
0.420 Ref.
0.006 BSC
0°
N
c1
NOTES
0.031
α
c
MAX
0.000
L2
b
MIN
A
L
WITH
MILLIMETERS
MAX
A1
L1
0.10 (0.004) C
MIN
-
0.15 BSC
8°
0°
3
8°
-
3
5
R
0.004
-
0.10
-
R1
0.004
0.010
0.15
0.25
Rev. 0 11/06
NOTES:
BASE METAL
1. Dimensioning and tolerances per ASME Y14.5M-1994.
2. Package conforms to EIAJ SC70 and JEDEC MO-203AA.
4X θ1
3. Dimensions D and E1 are exclusive of mold flash, protrusions,
or gate burrs.
R1
4. Footlength L measured at reference to gauge plane.
5. “N” is the number of terminal positions.
R
GAUGE PLANE
SEATING
PLANE
L
C
L1
4X θ1
VIEW C
1
α
L2
6. These Dimensions apply to the flat section of the lead between
0.08mm and 0.15mm from the lead tip.
7. Controlling dimension: MILLIMETER. Converted inch dimensions are for reference only.