VS-VSKDS220/030 www.vishay.com Vishay Semiconductors ADD-A-PAK Generation VII Power Modules Schottky Rectifier, 110 A FEATURES • 150 °C TJ operation • Low forward voltage drop • High frequency operation • Low thermal resistance • UL approved file E78996 • Designed and qualified for industrial level • Material categorization: For definitions of compliance please see www.vishay.com/doc?99912 ADD-A-PAK BENEFITS • Excellent thermal performances obtained by the usage of exposed direct bonded copper substrate PRODUCT SUMMARY • High surge capability IF(AV) 110 A VR 30 V Package ADD-A-PAK Circuit Two diodes doubler circuit • Easy mounting on heatsink ELECTRICAL DESCRIPTION MECHANICAL DESCRIPTION The ADD-A-PAK generation VII, new generation of ADD-A-PAK module, combines the excellent thermal performances obtained by the usage of exposed direct bonded copper substrate, with advanced compact simple package solution and simplified internal structure with minimized number of interfaces. The VS-VSKDS220.. Schottky rectifier doubler has been optimized for low reverse leakage at high temperature. The proprietary barrier technology allows for reliable operation up to 150 °C junction temperature. Typical applications are in high current switching power supplies, plating power supplies, UPS systems, converters, freewheeling diodes, welding, and reverse battery protection. MAJOR RATINGS AND CHARACTERISTICS SYMBOL IF(AV) CHARACTERISTICS Rectangular waveform VRRM IFSM tp = 5 μs sine VF 110 Apk, TJ = 125 °C TJ Range VALUES UNITS 110 A 30 V 18 000 A 0.57 V - 55 to 150 °C VS-VSKDS220/030 UNITS 30 V VOLTAGE RATINGS PARAMETER Maximum DC reverse voltage Maximum working peak reverse voltage Revision: 14-Mar-14 SYMBOL VR VRWM Document Number: 94639 1 For technical questions within your region: [email protected], [email protected], [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 VS-VSKDS220/030 www.vishay.com Vishay Semiconductors ABSOLUTE MAXIMUM RATINGS PARAMETER SYMBOL TEST CONDITIONS VALUES Maximum average forward current IF(AV) 50 % duty cycle at TC = 110 °C, rectangular waveform 110 Maximum peak one cycle non-repetitive surge current IFSM Non-repetitive avalanche energy EAS TJ = 25 °C, IAS = 15 A, L = 1 mH 99 mJ IAR Current decaying linearly to zero in 1 μs Frequency limited by TJ maximum VA = 1.5 x VR typical 22 A SYMBOL TEST CONDITIONS VALUES UNITS 5 µs sine or 3 µs rect. pulse 10 ms sine or 6 ms rect. pulse Repetitive avalanche current Following any rated load condition and with rated VRRM applied 18 000 UNITS A 2000 ELECTRICAL SPECIFICATIONS PARAMETER 110 A VFM Maximum forward voltage drop 220 A 110 A 220 A TJ = 25 °C TJ = 25 °C TJ = 125 °C VR = Rated VR Maximum reverse leakage current IRM Maximum junction capacitance CT VR = 5 VDC (test signal range 100 kHz to 1 MHz), 25 °C LS Measured lead to lead 5 mm from package body Typical series inductance TJ = 125 °C Maximum voltage rate of change dV/dt Rated VR Maximum RMS insulation voltage VINS 50 Hz 0.59 0.78 0.57 V 0.82 10 650 7400 mA pF 7.0 nH 10 000 V/µs 3000 (1 min) 3600 (1 s) V VALUES UNITS - 55 to 150 °C THERMAL - MECHANICAL SPECIFICATIONS PARAMETER SYMBOL Maximum junction and storage temperature range TJ, TStg Maximum thermal resistance, junction to case per leg RthJC Typical thermal resistance, case to heatsink per module RthCS TEST CONDITIONS DC operation °C/W 0.1 Approximate weight to heatsink Mounting torque ± 10 % busbar Case style Revision: 14-Mar-14 0.52 A mounting compound is recommended and the torque should be rechecked after a period of 3 h to allow for the spread of the compound. JEDEC® 75 g 2.7 oz. 4 Nm 3 TO-240AA compatible Document Number: 94639 2 For technical questions within your region: [email protected], [email protected], [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 VS-VSKDS220/030 Vishay Semiconductors 1000 10 000 IR - Reverse Current (mA) IF - Instantaneous Forward Current (A) www.vishay.com 100 TJ = 150 °C 10 TJ = 125 °C TJ = 25 °C 1 1000 150 °C 125 °C 100 100 °C 10 75 °C 50 °C 1 25 °C 0.1 0.01 0.0 0.3 0.6 0.9 1.2 1.5 0 5 10 15 20 25 30 VFM - Forward Voltage Drop (V) VR - Reverse Voltage (V) Fig. 1 - Maximum Forward Voltage Drop Characteristics Fig. 2 - Typical Values of Reverse Current vs. Reverse Voltage CT - Junction Capacitance (pF) 10 000 TJ = 25 °C 1000 0 5 10 15 20 25 30 35 VR - Reverse Voltage (V) ZthJC - Thermal Impedance (°C/W) Fig. 3 - Typical Junction Capacitance vs. Reverse Voltage 1 0.1 D = 0.75 D = 0.5 D = 0.33 D = 0.25 D = 0.2 0.01 0.001 1E-05 Single Pulse (Thermal Resistance) 1E-04 1E-03 1E-02 1E-01 1E+00 1E+01 1E+02 t1 - Rectangular Pulse Duration (s) Fig. 4 - Maximum Thermal Impedance ZthJC Characteristics Revision: 14-Mar-14 Document Number: 94639 3 For technical questions within your region: [email protected], [email protected], [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 VS-VSKDS220/030 Vishay Semiconductors 100 160 Square wave (D = 0.50) 80 % rated VR applied 140 Average Power Loss (W) Allowable Case Temperature (°C) www.vishay.com 120 100 DC 80 60 40 20 80 D = 0.75 D = 0.50 D = 0.33 D = 0.25 D = 0.20 60 RMS limit 40 DC 20 see note (1) 0 0 0 50 100 150 200 250 0 300 20 40 60 80 100 120 140 160 180 IF(AV) - Average Forward Current (A) Fig. 5 - Maximum Allowable Case Temperature vs. Average Forward Current Fig. 6 - Forward Power Loss Characteristics IFSM - Non-Repetitive Surge Current (A) IF(AV) - Average Forward Current (A) 100 000 At Any Rated Load Condition And With Rated VRRM Applied Following Surge 10 000 1000 100 10 100 1000 10 000 tp - Square Wave Pulse Duration (μs) Fig. 7 - Maximum Non-Repetitive Surge Current L D.U.T. IRFP460 Rg = 25 Ω Current monitor High-speed switch Freewheel diode + Vd = 25 V 40HFL40S02 Fig. 8 - Unclamped Inductive Test Circuit Note (1) Formula used: T = T - (Pd + Pd C J REV) x RthJC; Pd = Forward power loss = IF(AV) x VFM at (IF(AV)/D) (see fig. 6); PdREV = Inverse power loss = VR1 x IR (1 - D); IR at VR1 = 80 % rated VR Revision: 14-Mar-14 Document Number: 94639 4 For technical questions within your region: [email protected], [email protected], [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 VS-VSKDS220/030 www.vishay.com Vishay Semiconductors ORDERING INFORMATION TABLE Device code VS-VS KD 1 2 S 22 0 3 4 5 / 030 6 1 - VS-VS = Vishay Semiconductors product 2 - Circuit configuration: KD = ADD-A-PAK - 2 diodes in series 3 - S = Schottky diode 4 - Average rating (x 10) 5 - Product silicon identification 6 - Voltage rating (030 = 30 V) CIRCUIT CONFIGURATION (1) ~ (2) + (3) - LINKS TO RELATED DOCUMENTS Dimensions Revision: 14-Mar-14 www.vishay.com/doc?95369 Document Number: 94639 5 For technical questions within your region: [email protected], [email protected], [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Outline Dimensions Vishay Semiconductors ADD-A-PAK Generation VII - Diode DIMENSIONS in millimeters (inches) 29 ± 0.5 (1 ± 0.020) 30 ± 0.5 (1.18 ± 0.020) 35 REF. 18 (0.7) REF. 24 ± 0.5 (1 ± 0.020) 6.7 ± 0.3 (0.26 ± 0.012) Viti M5 x 0.8 Screws M5 x 0.8 Document Number: 95369 Revision: 11-Nov-08 7 6 4 5 3 2 1 6.3 ± 0.2 (0.248 ± 0.008) 22.6 ± 0.2 (0.89 ± 0.008) 80 ± 0.3 (3.15 ± 0.012) 15 ± 0.5 (0.59 ± 0.020) 20 ± 0.5 (0.79 ± 0.020) 20 ± 0.5 (0.79 ± 0.020) 92 ± 0.75 (3.6 ± 0.030) For technical questions, contact: [email protected] www.vishay.com 1 Legal Disclaimer Notice www.vishay.com Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. 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