DATASHEET

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Data
December 1995, Rev. G
or ww
ct ou
conta -INTERSIL
1-888
50MHz Current Feedback Amplifier
Features
The EL2020 is a fast settling, wide
bandwidth amplifier optimized for
gains between -10 and +10. Built using
the Elantec monolithic Complementary Bipolar process, this
amplifier uses current mode feedback to achieve more
bandwidth at a given gain then a conventional voltage
feedback operational amplifier.
• Slew rate 500V/µs
The EL2020 will drive two double terminated 75Ω coax
cables to video levels with low distortion. Since it is a closed
loop device, the EL2020 provides better gain accuracy and
lower distortion than an open loop buffer. The device
includes output short circuit protection, and input offset
adjust capability.
• V supply ±5V to ±18V
The bandwidth and slew rate of the EL2020 are relatively
independent of the closed loop gain taken. The 50MHz
bandwidth at unity gain only reduces to 30MHz at a gain of
10. The EL2020 may be used in most applications where a
conventional op amp is used, with a big improvement in
speed power product.
• 9mA supply current
Ordering Information
• Residue amplifier
PART NUMBER
TEMP. RANGE
PACKAGE
PKG. NO.
EL2020CN
-40°C to +85°C
8-Pin PDIP
MDP0031
EL2020CM
-40°C to +85°C
20-Pin SOL
MDP0027
EL2020
FN7026
• ±33mA output current
• Drives ±2.4V into 75Ω
• Differential phase < 0.1°
• Differential gain < 0.1%
• Output short circuit protected
• Uses current mode feedback
• 1% settling time of 50ns for 10V step
• Low cost
• 8-pin mini-dip
Applications
• Video gain block
• Radar systems
• Current to voltage converter
• Coax cable driver with gain of 2
Pinouts
EL2020
(20-PIN SOL)
TOP VIEW
EL2020
(8-PIN PDIP)
TOP VIEW
Manufactured under U.S. Patent No. 4,893,091.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2003. All Rights Reserved. Elantec is a registered trademark of Elantec Semiconductor, Inc.
All other trademarks mentioned are the property of their respective owners.
EL2020
Absolute Maximum Ratings (TA = 25°C)
VS
VIN
VIN
IIN
IINS
PD
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . ±18V or 36V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±15V or VS
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . .±10V
Input Current (Pins 2 or 3). . . . . . . . . . . . . . . . . . . . . . ±10mA
Input Current (Pins 1, 5, or 8) . . . . . . . . . . . . . . . . . . . . ±5mA
Maximum Power Dissipation . . . . . . . . . . (See Curves)1.25W
IOP Peak Output Current . . . . . . . . . . . . . . Short Circuit Protected
Output Short Circuit Duration . . . . . . . . . . . . . . . . . Continuous
TA Operating Temperature Range . . . . . . . . . . . . .-40°C to +85°C
TJ Operating Junction Temperature
Plastic Package, SOL . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
TST Storage Temperature . . . . . . . . . . . . . . . . . . .-65°C to +150°C
A heat sink is required to keep the junction temperature below the absolute
maximum when the output is short circuited
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
Open Loop Electrical Specifications
VS = ±15V
LIMITS
PARAMETER
VOS (Note 1)
DESCRIPTION
Input Offset Voltage
TEMP
MIN
TYP
MAX
UNITS
25°C
-10
3
+10
mV
TMIN, TMAX
-15
+15
mV
∆VOS/∆T
Offset Voltage Drift
CMRR (Note 2)
Common Mode Rejection Ratio
ALL
PSRR (Note 3)
Power Supply Rejection Ratio
+IIN
Non-inverting Input Current
-30
µV/°C
50
60
dB
25°C
65
75
dB
TMIN, TMAX
60
25°C, TMAX
-15
TMIN
-25
ALL
1
+RIN
Non-Inverting Input Resistance
+IPSR (Note 3)
Non-Inverting Input Current
Power Supply Rejection
25°C, TMAX
-Input Current
25°C, TMAX
-40
TMIN
-50
-IIN ( Note 1)
-ICMR (Note 2)
-IPSR (Note 3)
Rol
AVOL1
AVOL2
VO
IOUT
5
TMIN
25°C, TMAX
-Input Current
Power Supply Rejection
25°C, TMAX
Transimpedence (∆VOUT/ ∆(-IIN))
RL = 400Ω, VOUT = ±10V
25°C, TMAX
300
TMIN
50
Open Loop DC Voltage Gain
RL = 400Ω, VOUT = ±10V
25°C, TMAX
70
TMIN
60
Open Loop DC Voltage Gain
RL = 100Ω, VOUT = ±2.5V
25°C, TMAX
60
TMIN
55
Output Voltage Swing
RL = 400Ω
25°C, TMAX
±12
TMIN
±11
Output Current
RL = 400Ω
25°C, TMAX
±30
TMIN
±27.5
+15
µA
+25
µA
5
0.05
-Input Current
Common Mode Rejection
2
dB
10
0.5
TMIN
0.05
TMIN
1000
MΩ
0.5
µA/V
1.0
µA/V
+40
µA
+50
µA
2.0
µA/V
4.0
µA/V
0.5
µA/V
1.0
µA/V
V/mA
V/mA
80
dB
dB
70
dB
dB
±13
V
V
±32.5
mA
mA
EL2020
Open Loop Electrical Specifications
VS = ±15V (Continued)
LIMITS
PARAMETER
IS
DESCRIPTION
TEMP
Quiescent Supply Current
MIN
25°C
TYP
MAX
UNITS
9
12
mA
15
mA
TMIN, TMAX
IS OFF
Supply Current, Disabled, V8 = 0V
ALL
5.5
7.5
mA
ILOGIC
Pin 8 Current, Pin 8 = 0V
ALL
1.1
1.5
mA
ID
Min Pin 8 Current to Disable
ALL
120
250
µA
IE
Max Pin 8 Current to Enable
ALL
30
µA
NOTES:
1. The offset voltage and inverting input current can be adjusted with an external 10kΩ pot between pins 1 and 5 with the wiper connected to VCC
(Pin 7) to make the output offset voltage zero.
2. VCM = ±10V.
3. ±4.5V ≤ VS ≤ ±18V.
AC Closed Loop Electrical Specifications
PARAMETER
VS = ±15V, TA = 25°C
DESCRIPTION
SR1
FPBW1
tR1
tF1
tP1
Closed Loop Gain of 1V/V (0dB), RF = 1kΩ
Slew Rate, Rl = 400Ω, VO = ±10V, test at VO = ±5V
Full Power Bandwidth (Note 1)
Rise Time, Rl = 100Ω, VOUT = 1V, 10% to 90%
Fall Time, Rl = 100Ω, VOUT = 1V, 10% to 90%
Propagation Delay, Rl = 100Ω, VOUT = 1V, 50% Points
BW
tS
tS
Closed Loop Gain of 1V/V (0dB), RF = 820Ω
-3dB Small Signal Bandwidth, Rl = 100Ω, VO = 100mV
1% Settling Time, Rl = 400Ω, VO = 10V
0.1% Settling Time, Rl = 400Ω, VO = 10V
SR10
FPBW10
tR10
tF10
tP10
Closed Loop Gain of 10V/V (20dB), RF = 1 kΩ, RG = 111Ω
Slew Rate, Rl = 400Ω, VO = ±10V, Test at VO = ±5V
Full Power Bandwidth
Rise Time, Rl = 100Ω, VOUT = 1V, 10% to 90%
Fall Time, Rl = 100Ω, VOUT = 1V, 10% to 90%
Propagation Delay, Rl = 100Ω, VOUT = 1V, 50% points
BW
tS
tS
Closed Loop Gain of 10V/V (20dB), RF = 680Ω, RG = 76Ω
-3dB Small Signal Bandwidth, Rl = 100Ω, VO = 100mV
1% Settling Time, Rl = 400Ω, VO = 10V
0.1% Settling Time, Rl = 400Ω, VO = 10V
NOTE:
1. Full Power Bandwidth is guaranteed based on Slew Rate measurement. FPBW = SR/2πVpeak.
3
MIN
TYP
300
4.77
500
7.95
6
6
8
V/µs
MHz
ns
ns
ns
50
50
90
MHz
ns
ns
500
7.95
25
25
12
V/µs
MHz
ns
ns
ns
30
55
280
MHz
ns
ns
300
4.77
MAX
UNITS
EL2020
Typical Performance Curves Non-Inverting Gain of One
AVCL = +1
Settling Time vs
Output Swing
Slew Rate vs
Supply Voltage
4
Gain vs Frequency
Phase Shift vs
Frequency
-3dB Bandwidth vs
Supply Voltage
Rise Time and
Prop Delay vs
Temperature
Slew Rate vs
Temperature
EL2020
Typical Performance Curves Non-Inverting Gain of One
AVCL = -1
Settling Time vs
Output Swing
Slew Rate vs
Supply Voltage
5
(Continued)
Gain vs Frequency
Phase Shift vs
Frequency
-3dB Bandwidth vs
Supply Voltage
Rise Time and
Prop Delay vs
Temperature
Slew Rate vs
Temperature
EL2020
Typical Performance Curves Non-Inverting Gain of One
AVCL = -1
Gain vs Frequency
Settling Time vs
Output Swing
-3dB Bandwidth vs
Supply Voltage
Slew Rate vs
Supply Voltage
6
(Continued)
Phase Shift vs
Frequency
Rise Time and
Prop Delay vs
Temperature
Slew Rate vs
Temperature
EL2020
Typical Performance Curves Non-Inverting Gain of One
AVCL = -1
Settling Time vs
Output Swing
Gain vs Frequency
-3dB Bandwidth vs
Supply Voltage
Slew Rate vs Supply Voltage
7
(Continued)
Phase Shift vs
Frequency
Rise Time and
Prop Delay vs
Temperature
Slew Rate vs
Temperature
EL2020
Typical Performance Curves Non-Inverting Gain of One
Maximum Undistorted
Output Voltage vs
Frequency
Input Resistance vs.
Temperature
PSRR vs Frequency
Voltage Noise vs
Frequency
Current Noise vs
Frequency
Output Impedance vs
Frequency
Supply Current vs
Supply Voltage
8-Pin Plastic DIP
Maximum Power
Dissipation vs Ambient
Temperature
20-Pin SOLMaximum
Power Dissipation vs
Ambient Temperature
Application Information
1. The voltage across the inputs ≈ 0 and
2. The current into the inputs is ≈ 0
Theory of Operation
The EL2020 has a unity gain buffer similar to the EL2003
from the non-inverting input to the inverting input. The error
signal of the EL2020 is a current flowing into (or out of) the
inverting input. A very small change in current flowing
through the inverting input will cause a large change in the
output voltage. This current amplification is the
transresistance (ROL) of the EL2020 [VOUT = ROL * IINV].
Since ROL is very large (≈ 106), the current flowing into the
inverting input in the steady state (non-slewing) condition is
very small.
Therefore we can still use op-amp assumptions as a first
order approximation for circuit analysis, namely that...
8
SIMPLIFIED BLOCK DIAGRAM OF EL2020
EL2020
Resistor Value Selection and Optimization
The value of the feedback resistor (and an internal capacitor)
sets the AC dynamics of the EL2020. A nominal value for the
feedback resistor is 1kΩ, which is the value used for
production testing. This value guarantees stability. For a
given gain, the bandwidth may be increased by decreasing
the feedback resistor and, conversely, the bandwidth will be
decreased by increasing the feedback resistor.
Reducing the feedback resistor too much will result in
overshoot and ringing, and eventually oscillations. Increasing
the feedback resistor results in a lower -3dB frequency.
Attenuation at high frequency is limited by a zero in the
closed loop transfer function which results from stray
capacitance between the inverting input and ground.
Power Supplies
The EL2020 may be operated with single or split power
supplies as low as ±3V (6V total) to as high as ±18V (36V
total). The slew rate degrades significantly for supply
voltages less than ±5V (10V total), but the bandwidth only
changes 25% for supplies from ±3V to ±18V. It is not
necessary to use equal value split power supplies, i.e., -5V
and +12V would be excellent for 0V to 1V video signals.
Bypass capacitors from each supply pin to a ground plane
are recommended. The EL2020 will not oscillate even with
minimal bypassing, however, the supply will ring excessively
with inadequate capacitance. To eliminate supply ringing and
the errors it might cause, a 4.7µF tantalum capacitor with
short leads is recommended for both supplies. Inadequate
supply bypassing can also result in lower slew rate and
longer settling times.
SUMMING AMPLIFIER
EL2020 TYPICAL INVERTING AMPLIFIER CHARACTERISTICS
10V SETTLING
TIME
AV
RF
R1, R2
BANDWIDTH
1%
0.1%
-1
750Ω
750Ω
40MHz
50ns
130ns
-2
750Ω
375Ω
40MHz
55ns
160ns
-5
680Ω
130Ω
40MHz
55ns
160ns
-10
680Ω
68Ω
3MHz
70ns
170ns
Input Range
The non-inverting input to the EL2020 looks like a high
resistance in parallel with a few picofarads in addition to a
DC bias current. The input characteristics change very little
with output loading, even when the amplifier is in current
limit.
The input characteristics also change when the input voltage
exceeds either supply by 0.5V. This happens because the
input transistor's base-collector junctions forward bias. If the
input exceeds the supply by LESS than 0.5V and then
returns to the normal input range, the output will recover in
less than 10ns. However if the input exceeds the supply by
MORE than 0.5V, the recovery time can be 100s of
nanoseconds. For this reason it is recommended that
Schottky diode clamps from input to supply be used if a fast
recovery from large input overloads is required.
Source Impedance
NON-INVERTING AMPLIFIER
EL2020 TYPICAL NON-INVERTING AMPLIFIER
CHARACTERISTICS
10V SETTLING
TIME
AV
RF
RG
BANDWIDTH
1%
0.1%
+1
820Ω
None
50MHz
50ns
90ns
+2
750Ω
750Ω
50MHz
50ns
100ns
+5
680Ω
170Ω
50MHz
50ns
200ns
+10
680Ω
76Ω
30MHz
55ns
280ns
9
The EL2020 is fairly tolerant of variations in source
impedances. Capacitive sources cause no problems at all,
resistive sources up to 100kΩ present no problems as long
as care is used in board layout to minimize output to input
coupling. Inductive sources may cause oscillations; a 1kΩ
resistor in series with the input lead will usually eliminate
problems without sacrificing too much speed.
EL2020
Current Limit
Compensation
The EL2020 has internal current limits that protect the output
transistors. The current limit goes down with junction
temperature rise. At a junction temperature of +175°C the
current limits are at about 50mA. If the EL2020 output is
shorted to ground when operating on ±15V supplies, the
power dissipation could be as great as 1.1W. A heat sink is
required in order for the EL2020 to survive an indefinite
short. Recovery time to come out of current limit is about
50ns.
The EL2020 is internally compensated to work with external
feedback resistors for optimum bandwidth over a wide range
of closed loop gain. The part is designed for a nominal 1kΩ
of feedback resistance, although it is possible to get more
bandwidth by decreasing the feedback resistance.
Using the EL2020 with Output Buffers
When more output current is required, a wideband buffer
amplifier can be included in the feedback loop of the
EL2020. With the EL2003 the subsystem overshoots about
10% due to the phase lag of the EL2003. With the EL2004 in
the loop, the overshoot is less than 2%. For even more
output current, several buffers can be paralleled.
The EL2020 becomes less stable by adding capacitance in
parallel with the feedback resistor, so feedback capacitance
is not recommended.
The EL2020 is also sensitive to stray capacitance from the
inverting input to ground, so the board should be laid out to
keep the physical size of this node small, with ground plane
kept away from this node.
Active Filters
The EL2020’s low phase lag at high frequencies makes it an
excellent choice for high performance active filters. The filter
response more closely approaches the theoretical response
than with conventional op amps due to the EL2020’s smaller
propagation delay. Because the internal compensation of the
EL2020 depends on resistive feedback, the EL2020 should
be set up as a gain block.
Driving Cables
EL2020 BUFFERED WITH AN EL2004
Capacitive Loads
The EL2020 is like most high speed feedback amplifiers in
that it does not like capacitive loads between 50pF and
1000pF. The output resistance works with the capacitive load
to form a second non-dominate pole in the loop. This results
in excessive peaking and overshoot and can lead to
oscillations. Standard resistive isolation techniques used
with other op amps work well to isolate capacitive loads from
the EL2020.
Offset Adjust
To calculate the amplifier system offset voltage from input to
output we use the equation:
Output Offset Voltage = VOS (RF/RG+1) ± IBIAS (RF)
The EL2020 output offset can be nulled by using a 10kΩ
potentiometer from pins 1 to 5 with the slider tied to pin 7
(+VCC). This adjusts both the offset voltage and the inverting
input bias current. The typical adjustment range is ±80mV at
the output.
10
The EL2020 was designed with driving coaxial cables in
mind. With 30mA of output drive and low output impedance,
driving one to three 75Ω double terminated coax cables with
one EL2020 is practical. Since it is easy to set up a gain of
+2, the double matched method is the best way to drive coax
cables, because the impedance match on both ends of the
cable will suppress reflections. For a discussion on some of
the other ways to drive cables, see the section on driving
cables in the EL2003 data sheet.
Video Performance Characteristics
The EL2020 makes an excellent gain block for video
systems, both RS-170 (NTSC) and faster. It is capable of
driving 3 double terminated 75Ω cables with distortion levels
acceptable to broadcasters. A common video application is
to drive a 75Ω double terminated coax with a gain of 2.
To measure the video performance of the EL2020 in the noninverting gain of 2 configuration, 5 identical gain-of-two
circuits were cascaded (with a divide by two 75Ω attenuator
between each stage) to increase the errors.
The results, shown in the photos, indicate the entire system
of 5 gain-of-two stages has a differential gain of 0.5% and a
differential phase of 0.5°. This implies each device has a
EL2020
differential gain/phase of 0.1% and 0.1°, but these are too
small to measure on single devices.
To draw current out of pin 8 an “open collector output” logic
gate or a discrete NPN transistor can be used. This logic
interface method has the advantage of level shifting the logic
signal from 5V supplies to whatever supply the EL2020 is
operating on without any additional components.
Using the EL2020 as a Multiplexer
An interesting use of the enable feature is to combine
several amplifiers in parallel with their outputs common. This
combination then acts similar to a MUX in front of an
amplifier. A typical circuit is shown.
DIFFERENTIAL PHASE
OF 5 CASCADED
GAIN-OF-TWO STAGES
DIFFERENTIAL PHASE
OF 5 CASCADED
GAIN-OF-TWO STAGES
Video Distribution Amplifier
The distribution amplifier shown below features a difference
input to reject common mode signals on the 75Ω coax cable
input. Common mode rejection is often necessary to help to
eliminate 60Hz noise found in production environments.
When the EL2020 is disabled, the DC output impedance is
very high, over 10kΩ. However there is also an output
capacitance that is non-linear. For signals of less than 5V
peak to peak, the output capacitance looks like a simple
15pF capacitor. However, for larger signals the output
capacitance becomes much larger and non-linear.
The example multiplexer will switch between amplifiers in
5µs for signals of less than ±2V on the outputs. For full
output signals of 20V peak to peak, the selection time
becomes 25µs. The disabled outputs also present a
capacitive load and therefore only three amplifiers can have
their outputs shorted together. However an unlimited number
can sum together if a small resistor (25Ω) is inserted in
series with each output to isolate it from the “bus”. There will
be a small gain loss due to the resistors of course.
VIDEO DISTRIBUTION AMPLIFIER WITH DIFFERENCE INPUT
EL2020 Disable/Enable Operation
The EL2020 has an enable/disable control input at pin 8. The
device is enabled and operates normally when pin 8 is left
open or returned to pin 7, VCC. When more than 250µA is
pulled from pin 8, the EL2020 is disabled. The output
becomes a high impedance, the inverting input is no longer
driven to the positive input voltage, and the supply current is
halved. To make it easy to use this feature, there is an
internal resistor to limit the current to a safe level (~1.1mA) if
pin 8 is grounded.
USING THE EL2020 AS A MULTIPLEXER
11
EL2020
Burn-In Circuit
PIN NUMBERS ARE FOR DIP PACKAGES.
ALL PACKAGES USE THE SAME SCHEMATIC.
Equivalent Circuit
12
EL2020
EL2020 Macromodel
Revision A. March 1992
* Enhancements include PSRR, CMRR, and Slew Rate Limiting
* Connections: +input
*
|
-input
*
|
|
+Vsupply
*
|
|
|
-Vsupply
*
|
|
|
|
output
*
|
|
|
|
|
.subckt M2020 3 2 7 4 6
*
* Input Stage
*
e1 10 0 3 0 1.0
vis 10 9 0V
h2 9 12 vxx 1.0
r1 2 11 50
l1 11 12 29nH
iinp 3 0 10µA
iinm 2 0 5µA
*
* Slew Rate Limiting
*
h1 13 0 vis 600
r2 13 14 1K
d1 14 0 dclamp
d2 0 14 dclamp
*
* High Frequency Pole
*
*e2 30 0 14 0 0.00166666666
15 30 17 1.5µH
c5 17 0 1pF
r5 17 0 500
*
* Transimpedance Stage
*
g1 0 18 17 0 1.0
rol 18 0 1Meg
cdp 18 0 5pF
*
* Output Stage
*
q1 4 18 19 qp
q2 7 18 20 qn
q3 7 19 21 qn
q4 4 20 22 qp
r7 21 6 4
r8 22 6 4
ios1 7 19 2.5mA
ios2 20 4 2.5mA
*
* Supply
*
ips 7 4 3mA
*
* Error Terms
*
ivos 0 23 5mA
vxx 23 0 0V
13
EL2020
EL2020 Macromodel (Continued)
e4 24 0 6 0 1.0
e5 25 0 7 0 1.0
e6 26 0 4 0 1.0
r9 24 23 1K
r10 25 23 1K
r11 26 23 1K
*
* Models
*
.model qn npn (is=5e-15 bf=100 tf=0.2nS)
.model qp pnp (is=5e-15 bf=100 tf=0.2nS)
.model dclamp d(is=1e-30 ibv=0.266 bv=1.67 n=4)
.ends
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
14
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