DATASHEET

DATASHEET
Single and Dual Single Supply Ultra-Low Noise,
Ultra-Low Distortion, Rail-to-Rail Output, Op Amp
ISL28190, ISL28290
Features
The ISL28190 and ISL28290 are tiny single and dual ultra-low
noise, ultra-low distortion operational amplifiers. Fully
specified to operated down to +3V single supply. These
amplifiers have outputs that swing rail-to-rail, and an input
common mode voltage that extends below ground (ground
sensing).
• 1nV/Hz input voltage noise
The ISL28190 and ISL28290 are unity gain stable with an
input referred voltage noise of 1nV/Hz. Both parts feature
0.00017% THD+N @ 1kHz.
• 700µV maximum offset voltage
The ISL28190 is available in the space-saving 6 Ld UTDFN
(1.6mmx1.6mm) and 6 Ld SOT-23 packages. The ISL28290 is
available in the 10 Ld UTQFN (1.8mmx1.4mm), 10 Ld MSOP
and 8 LD SOIC packages. All devices are guaranteed over
-40°C to +125°C.
• 1kHz THD+N typical 0.00017% at 2VP-P VOUT
• Harmonic Distortion -87dBc, -90dBc, fo = 1MHz
• 170MHz -3dB bandwidth
• 50V/µs slew rate
• 10µA typical input bias current
• 103dB typical CMRR
• 3V to 5.5V single supply voltage range
• Rail-to-rail output
• Ground sensing
• Enable pin (not available in the 8 Ld SOIC package option)
• Pb-free (RoHS compliant)
Applications
• Low noise signal processing
• Low noise microphones/preamplifiers
• ADC buffers
• DAC output amplifiers
• Digital scales
• Strain gauges/sensor amplifiers
• Radio systems
• Portable equipment
• Infrared detectors
September 8, 2015
FN6247.11
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2006-2008, 2012, 2014, 2015. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
ISL28190, ISL28290
Ordering Information
PART NUMBER
(Note 5)
PART
MARKING
PACKAGE
(RoHS Compliant)
PKG.
DWG. #
ISL28190FHZ-T7 (Notes 1, 2)
(No longer available or supported)
GABH
(Note 4)
6 Ld SOT-23
P6.064A
ISL28190FRUZ-T7 (Notes 1, 3)
(No longer available or supported)
M7
6 Ld UTDFN
L6.1.6x1.6A
ISL28290FUZ (Note 2)
8290Z
10 Ld MSOP
M10.118A
ISL28290FUZ-T7 (Note 1)
8290Z
10 Ld MSOP
M10.118A
ISL28290FRUZ-T7 (Notes 1, 3)
E
10 Ld UTQFN
L10.1.8x1.4A
ISL28290FBZ (Note 2)
28290 FBZ
8 Ld SOIC
M8.15E
ISL28290FBZ-T7 (Note 1)
28290 FBZ
8 Ld SOIC
M8.15E
ISL28190EVAL1Z (No longer available or supported)
Evaluation Board
ISL28290EVAL1Z
Evaluation Board
NOTES:
1. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pbfree products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and NiPdAu plate e4 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
4. The part marking is located on the bottom of the part.
5. For Moisture Sensitivity Level (MSL), please see device information page for ISL28190, ISL28290. For more information on MSL please see tech brief
TB363.
Pin Configurations
ISL28190
(6 LD 1.6x1.6x0.5 UTDFN)
TOP VIEW
ISL28190
(6 LD SOT-23)
TOP VIEW
ED
6 VPO
+ RT
P
U
S
OR
LE
V- 2
5 ENABLE
AB
L
I
A
AV + R
GE
4 INON 3
LIN+
OUT 1
OUT 1
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2
- +
NO
IN- 2
AI
AV
ER
G
N
LO IN+ 3
6 V+ PORT
P
SU
R
O
LE 5 ENABLE
B
A
L
NO
ED
4 V-
FN6247.11
September 8, 2015
ISL28190, ISL28290
Pin Configurations
+
V- 4
OUT_B
9
8
IN-_A
7 IN+_B
1
7
6 ENABLE_B
IN+_A
IN-_B
+
+
6 IN+_B
2
3
4
5
ENABLE_B
ENABLE_A 5
10
8 IN-_B
ENABLE_A
IN+_A 3
9 OUT_B
+
V-
IN-_A 2
10 V+
V+
OUT_A 1
OUT_A
ISL28290
(10 LD UTQFN)
TOP VIEW
ISL28290
(10 LD MSOP)
TOP VIEW
ISL28290
(8 LD SOIC)
TOP VIEW
OUT_A 1
IN-_A 2
IN+_A 3
V- 4
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3
8 V+
7 OUT_B
+
+
6 IN-_B
5 IN+_B
FN6247.11
September 8, 2015
ISL28190, ISL28290
Pin Descriptions
ISL28190
(6 Ld SOT-23)
ISL28190
(6 Ld UTDFN)
4
2
ISL28290
(10 Ld MSOP)
ISL28290
(10 Ld UTQFN)
ISL28290
(8 Ld SOIC)
PIN
NAME
2 (A)
8 (B)
1 (A)
7 (B)
2 (A)
6 (B)
ININ-_A
IN-_B
EQUIVALENT
CIRCUIT
FUNCTION
Inverting input
V+
IN-
IN+
VCircuit 1
3
3 (A)
7 (B)
2 (A)
6 (B)
3 (A)
5 (B)
IN+
IN+_A
IN+_B
4
3
4
V-
1 (A)
9 (B)
10 (A)
8 (B)
1 (A)
7 (B)
OUT
OUT_A
OUT_B
3
2
4
1
1
Non-inverting
input
(See Circuit 1)
Negative supply
Output
V+
OUT
VCircuit 2
6
6
5
5
10
9
5 (A)
6 (B)
4 (A)
5 (B)
8
V+
N/A
EN
EN_A
EN_B
Positive supply
Enable BAR pin
internal pull-down;
Logic “1” selects
the disabled state;
Logic “0” selects
the enabled state.
V+
EN
VCircuit 3
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FN6247.11
September 8, 2015
ISL28190, ISL28290
Absolute Maximum Ratings (TA = +25°C)
Thermal Information
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5.5V
Supply Turn On Voltage Slew Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1V/µs
Differential Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V- - 0.5V to V+ + 0.5V
ESD Tolerance
Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3kV
Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300V
Charged Device Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1200V
Thermal Resistance (Typical)
JA (°C/W) JC (°C/W)
6 Ld SOT-23 Package (Notes 6, 9) . . . . . . .
170
105
6 Ld UTDFN Package (Notes 7, 8) . . . . . . .
125
80
8 Ld SOIC Package (Notes 6, 9) . . . . . . . . .
110
82
10 Ld MSOP Package (Notes 6, 9) . . . . . . .
175
90
10 Ld UTQFN Package (Notes 6, 9) . . . . . .
190
140
Ambient Operating Temperature Range . . . . . . . . . . . . . .-40°C to +125°C
Storage Temperature Range. . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . .+125°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTE:
6. JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
7. JA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech
Brief TB379.
8. For JC, the “case temp” location is the center of the exposed metal pad on the package underside.
9. For JC, the “case temp” location is taken at the package top center.
Electrical Specifications V+ = 5.0V, V- = GND, RL = Open, RF = 1k, AV = -1 unless otherwise specified. Parameters are per
amplifier. Typical values are at V+ = 5V, TA = +25°C. Boldface limits apply over the operating temperature range, -40°C to +125°C,
temperature data established by characterization.
PARAMETER
DESCRIPTION
CONDITIONS
MIN
(Note 10)
TYP
MAX
(Note 10)
UNIT
-1100
240
700
µV
DC SPECIFICATIONS
VOS
Input Offset Voltage
900
V OS
--------------T
Input Offset Drift vs Temperature
IIO
Input Offset Current
See Figure 21
1.9
40
µV/°C
500
nA
900
IB
Input Bias Current
10
16
µA
18
VCM
Common-Mode Voltage Range
CMRR
Common-Mode Rejection Ratio
VCM = 0V to 3.8V
0
78
3.8
V
103
dB
PSRR
Power Supply Rejection Ratio
VS = 3V to 5V
74
80
dB
AVOL
Large Signal Voltage Gain
VO = 0.5V to 4V, RL = 1k
94
102
dB
VOUT
Maximum Output Voltage Swing
Output low, RL = 1k
90
20
50
mV
80
Output high, RL = 1kV+ = 5V
4.95
4.97
V
4.92
IS,ON
Supply Current per Channel,
Enabled
8.5
IS,OFF
Supply Current, Disabled
26
IO+
Short-Circuit Output Current
11
mA
13
35
µA
52
RL = 10
95
144
mA
90
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FN6247.11
September 8, 2015
ISL28190, ISL28290
Electrical Specifications V+ = 5.0V, V- = GND, RL = Open, RF = 1k, AV = -1 unless otherwise specified. Parameters are per
amplifier. Typical values are at V+ = 5V, TA = +25°C. Boldface limits apply over the operating temperature range, -40°C to +125°C,
temperature data established by characterization. (Continued)
PARAMETER
IO-
DESCRIPTION
Short-Circuit Output Current
CONDITIONS
RL = 10
MIN
(Note 10)
TYP
95
135
MAX
(Note 10)
UNIT
mA
90
VSUPPLY
Supply Operating Range
V+ to V-
3
VENH
EN High Level
Referred to V-
2
5.5
VENL
EN Low Level
Referred to V-
IENH
EN Pin Input High Current
VEN = V+
0.8
IENL
EN Pin Input Low Current
VEN = V-
20
V
V
0.8
V
1.2
µA
1.4
80
nA
100
AC SPECIFICATIONS
GBW
-3dB Unity Gain Bandwidth
RF = 0 CL = 20pF, AV = 1, RL = 10k
THD+N
Total Harmonic Distortion + Noise
f = 1kHz, VOUT + 2VP-P, AV = +1, RL = 10k
HD
(1MHz)
2nd Harmonic Distortion
VOUT = 2VP-P, AV = 1
3rd Harmonic Distortion
170
MHz
0.000
17
%
-87
dBc
-90
dBc
ISO
Off-state Isolation
fO = 100kHz
AV = +1; VIN = 100mVP-P; RF = 0CL = 20pF,
AV = 1, RL = 10k
-38
dB
X-TALK
ISL28290
Channel-to-Channel Crosstalk
fO = 100kHz
VS = ±2.5V; AV = +1; VIN = 1VP-P, RF = 0
CL = 20pF, AV = 1, RL = 10k
-105
dB
PSRR
Power Supply Rejection Ratio
fO = 100kHz
VS = ±2.5V; AV = +1; VSOURCE = 1VP-P, RF = 0
CL = 20pF, AV = 1, RL = 10k
-70
dB
CMRR
Common Mode Rejection Ratio
fO = 100kHz
VS = ±2.5V; AV = +1; VCM = 1VP-P, RF = 0
CL = 20pF, AV = 1, RL = 10k
-65
dB
en
Input Referred Voltage Noise
fO = 1kHz
1
nV/H
z
in
Input Referred Current Noise
fO = 10kHz
2.1
pA/H
z
50
V/µs
TRANSIENT RESPONSE
SR
Slew Rate
30
25
tpd
tr, tf, Small
Signal
Propagation Delay
10% VIN - 10% VOUT
AV = 1, VOUT = 100mVP-P RF = 0CL = 1.2pF
1.0
ns
Rise Time, tr 10% to 90%
AV = +1, VOUT = 0.1VP-P RF = 0CL = 1.2pF
3.3
ns
6.3
ns
44
ns
51
ns
Fall Time, tf 10% to 90%
tr, tf Large Signal Rise Time, tr 10% to 90%
Fall Time, tf 10% to 90%
Rise Time, tr 10% to 90%
Fall Time, tf 10% to 90%
AV = +2, VOUT = 1VP-P RF = RG = 499 RL = 10k
CL = 1.2pF
AV = +2, VOUT = 4.7VP-P RF = RG = 499
RL = 10kCL = 1.2pF
190
ns
187
ns
ts
Settling Time to 0.1%
90% VOUT to 0.1% VOUT
AV = 1, VOUT = 1VP-P RF = 0CL = 1.2pF
45
ns
tEN
ENABLE to Output Turn-on Delay
Time; 10% EN - 10% VOUT
AV = 1 VOUT = 1VDC, RL = 10k, CL = 1.2pF
330
ns
ENABLE to Output Turn-off Delay
Time; 10% EN - 10% VOUT
AV = 1 VOUT = 0VDC, RL = 10k, CL = 1.2pF
50
ns
NOTE:
10. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.
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FN6247.11
September 8, 2015
ISL28190, ISL28290
Typical Performance Curves
2
10
CLOSED LOOP GAIN (dB)
0
CLOSED LOOP GAIN (dB)
RL = 100k
1
RL = 10k
-1
RL = 100
-2
-3
-4
RL = 1k
-5
V+ = 5V
-6 AV = +1
C = 10pF
-7 V L
OUT = 10mVP-P
-8
1M
100k
100M
10M
1G
8
CL = 110pF
6
CL = 92pF
4
CL = 57pF
2
CL = 32pF
0
CL = 20pF
-2
-4
V+ = 5V
-6 AV = +1
R = 10k
-8 V L
OUT = 10mVP-P
-10
10k
100k
FREQUENCY (Hz)
VOUT = 1VP-P
GAIN (dB)
CLOSED LOOP GAIN (dB)
0
-2
VOUT = 100mVP-P
-3
-4
-5
-6
-7
V+ = 5V
AV = +1
RL = 10k
CL = 10pF
-8
10k
VOUT = 100mVP-P
50 AV = 100,
RF = 49.9k, RG = 499
40
30
20
VOUT = 10mVP-P
AV = 10, RF = 4.42k, RG = 499
10
0
1M
100k
10M
100M
AV = 1, RF = 0, RG = INF
-10
10k
1G
100k
1M
10M
100M
FREQUENCY (Hz)
FIGURE 3. -3dB BANDWIDTH vs VOUT
FIGURE 4. FREQUENCY RESPONSE vs CLOSED LOOP GAIN
1M
1M
100k
OUTPUT IMPEDANCE ()
INPUT IMPEDANCE ()
1G
AV = 1000, RF = 499k, RG = 499 V+ = 5V
RL = 10k
FREQUENCY (Hz)
10k
1k
100
100M
70
60
-1
10M
FIGURE 2. GAIN vs FREQUENCY FOR VARIOUS CLOAD
VOUT = 1mVP-P
1
1M
FREQUENCY (Hz)
FIGURE 1. GAIN vs FREQUENCY FOR VARIOUS RLOAD
2
CL = 1pF
V+ = 5V, 3V
ENABLED AND
DISABLED
VSOURCE = 1VP-P
10
100k
1M
10M
100M
FREQUENCY (Hz)
FIGURE 5. INPUT IMPEDANCE vs FREQUENCY
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1G
100k
10k
1k
100
V+ = 5V, 3V
VSOURCE = 1VP-P
10
100k
1M
10M
100M
1G
FREQUENCY (Hz)
FIGURE 6. DISABLED OUTPUT IMPEDANCE vs FREQUENCY
FN6247.11
September 8, 2015
ISL28190, ISL28290
Typical Performance Curves (Continued)
100
0
V+ = 5V, 3V
-10
OUTPUT IMPEDANCE ()
-20
10
-30
CMRR (dB)
-40
1
-50
-60
-70
V+ = 5V
AV = +1
RL = 10k
CL = 10pF
VCM = 100mVP-P
-80
0.1
-90
-100
0.01
100k
1M
10M
100M
-110
1k
1G
10k
100k
FREQUENCY (Hz)
FIGURE 7. ENABLED OUTPUT IMPEDANCE vs FREQUENCY
-10
-20
PSRR (dB)
-30
V+ = 5V
AV = +1
RL = 10k
CL = 10pF
VSOURCE = 100mVP-P
-10
PSRR+
-50
-60
-70
VP-P = 100mV
-30
-40
-50
-60
-80
100k
1M
FREQUENCY (Hz)
10M
-80
10k
100M
FIGURE 9. PSRR vs FREQUENCY
VP-P = 10mV
100k
1M
10M
FREQUENCY (Hz)
100M
1G
FIGURE 10. OFF ISOLATION vs FREQUENCY
0.1
-20
V+ = 5V
RL = 10k
-30
THD + NOISE (%)
-40
CROSSTALK (dB)
V+ = 5V
AV = +1
RL = 10k
CL = 10pF
-70
10k
100M
VP-P = 1V
-20
PSRR-
-40
-90
1k
10M
FIGURE 8. CMRR vs FREQUENCY
OFF ISOLATION (dB)
0
1M
FREQUENCY (Hz)
-50
-60
-70
VP-P = 1V
-80
-90
RF = 0, AV = 1
VOUT = 2VP-P
400Hz TO 22kHz FILTER
0.01
0.001
-100
-110
-120
10k
100k
1M
10M
FREQUENCY (Hz)
100M
1G
FIGURE 11. CHANNEL-TO-CHANNEL CROSSTALK vs FREQUENCY
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0.0001
0
2k
4k
6k
8k 10k 12k 14k 16k 18k 20k
FREQUENCY (Hz)
FIGURE 12. THD+N vs FREQUENCY
FN6247.11
September 8, 2015
ISL28190, ISL28290
Typical Performance Curves (Continued)
10
V+ = 5V
RL = 10k
RF = 0, AV = 1
FREQUENCY= 1kHz
400Hz TO 22kHz FILTER
1
THD + NOISE (%)
INPUT VOLTAGE NOISE (nV/Hz)
10
0.1
0.01
0.001
0.0001
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
1
0.1
0.1
4.0
1
10
FIGURE 13. THD+N @ 1kHz vs VOUT
1k
10k
100k
FIGURE 14. INPUT REFERRED NOISE VOLTAGE vs FREQUENCY
1000
5
V+ = 5V
AV = +1
RL = 10k
CL = 10pF
VIN = 1VDC
EN INPUT
4
100
VOLTS (V)
CURRENT NOISE (pA/Hz)
100
FREQUENCY (Hz)
VOUT (VP-P)
10
3
2
ENABLE
DISABLE
ENABLE
1
OUTPUT
1
0.1
1
10
100
1k
10k
0
100k
-1
0
1
0.08
0.8
0.06
0.6
VOUT
0.02
VIN
0
-0.02
V+ = ±2.5V
AV = +1
RL = 10k
VOUT = 100mVP-P
-0.04
-0.06
-0.08
0
20
40
60
80
100 120 140 160 180 200
TIME (ns)
FIGURE 17. SMALL SIGNAL STEP RESPONSE
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4
3
FIGURE 16. ENABLE/DISABLE TIMING
LARGE SIGNAL (V)
SMALL SIGNAL (V)
FIGURE 15. INPUT REFERRED NOISE CURRENT vs FREQUENCY
0.04
2
TIME (µs)
FREQUENCY (Hz)
VOUT
0.4
VIN
0.2
0
-0.2
V+ = ±2.5V
AV = +2
RF = RG = 499
RL = 10k
VOUT = 1VP-P
-0.4
-0.6
-0.8
0
100
200
300
400 500
TIME (ns)
600
700
800
FIGURE 18. LARGE SIGNAL (1V) STEP RESPONSE
FN6247.11
September 8, 2015
ISL28190, ISL28290
Typical Performance Curves (Continued)
3
6.0
VOUT
VIN
CURRENT (mA)
LARGE SIGNAL (V)
2
1
0
V+ = ±2.5V
AV = +2
RF = RG = 499
RL = 10k
VOUT = 4.7VP-P
-1
-2
-3
n = 50
MAX
5.5
0
400
800
5.0
MEDIAN
4.5
4.0
MIN
3.5
3.0
1200
1600
2.5
-40
2000
-20
0
TIME (ns)
FIGURE 19. LARGE SIGNAL (4.7V) STEP RESPONSE
600
500
-9
MAX
120
n = 50
-10
MAX
300
200
MEDIAN
IBIAS+ (µA)
VOS (µV)
100
FIGURE 20. SUPPLY CURRENT vs TEMPERATURE,
VS = ±2.5V ENABLED, RL = INF
n = 50
400
20
40
60
80
TEMPERATURE (°C)
100
0
-100
-11
-12
MEDIAN
-13
-200
MIN
MIN
-300
-14
-400
-500
-40
-20
0
20
40
60
80
100
-15
-40
120
-20
0
800
80
100
120
n = 50
600
MAX
400
IIO (nA)
-11
IBIAS- (µA)
60
FIGURE 22. IBIAS+ vs TEMPERATURE VS = ±2.5V
n = 50
-10
40
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 21. VOS vs TEMPERATURE VS = ±2.5V
-9
20
MEDIAN
-12
-13
MAX
200
0 MEDIAN
MIN
-14
-200
-15
-40
-400
-40
MIN
-20
0
20
40
60
80
TEMPERATURE (°C)
100
120
FIGURE 23. IBIAS- vs TEMPERATURE VS = ±2.5V
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10
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
FIGURE 24. IIO vs TEMPERATURE VS = ±2.5V
FN6247.11
September 8, 2015
ISL28190, ISL28290
Typical Performance Curves (Continued)
140
83
n = 50
MAX
130
MEDIAN
81
PSRR (dB)
CMRR (dB)
120
110
100
MIN
90
MAX
80
79
MEDIAN
78
77
MIN
80
70
n = 50
82
76
-40
-20
0
20
40
60
80
100
75
-40
120
-20
0
TEMPERATURE (°C)
FIGURE 25. CMRR vs TEMPERATURE, VCM = 3.8V,
VS = ±2.5V
50
n = 50
4.980
MAX
80
100
120
n = 50
40
VOUT (mV)
4.976
VOUT (V)
60
45
4.978
4.974
MEDIAN
4.970
MIN
4.968
MAX
35
30
MEDIAN
25
MIN
20
4.966
15
4.964
4.962
-40
40
FIGURE 26. PSRR vs TEMPERATURE ±1.5V TO ±2.5V
4.982
4.972
20
TEMPERATURE (°C)
-20
0
20
40
60
80
100
10
-40
120
-20
0
FIGURE 27. POSITIVE VOUT vs TEMPERATURE RL = 1k, VS = ±2.5V
VCM OVERHEAD TO SUPPLY RAILS (V)
20
40
60
80
100
120
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 28. NEGATIVE VOUT vs TEMPERATURE RL = 1k, VS = ±2.5V
1.2
1.0
0.8
INPUT VOLTAGE TO THE POSITIVE RAIL (V+ - VCM)
0.6
0.4
0.2
0
-0.2
-0.4
-0.6
-0.8
-60
INPUT VOLTAGE TO THE NEGATIVE RAIL (V- + VCM)
-40
-20
0
20 40 60 80
TEMPERATURE (°C)
100 120 140
FIGURE 29. INPUT COMMON MODE VOLTAGE vs TEMPERATURE
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FN6247.11
September 8, 2015
ISL28190, ISL28290
Applications Information
Product Description
The ISL28190 and ISL28290 are voltage feedback operational
amplifiers designed for communication and imaging applications
requiring low distortion, very low voltage and current noise. Both
parts feature high bandwidth while drawing moderately low supply
current. The ISL28190 and ISL28290 use a classical
voltage-feedback topology, which allows them to be used in a variety
of applications where current-feedback amplifiers are not
appropriate because of restrictions placed upon the feedback
element used with the amplifier.
Using Only One Channel
The ISL28290 is a Dual channel op amp. If the application only
requires one channel when using the ISL28290, the user must
configure the unused channel to prevent it from oscillating.
Oscillation can occur if the input and output pins are floating.
This will result in higher than expected supply currents and
possible noise injection into the channel being used. The proper
way to prevent this oscillation is to short the output to the
negative input and ground the positive input (as shown in
Figure 31).
-
Enable/Power-Down
+
The ISL28190 and ISL28290 amplifiers are disabled by applying
a voltage greater than 2V to the EN pin, with respect to the V- pin.
In this condition, the output(s) will be in a high impedance state
and the amplifier(s) current will be reduced to 13µA/Amp. By
disabling the part, multiple parts can be connected together as a
MUX. The outputs are tied together in parallel and a channel can
be selected by the EN pin. The EN pin also has an internal
pull-down. If left open, the EN pin will pull to the negative rail and
the device will be enabled by default.
Input Protection
All input terminals have internal ESD protection diodes to both
positive and negative supply rails, limiting the input voltage to
within one diode beyond the supply rails. Both parts have
additional back-to-back diodes across the input terminals
(as shown in Figure 30). In pulse applications where the input Slew
Rate exceeds the Slew Rate of the amplifier, the possibility exists
for the input protection diodes to become forward biased. This can
cause excessive input current and distortion at the outputs. If
overdriving the inputs is necessary, the external input current must
never exceed 5mA. An external series resistor may be used to limit
the current, as shown in Figure 30.
R
+
FIGURE 30. LIMITING THE INPUT CURRENT TO LESS THAN 5mA
FIGURE 31. PREVENTING OSCILLATIONS IN UNUSED CHANNELS
Power Supply Bypassing and Printed Circuit
Board Layout
As with any high frequency device, good printed circuit board
layout is necessary for optimum performance. Low impedance
ground plane construction is essential. Surface mount
components are recommended, but if leaded components are
used, lead lengths should be as short as possible. The power
supply pins must be well bypassed to reduce the risk of
oscillation. The combination of a 4.7µF tantalum capacitor in
parallel with a 0.01µF capacitor has been shown to work well
when placed at each supply pin.
For good AC performance, parasitic capacitance should be kept
to a minimum, especially at the inverting input. When ground
plane construction is used, it should be removed from the area
near the inverting input to minimize any stray capacitance at that
node. Carbon or Metal-Film resistors are acceptable with the
Metal-Film resistors giving slightly less peaking and bandwidth
because of additional series inductance. Use of sockets,
particularly for the SO package, should be avoided if possible.
Sockets add parasitic inductance and capacitance, which will
result in additional peaking and overshoot.
Current Limiting
The ISL28190 and ISL28290 have no internal current-limiting
circuitry. If the output is shorted, it is possible to exceed the
Absolute Maximum Rating for output current or power
dissipation, potentially resulting in the destruction of the device.
This is why output short circuit current is specified and tested
with RL = 10.
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ISL28190, ISL28290
Power Dissipation
It is possible to exceed the +125°C maximum junction
temperatures under certain load and power-supply conditions. It
is therefore important to calculate the maximum junction
temperature (TJMAX) for all applications to determine if power
supply voltages, load conditions, or package type need to be
modified to remain in the safe operating area. These parameters
are related as follows:
(EQ. 1)
T JMAX = T MAX +   JA xPD MAXTOTAL 
where:
• PDMAXTOTAL is the sum of the maximum power dissipation of
each amplifier in the package (PDMAX)
• PDMAX for each amplifier can be calculated as follows:
V OUTMAX
PD MAX = 2*V S  I SMAX +  V S - V OUTMAX   ---------------------------R
L
(EQ. 2)
where TMAX = Maximum ambient temperature
• JA = Thermal resistance of the package
• PDMAX = Maximum power dissipation of 1 amplifier
• VS = Supply voltage
• IMAX = Maximum supply current of 1 amplifier
• VOUTMAX = Maximum output voltage swing of the application
• RL = Load resistance
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ISL28190, ISL28290
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make sure you
have the latest revision.
DATE
REVISION
CHANGE
September 8, 2015
FN6247.11
Updated Ordering Information Table on page 2.
stamped ISL28190 pin configurations
July 22, 2014
FN6247.10
page 5 - Updated Thermal Information table.
Updated location of note references.
Updated POD L10.1.8x1.4A : Bottom view- added chamfer dimension C0.10.
Land pattern - removed the chamfer lead footprint, added footprint tip to tip dimension (2.20 & 1.80).
Added SOIC package for ISL28290 to description on page 1.
January 18, 2012
FN6247.9
“Ordering Information” on page 2:
Added Eval Board ISL28190EVAL1Z
ISL28190FHZ-T7 - Pkg. Dwg. # changed from MDP0038 TO P6.064A
ISL28290FUZ - Pkg. Dwg. # changed from MDP0043 to M10.118A
ISL28290FBZ - Pkg. Dwg. # changed from MDP0027 to M8.15E
Changed µTDFN and TQFN to ultra matching package outline drawing descriptions
Added MSL Note 5 and SOT-23 Note 4
“Thermal Information” on page 5:
10 Ld UTQFN JA changed from "180" to "143"
8 LD SOIC JA changed from "125" to "110"
“Electrical Specifications” table change on page 6:
Updated note in Min Max column of spec tables from "Parameters with MIN and/or MAX limits are 100% tested
at +25°C, unless otherwise specified. Temperature limits established by characterization and are not
production tested." to "Compliance to datasheet limits is assured by one or more methods: production test,
characterization and/or design."
“Typical Performance Curves” change on page 11:
Added Figure 29 “INPUT COMMON MODE VOLTAGE vs TEMPERATURE”
Updated Package Outline Drawings:
Page 15 - MDP0038 to P6.064A - chgd from multiple pkgs to individual no dimension changes
Page 18 - MDP0027 to M8.15E - chgd from multiple pkgs to individual no dimension changes
Page 19 - MDP0043 to M10.118A - chgd from multiple pkgs to individual no dimension changes
About Intersil
Intersil Corporation is a leading provider of innovative power management and precision analog solutions. The company's products
address some of the largest markets within the industrial and infrastructure, mobile computing and high-end consumer markets.
For the most updated datasheet, application notes, related documentation and related parts, please see the respective product
information page found at www.intersil.com.
You may report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask.
Reliability reports are also available from our website at www.intersil.com/support
For additional products, see www.intersil.com/en/products.html
Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted
in the quality certifications found at www.intersil.com/en/support/qualandreliability.html
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time
without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be
accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
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14
FN6247.11
September 8, 2015
ISL28190, ISL28290
Package Outline Drawing
P6.064A
6 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE
Rev 0, 2/10
1.90
0-3°
0.95
D
0.08-0.20
A
5
6
4
PIN 1
INDEX AREA
2.80
3
1.60
3
0.15 C D
2x
1
(0.60)
3
2
0.20 C
2x
0.40 ±0.05
B
5
SEE DETAIL X
3
0.20 M C A-B
D
TOP VIEW
2.90
5
END VIEW
10° TYP
(2 PLCS)
0.15 C A-B
2x
H
1.14 ±0.15
C
SIDE VIEW
0.10 C
0.05-0.15
1.45 MAX
SEATING PLANE
DETAIL "X"
(0.25) GAUGE
PLANE
0.45±0.1
4
(0.60)
(1.20)
NOTES:
(2.40)
(0.95)
1.
Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2.
Dimensioning and tolerancing conform to ASME Y14.5M-1994.
3.
Dimension is exclusive of mold flash, protrusions or gate burrs.
4.
Foot length is measured at reference to guage plane.
5.
This dimension is measured at Datum “H”.
6.
Package conforms to JEDEC MO-178AA.
(1.90)
TYPICAL RECOMMENDED LAND PATTERN
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FN6247.11
September 8, 2015
ISL28190, ISL28290
Ultra Thin Dual Flat No-Lead Plastic Package (UTDFN)
A
E
6
L6.1.6x1.6A
6 LEAD ULTRA THIN DUAL FLAT NO-LEAD PLASTIC PACKAGE
4
MILLIMETERS
D
PIN 1
REFERENCE
2X
0.15 C
1
2X
A
B
3
MIN
NOMINAL
MAX
NOTES
A
0.45
0.50
0.55
-
A1
-
-
0.05
-
A3
0.15 C
A1
TOP VIEW
e
1.00 REF
4
6
L
CO.2
D2
SYMBOL
b
0.15
0.20
0.25
-
D
1.55
1.60
1.65
4
D2
0.40
0.45
0.50
-
E
1.55
1.60
1.65
4
E2
0.95
1.00
1.05
-
e
DAP SIZE 1.30 x 0.76
3
1
b 6X
0.10 M C A B
E2
6X
L
-
0.50 BSC
0.25
0.30
-
0.35
Rev. 1 6/06
NOTES:
1. Dimensions are in mm. Angles in degrees.
BOTTOM VIEW
DETAIL A
0.10 C
-
0.127 REF
2. Coplanarity applies to the exposed pad as well as the terminals.
Coplanarity shall not exceed 0.08mm.
3. Warpage shall not exceed 0.10mm.
4. Package length/package width are considered as special
characteristics.
0.08 C
5. JEDEC Reference MO-229.
A3
SIDE VIEW
C
SEATING
PLANE
6. For additional information, to assist with the PCB Land Pattern Design effort, see Intersil Technical Brief TB389.
0.127±0.008
0.127 +0.058
-0.008
TERMINAL THICKNESS
A1
DETAIL A
0.25
0.50
1.00
0.45
1.00
2.00
0.30
1.25
LAND PATTERN
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6
FN6247.11
September 8, 2015
ISL28190, ISL28290
Package Outline Drawing
L10.1.8x1.4A
10 LEAD ULTRA THIN QUAD FLAT NO-LEAD PLASTIC PACKAGE
Rev 6, 8/13
1.80
B
C0.10
IN #1 ID
6
A
1
1.40
3
10
0.50
6 PIN 1
INDEX AREA
9 X 0.40
2
1
10X 0.20 4
0.10 M C A B
0.05 M C
0.70
8
5
0.10
7
2X
4X 0.30
6
6X 0.40
TOP VIEW
BOTTOM VIEW
SEE DETAIL "X"
0.10 C
MAX. 0.55
2.20
1
3
10
(0.70)
SIDE VIEW
1.80
(10X 0.20)
C
SEATING PLANE
0.08 C
8
C
5
(9X 0.60)
6
0.127 REF
7
(6X 0.40)
PACKAGE OUTLINE
0-0.05
TYPICAL RECOMMENDED LAND PATTERN
DETAIL "X"
NOTES:
1.
Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2.
Dimensioning and tolerancing conform to ASME Y14.5m-1994.
3.
Unless otherwise specified, tolerance : Decimal ± 0.05
4.
Lead width dimension applies to the metallized terminal and is
measured between 0.15mm and 0.30mm from the terminal tip.
5.
JEDEC reference MO-255.
6.
The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 identifier may be
either a mold or mark feature.
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FN6247.11
September 8, 2015
ISL28190, ISL28290
Package Outline Drawing
M8.15E
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
Rev 0, 08/09
4
4.90 ± 0.10
A
DETAIL "A"
0.22 ± 0.03
B
6.0 ± 0.20
3.90 ± 0.10
4
PIN NO.1
ID MARK
5
(0.35) x 45°
4° ± 4°
0.43 ± 0.076
1.27
0.25 M C A B
SIDE VIEW “B”
TOP VIEW
1.75 MAX
1.45 ± 0.1
0.25
GAUGE PLANE
C
SEATING PLANE
0.10 C
0.175 ± 0.075
SIDE VIEW “A
0.63 ±0.23
DETAIL "A"
(0.60)
(1.27)
NOTES:
(1.50)
(5.40)
1.
Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2.
Dimensioning and tolerancing conform to AMSE Y14.5m-1994.
3.
Unless otherwise specified, tolerance : Decimal ± 0.05
4.
Dimension does not include interlead flash or protrusions.
Interlead flash or protrusions shall not exceed 0.25mm per side.
5.
The pin #1 identifier may be either a mold or mark feature.
6.
Reference to JEDEC MS-012.
TYPICAL RECOMMENDED LAND PATTERN
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FN6247.11
September 8, 2015
ISL28190, ISL28290
Package Outline Drawing
M10.118A (JEDEC MO-187-BA)
10 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE (MSOP)
Rev 0, 9/09
3.0 ± 0.1
A
0.25
10
DETAIL "X"
CAB
0.18 ± 0.05
SIDE VIEW 2
4.9 ± 0.15
3.0 ± 0.1
1.10 Max
B
PIN# 1 ID
1
2
0.95 BSC
0.5 BSC
TOP VIEW
Gauge
Plane
0.86 ± 0.09
H
0.25
C
3°±3°
SEATING PLANE
0.10 ± 0.05
0.23 +0.07/ -0.08
0.08 C A B
0.55 ± 0.15
0.10 C
DETAIL "X"
SIDE VIEW 1
5.80
4.40
3.00
NOTES:
0.50
0.30
1.
Dimensions are in millimeters.
2.
Dimensioning and tolerancing conform to AMSE Y14.5m-1994.
3.
Plastic or metal protrusions of 0.15mm max per side are not
included.
Plastic interlead protrusions of 0.25mm max per side are not
included.
4.
1.40
5.
Dimensions “D” and “E1” are measured at Datum Plane “H”.
TYPICAL RECOMMENDED LAND PATTERN
6.
This replaces existing drawing # MDP0043 MSOP10L.
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19
FN6247.11
September 8, 2015
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