an9736

Operation of the HC5503EVAL Evaluation Board
TM
Application Note
July 1997
AN9736.1
Features
HC5503 Board SLIC Controls
• Includes the Ringing Relay
The design of the HC5503 board incorporates three SPDT
center off switches. The three SPDT switches (RS, RC, PD)
control the functional state of the SLIC. If off-board mode
control of the SLIC is desired, the three SPDT switches can
be set to center open position and driven by logic at the logic
terminal port. The logic terminal port is located in the upper
left hand corner of the board.
• Toggle Switch Programming for Logic States
• Monitoring of Switch Hook Detect (SHD) via On Board
LED’s
• Includes On-Board Op Amp for Evaluation of Transhybrid Balance
• Logic Terminal Port for Easy Evaluation in Existing
Systems
Functional Description
Mode Control Switches
Toggling RS, RC or PD towards the top of the board (Intersil
logo to bottom left) results in a logic “1” state on the pin; and
toggling them towards the bottom results in a logic “0” state
on the pin.
The HC5503 Subscriber Line Interface Circuit (SLIC) evaluation board has provisions for: Full evaluation of the voice
and DC feeding characteristics, ring injected single ended
ringing, and transhybrid balance. Functional control of the
SLIC is provided using the toggle switches RS, RC and PD.
See Table 7 for the logic states.
Getting Started
The HC5503 evaluation board is configured to match a 600Ω
line impedance. Resistors RB1 and RB2 account for 300Ω
and the remaining 300Ω is synthesized via feedback through
resistor R2. Reference the HC5503 data sheet for more
details about impedance matching.
Verify that the sample HC5503 included with the evaluation
board is oriented in its socket correctly. Correct orientation is
with pin 1 pointing towards the onboard pin 1 designator
located to the left of the socket (reference the data sheet for
location of device pin 1).
Power Requirements for the HC5503
Verifying the HC5503 Operation
Power Supply Connections
The operation of the HC5503 and the sample part can be
verified by performing six tests:
The HC5503 requires three external power supplies for a
complete evaluation of the application. The SLIC is powered
by two supplies VBAT = -24V and VCC = +5V and the third
supply (VEE = -5V) powers an external op-amp (U2) for the
transhybrid balance circuit. This op-amp is usually contained
in the CODEC.
A common ground must exist between the HC5503 evaluation board and the off board logic. A differential ground voltage may result in erroneous logic states at the SLIC inputs.
1. Power Supply Current Verification.
2. Normal Loop Feed Mode Verification.
3. Tip and Ring Voltage Verification.
4. Gain Verification (4-wire to 2-wire).
Ground Connections
5. Ring Trip Detector Verification.
The HC5503 board has tied the analog, digital and battery
grounds to a common ground plane designated GND. It is
recommended that the analog, digital and battery grounds of
the SLIC be tied together as close to the device pins as possible. The three external power supplies should each be
grounded to the evaluation board.
6. Transhybrid Balance Verification.
1
The above 6 tests require the following equipment: a 600Ω
load, an AC volt meter, three external supplies (one each for
VCC, VEE, and VBAT), an oscilloscope, a telephone and a
battery backed AC source.
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Copyright © Intersil Americas Inc. 2002. All Rights Reserved
Application Note 9736
Application Tip: When terminating tip and ring, it is handy to
assemble terminators using a Pomona MDP dual banana
plug connector as the terminating resistor receptacle. Refer
to Figure 1 for details.
Setup:
1. Set the mode switches for “Power Denial” mode: RS = 1,
RC = 0/1, PD = 0.
GND
2. Terminate HC5503 SLIC with a 600Ω load.
A
B
3. Measure the supply currents and compare to those in
Table 1.
TABLE 1.
600Ω
SUPPLY
FIGURE 1. TERMINATION ADAPTER
Using the termination shown in Figure 1 provides an unobtrusive technique for terminating tip and ring while still providing access to both signals using the banana jack feature
of the MDP connector. Posts are also available that fit into
holes A and B, providing a solderable connection for the terminating resistor.
RL
(Ω )
MODE
HC5503
TYP (mA)
VCC = +5V
600
Normal Loop Feed
7.2
VEE = -5V
600
Normal Loop Feed
0.74
VBAT = -24V
600
Normal Loop Feed
20.7
VBAT = -24V
600
Power Denial
1.0
Test # 1 Power Supply Current Verification
Test # 2 Normal Loop Feed Mode Verification
A quick check of evaluation board and the HC5503 sample
is to measure the supply currents. The readings should be
similar to the values listed in Table 1. The measurements
can be made using a series ammeter on each supply, or
power supplies with current displays.
This test verifies loop current operation and loop current detection in the Normal Loop feed mode via the on-board LED.
Normal Loop Feed
Discussion:
The currents measured include those of the SLIC and supporting circuitry. For SLIC supply currents consult the
HC5503 data sheet.
Discussion:
When power is applied to the SLIC a loop current will flow
from tip to ring through the 600Ω load. Loop current detection occurs when this loop current triggers an internal detector that pulls the output of SHD low, illuminating the LED
through the +5V supply. Once the LED illuminates, remove
the 600Ω termination and verify that the LED turns off.
Setup:
1. Connect the power supplies to the HC5503.
Setup:
1. Connect the power supplies to the HC5503.
2. Set VBAT to -24V.
2. Set the mode switches for “Normal Loop Feed” mode:
RS = 1, RC = 1, PD = 1.
3. Terminate the HC5503 with 600Ω load across Tip and
Ring.
3. Terminate HC5503 SLIC with a 600Ω load.
4. Set the mode switches for “Normal Loop Feed” mode:
RS = 1, RC = 1, PD = 1.
4. Measure the supply currents and compare to those in
Table 1.
Verification:
1. The SHD LED is on when tip and ring are terminated with
600Ω.
Power Denial
Discussion:
2. The SHD LED is off when tip and ring are open circuit.
Power denial limits power to the subscriber loop: it does not
power down the SLIC, i.e., the SLIC will still consume its normal on-hook quiescent power during a power denial period.
This function is intended to “isolate” from the battery, under
processor control, selected subscriber loops during an overload or similar fault status.
If power denial is selected, the logic circuitry switches in a
current source to charge up the external capacitor C3. As C3
charges up, the ring voltage approaches the tip voltage.
Since tip is always biased at -4V, the battery feed across the
loop is essentially zero, and minimum loop power will be dissipated if the circuit goes off-hook. No signalling functions
are available during this mode.
2
Test # 3 Tip and Ring Voltage Verification
This test verifies the tip and ring voltages for both the Normal
Feed and Power Denial Modes.
Setup:
1. Connect the power supplies to the HC5503.
2. Set VBAT to -24V.
3. Disconnect the 600Ω load across Tip and Ring.
4. Set the mode switches for “Normal Loop Feed” mode:
RS = 1, RC = 1, PD = 1.
Application Note 9736
5. Measure tip and ring voltages with respect to ground and
compare to those in Table 2.
6. Repeat the above test with the SLIC in the Power Denial
Mode: RS = 1, RC = 0/1, PD = 0 and compare to those in
Table 2.
Setup:
1. Connect the power supplies to the HC5503.
2. Set the mode switches for “RD active (Ringing)” mode:
RS = 1, RC = 0, PD = 1.
3. Connect the telephone across tip and ring.
TABLE 2.
MODE
PART
TIP
TYP (V)
RING
TYP (V)
4. Connect battery backed AC (20Hz oscillator) to GENHI
(VBAT + 90VRMS) banana jack.
Verification:
Normal Loop Feed
(VBAT = -24V)
-3.2
-21.0
Power Denial
(VBAT = -24V)
-3.2
-3.0
2. While ringing and on-hook, SHD LED is not illuminated.
3. While ringing, going off-hook will illuminate the SHD LED.
Test #4 Gain Verification (4-Wire to 2-Wire)
This test will verify that HC5503 SLIC is operating properly
and that the 4-wire to 2-wire gain is about 0.615 or -4.0dB.
Discussion:
When terminated with 600Ω load, the SLIC will exhibit about
a -4.0dB gain from the VRX input pin to across tip and ring
(VTR). When an open circuit exists, a mismatch occurs and
the gain of the SLIC goes to about 0.869 or +2.0dB. Reference the HC5503 data sheet for more information concerning the feedback network for impedance matching. The dB
gain is calculated in Equation 1.
V TR
dB = 20 × log ----------V RX
1. Phone starts ringing when power applied to test setup.
(EQ. 1)
CAUTION: Short time durations of off-hook should be
maintained to protect the feed resistors. In systems, the
ring relay is software controlled to turn off milliseconds after off-hook is detected, hence limiting power dissipated
in the feed resistors.
4. When phone is returned to on-hook, SHD LED will turn off.
5. Configure SLIC in Normal Loop Feed mode to stop phone
from ringing. Set mode switches to RS = 1, RC = 1, PD = 1.
Test #6 Transhybrid Balance Verification
This test will verify the transhybrid balance circuitry. A low
distortion AC signal source and a volt meter are the only
additional hardware required to complete this test.
Discussion:
Setup:
1. Connect the power supplies to the HC5503.
2. Set the mode switches for “Normal Loop Feed” mode:
RS = 1, RC = 1, PD = 1.
Transhybrid balance is a measure of how well the input signal is canceled (that being received by the SLIC) from the
transmit signal (that being transmitted from the SLIC). Without this function, voice communication would be difficult
because of the echo.
3. Terminate HC5503 SLIC with a 600Ω load.
Setup:
4. Connect a sine wave generator to the VRX input.
5. Set the generator for 1VRMS and 1kHz.
6. Connect an AC voltmeter across tip and ring.
Verification:
1. Connect the power supplies to the HC5503.
2. Set the mode switches for “Normal Loop Feed” mode:
RS = 1, RC = 1, PD = 1.
3. Terminate HC5503 SLIC with a 600Ω load.
1. Tip to ring AC voltage of 0.64VRMS when terminated.
2. Tip to ring AC voltage of 1.27VRMS when not terminated.
4. Set the AC source to 1VRMS, 1kHz and apply to the VRX
input.
5. Connect an AC voltmeter between the VO and GND.
Test #5 Ring Trip Detector Verification
This test will verify the ringing function of the SLIC. A telephone and an AC signal source are the only additional hardware required to complete the test.
Discussion:
The 600Ω termination is not necessary for this test since the
phone provides this nominal impedance when off-hook. Setting the mode switches as shown below will cause the relay
driver pin (RD) of the SLIC to energize the relay that is on
the evaluation board.
3
Verification:
1. Measure the AC voltage at VO output.
2. Calculate the Transhybrid balance using Equation 2
VO
Transhybrid = 20 × log -------------------1V RMS
3. The value should be around -37.8dB.
(EQ. 2)
Application Note 9736
Functional Circuit COMPONENT Descriptions
A brief description of each component is provided below.
The components will be grouped by function to provide further insight into the operation of the HC5503 board.
TABLE 6. AC DECOUPLING CAPACITORS
C3, C4
AC decoupling capacitors
TABLE 7. LOGIC CURRENT LIMITING RESISTORS
TABLE 3. TWO WIRE SIDE, TIP AND RING
RB1, RB2
Feed resistors that limit the current into the tip and
ring inputs and are used for loop current detection.
K1
Relay used to switch between normal loop feed
operation and battery backed ring injected ringing.
RD
Relay Driver output. The RD pin is an open collector
output that is used to control the ring relay (K1).
RS1, CS1,
RS2, CS2
RC snubber network placed across the ring relay
contacts to minimize inductive kickback effects
from the telephone ringer.
D1, D2, D3,
D4, MOV1,
MOV2
Secondary surge protection.
PTC
R3, R4
TABLE 8. SUPPLY DECOUPLING CAPACITORS
C5, C6, C8-11 Supply decoupling capacitors.
TABLE 9. FEEDBACK RESISTORS
R1, R2
Feedback resistors for synthesizing the AC 2-wire
impedance.
TABLE 10. SHD LED
R5, D6
Provisions for a positive temperature coefficient
(PTC) resistor. The PTC provides short circuit
protection during ringing. The value of the PTC is
application specific and therefore not provided with
the board.
R3 is the logic low current limiting resistor. R4 is the
logic high current limiting resistor.
R5 is the Current limiting resistors for the SHD, LED
(D6).
TABLE 11. SPDT TOGGLE SWITCH
SW1, SW2,
SW3
SPDT center open switches. Controls logic input
RS, RC, PD.
TABLE 4. TRANSHYBRID CIRCUIT
R6, R7, R8,
C7, U2
Transhybrid balance circuit cancels the input signal
(that being received by the SLIC) from the transmit
signal (that being transmitted from the SLIC). C7
couples the output of the SLIC to the transhybrid
op-amp. It also provides the proper phase shift to
account for C4’s phase shift.
TABLE 5. FILTER CAPACITORS
C1, C2
C1 is required for proper operation of the loop
current limit function.
C2 Filters out the AC to avoid false ring trip
detection when ringing the phone.
4
TABLE 12. LOGIC TERMINAL PORT
I/O Port
This port allows external processor control of the 3
logic inputs (RS, RC, PD) and the logic output
(SHD). SW1, SW2, SW3 need to be in the center
open position for proper operation.
Application Note 9736
HC5503 SLIC Operating Modes
TABLE 13.
DETECTOR
(VALID)
RS
RC
PD
MODE
1
0
0
Power Denial
1
0
1
RD Active (Ringing)
1
1
0
Power Denial
1
1
1
Normal Loop Feed
SHD
✓
✓
RS is the ring synchronization input. RS is used to activate and deactivate the ring relay (K1) when the instantaneous ring voltage is near
zero. If synchronization is not required the pin should be tied to +5V.
HC5503 Evaluation Board Parts List
COMPONENT
SLIC
VALUE
U1
TOLERANCE
RATING
HC5503
COMPONENT
VALUE
TOLERANCE
RATING
C5, C6
0.01µF
20%
100V
R1, R4
10.0kΩ
1%
1/4W
C8, C11
0.1µF
20%
50V
R2
24.9kΩ
1%
1/4W
C9, C10
0.01µF
20%
50V
R3
1.0kΩ
5%
1/4W
CS1, CS2
0.1µF
20%
100V
R5
510Ω
5%
1/4W
D1, D2, D3, D4, D5
1N40007
n/a
100V, 1A
R7
200kΩ
1%
1/4W
D6
LED, RED
n/a
n/a
R6, R8
150kΩ
1%
1/4W
PTC
Shorted
n/a
n/a
RB1, RB2
150Ω
1%
2W
MOV1, MOV2
Open
n/a
n/a
RS1, RS2
1.0kΩ
1%
1/4W
U2
C1
0.33µF
20%
50V
RELAY (K1A,B)
n/a
n/a
C2, C3, C4, C7
0.47µF
20%
50V
SW1, SW2, SW3
5
CA741C Op-Amp
DS2E-MDC5V
SPDT CO PC Mount Switch
HC5503/24 Evaluation Board Schematic Diagram
+5V
R5
I/O PORT
+5V
R4
R3
SHD PD RS RC
D6
C8
H
6
SW1
SW2
L
SW3
R6
16
RS1
CS1
D5
18
PD
SHD
K1
9
2
19
RS
C9
7
6
VO
3
RC
U2
R8
10
4
R7
C10
RD
2
K1A
RB1
C7
TIP
TIP FEED
11
RX
HC5503
D2
MOV1
D1
D4
D3
MOV2
C
25 3
R1
VRX
U1
VB-24V
R2
(PINOUT FOR PLCC)
12
K1B
CS2
TX
RING FEED
RING FEED SENSE
4
C1
28
C4
VTX
6
RS2
RB2
RING
-BAT
VBAT
+
90VRMS
BGND
13
26
14
DGND
7
AGND
27
VCC
5
PTC
VB-24V
RINGING
C2
3
RING
C11
-5V
C5
C6
VB+
+5V
C2
C1
Application Note 9736
TIP
Application Note 9736
HC5503 Evaluation Board Layout
SILK SCREEN
TOP SIDE
7
Application Note 9736
HC5503 Evaluation Board Layout
(Continued)
BOTTOM SIDE
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Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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