DATASHEET

ISL1571
Data Sheet
September 3, 2009
FN6387.1
Power Line Communication (PLC)
Features
The ISL1571 is a dual operational amplifier designed for
PLC line driving in OFDM and SSC based solutions. This
device features a high drive capability of 750mA while
consuming only 6mA of supply current per amplifier and
operating from a single 4.5V to 12V supply. The driver
achieves a typical distortion of -80dBc, at 150kHz into a 25Ω
load.
• 21dBm output power capability
The ISL1571 is available in the thermally-enhanced
16 Ld QFN or 10 Ld HMSOP package and is specified for
operation over the full -40°C to +85°C temperature range. The
ISL1571 has control pins BIAS0 and BIAS1 for controlling the
bias and enable/disable of the outputs. These controls allow
for lowering the power to fit the performance/power ratio for
the application.
• -80dBc typical driver output distortion at 10MHz
The ISL1571 is ideal for line driving applications following
the Homeplug 1.0, Homeplug AV and UPA standard based
PLC.
• 250MHz bandwidth
• Drives up to 750mA from a +12V supply
• 20VP-P differential output drive into 21Ω
• Very low noise floor
• -75dBc typical driver output distortion at 4MHz
• -79dBc typical driver output distortion at 17MHz
• Low quiescent current of 6mA per amplifier
• Supply range
- For ISL1571IUEZ 4.5V to 12V
- For ISL1571IRZ ±2.25V to ±6V, 4.5V to 12V
• Thermal shutdown
• Pb-free (RoHS compliant)
Applications
• Homeplug 1.0
• Homeplug AV
• UPA digital home standard
Ordering Information
PART NUMBER
(Note)
PART
MARKING
TEMP. RANGE
(°C)
PACKAGE
(Pb-Free)
PKG.
DWG. #
ISL1571IRZ
157 1IRZ
-40 to +85
16 Ld QFN
MDP0046
ISL1571IRZ-T7*
157 1IRZ
-40 to +85
16 Ld QFN (Tape and Reel)
MDP0046
ISL1571IUEZ
BBBDA
-40 to +85
10 Ld HMSOP
MDP0050
ISL1571IUEZ-T7*
BBBDA
-40 to +85
10 Ld HMSOP (Tape and Reel)
MDP0050
*Please refer to TB347 for details on reel specifications
NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100%
matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations).
Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J
STD-020.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2008, 2009. All Rights Reserved.
All other trademarks mentioned are the property of their respective owners.
ISL1571
Pinouts
NC
VS+
OUTB
ISL1571
(10 LD HMSOP)
TOP VIEW
OUTA
ISL1571
16 LD QFN
TOP VIEW
VS+ 1
16
15
14
13
NC 2
NC
1
12 NC
INA-
2
11 INB-
INA+
3
GND
4
VS-*
OUTA 3
10 INB+
6
7
8
NC
NC
VS-
BIAS0
9 INB8 INB+
INA- 4
7 BIAS1
INA+ 5
6 BIAS0
BIAS1
9
5
VS-*
10 OUTB
*THERMAL PAD MUST BE CONNECTED TO NEGATIVE SUPPLY: VS-.
QFN PACKAGE CAN BE USED IN SINGLE AND DUAL SUPPLY
APPLICATIONS.
*THERMAL PAD MUST BE CONNECTED TO NEGATIVE SUPPLY: VS-.
HMSOP PACKAGE CAN BE USED IN SINGLE SUPPLY APPLICATIONS
ONLY.
Pin Descriptions
16 LD QFN
10 LD HMSOP
PIN NAME
FUNCTION
1, 5, 6, 12, 15
2
NC
No Connect
2
4
INA-
Inverting Input of Amplifier A
3
5
INA+
Non-Inverting Input of Amplifier A
4
Thermal Pad
GND
Ground Connect
7
Thermal Pad
VS-
Negative Supply
8
6
BIAS0 (Note 1)
Current Control Bias Pin
9
7
BIAS1 (Note 1)
Current Control Bias Pin
10
8
INB+
Non-Inverting Input of Amplifier B
11
9
INB-
Inverting Input of Amplifier B
13
10
OUTB
14
1
VS+
16
3
OUTA
Output of Amplifier B
Positive Supply
Output of Amplifier A
NOTE:
1. Single DSL port is comprised of amplifiers A and B. BIAS0 and BIAS1 control IS settings for the DSL port.
2
FN6387.1
September 3, 2009
ISL1571
pplications Information
Absolute Maximum Ratings (TA = +25°C)
Thermal Information
VS+ Voltage to Ground . . . . . . . . . . . . . . . . . . . . . . -0.3V to +13.2V
VIN+ Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND to VS+
Current into any Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8mA
Continuous Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . 75mA
BIAS0, BIAS1 to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +6.6V
ESD Rating
Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1kV*
Charge Device Model. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5kV
Ambient Operating Temperature Range . . . . . . . . . .-40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . . . . . . .-60°C to +150°C
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +150°C
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves
Pb-free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
*Excludes C0 and C1 pins which show less than 1kV of HBM ESD sensitivity.
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
Electrical Specifications
PARAMETER
VS = 12V, RF = 750Ω, RL-DIFF = 50Ω, BIAS0 = BIAS1 = 0V, TA = +25°C, unless otherwise specified.
DESCRIPTION
CONDITIONS
MIN
TYP
MAX
UNIT
AC PERFORMANCE
RF = 750Ω, AV = +5
250
MHz
RF = 750Ω, AV = +10
200
MHz
-75
dBc
-80
dBc
BW
-3dB Bandwidth
THD
Total Harmonic Distortion, Differential f = 4MHz, VO = 4VP-P_DIFF, RL-DIFF = 100Ω
f = 10MHz, VO = 4VP-P_DIFF, RL-DIFF = 100Ω
f = 17MHz, VO = 4VP-P_DIFF, RL-DIFF = 100Ω
SR
Slew Rate, Single-ended
VOUT from -3V to +3V
750
-79
dBc
1200
V/µs
DC PERFORMANCE
VOS_CM
Offset Voltage Common Mode
-40
+40
mV
VOS_DM
Offset Voltage Differential Mode
-7.5
+7.5
mV
ROL
Differential Transimpedance
VOUT = 12VP-P differential, unloaded
3.0
MΩ
INPUT CHARACTERISTICS
IB+
Non-Inverting Input Bias Current
-7.0
IB- DM
Inverting Input Bias Current
Differential Mode
-75
eN
Input Noise Voltage
6
nV√ Hz
iN
-Input Noise Current
13
pA/√ Hz
3
+7.0
µA
+75
µA
OUTPUT CHARACTERISTICS
VOUT
IOUT
Loaded Output Swing (single ended) VS = ±6V, RL DIFF = 50Ω
±4.8
±5.0
V
VS = ±6V, RL DIFF = 20Ω
±4.35
±4.7
V
1000
mA
Output Current
RL = 0Ω
VS
Supply Voltage
Single supply
SUPPLY
4.5
13.2
V
21.5
mA
IS+ (Full Bias)
Positive Supply Current per Amplifier All outputs at 0V, BIAS0 = BIAS1 = 0V
IS+ (Medium Bias)
Positive Supply Current per Amplifier All outputs at 0V, BIAS0 = 5V, BIAS1 = 0V
11
mA
IS+ (Low Bias)
Positive Supply Current per Amplifier All outputs at 0V, BIAS0 = 0V, BIAS1 = 5V
6.0
mA
IS+ (Power-down)
Positive Supply Current per Amplifier All outputs at 0V, BIAS0 = BIAS1 = 5V
12
IINH, BIAS0 or BIAS1 BIAS0, BIAS1 Input Current, High
BIAS0, BIAS1 = 6V
100
IINL, BIAS0 or BIAS1
BIAS0, BIAS1 = 0V
-5
BIAS0, BIAS1 Input Current, Low
VINH, BIAS0 or BIAS1 BIAS0, BIAS1 Input Voltage, High
VINL, BIAS0 or BIAS1 BIAS0, BIAS1 Input Voltage, Low
3
15
0.6
1.0
mA
175
250
µA
+5
µA
2.0
V
0.8
V
FN6387.1
September 3, 2009
ISL1571
Typical Performance Curves
VS = ±6V
AV = 5
RL = 100Ω DIFF
RF = 500Ω
VS = ±6V
AV = 5
RL = 100Ω DIFF
RF = 750Ω
RF = 750Ω
RF = 1kΩ
RF = 1kΩ
FIGURE 1. DIFFERENTIAL FREQUENCY RESPONSE WITH
VARIOUS RF (FULL BIAS MODE)
VS = ±6V
AV = 5
RL = 100Ω DIFF
RF = 500Ω
RF = 500Ω
FIGURE 2. DIFFERENTIAL FREQUENCY RESPONSE WITH
VARIOUS RF (MEDIUM BIAS MODE)
VS = ±6V
AV = 10
RL = 100Ω DIFF
RF = 500Ω
RF = 750Ω
RF = 750Ω
RF = 1kΩ
RF = 1kΩ
FIGURE 3. DIFFERENTIAL FREQUENCY RESPONSE WITH
VARIOUS RF (LOW BIAS MODE)
VS = ±6V
AV = 10
RL = 100Ω DIFF
RF = 500Ω
RF = 750Ω
RF = 1kΩ
FIGURE 5. DIFFERENTIAL FREQUENCY RESPONSE WITH
VARIOUS RF (MEDIUM BIAS MODE)
4
FIGURE 4. DIFFERENTIAL FREQUENCY RESPONSE WITH
VARIOUS RF (FULL BIAS MODE)
VS = ±6V
AV = 10
RL = 100Ω DIFF
RF = 500Ω
RF = 750Ω
RF = 1kΩ
FIGURE 6. DIFFERENTIAL FREQUENCY RESPONSE WITH
VARIOUS RF (LOW BIAS MODE)
FN6387.1
September 3, 2009
ISL1571
HARMONIC DISTORTION (dBc)
c)
VS = ±6V
AV = 5
RF = 750Ω
RL = 100Ω DIFF
(Continued)
2ND HD
3RD HD
HARMONIC DISTORTION (dBc)c)
Typical Performance Curves
2ND HD
VS = ±6V
AV = 5
RF = 750Ω
VO(P-P) = 4V
3RD HD
DIFFERENTIAL VOLTAGE OUTPUTP-P
VS = ±6V
AV = 5
RF = 750Ω
RL = 100Ω DIFF
FIGURE 8. 2ND AND 3RD HARMONIC DISTORTION vs
RLOAD @ 2MHz
HARMONIC DISTORTION (dBc)
c)
HARMONIC DISTORTION (dBc)
c)
FIGURE 7. HARMONIC DISTORTION @ 2MHz
2ND HD
3RD HD
2ND HD
VS = ±6V
AV = 5
RF = 750Ω
VO(P-P) = 4V
3RD HD
DIFFERENTIAL VOLTAGE OUTPUTP-P
2ND HD
VS = ±6V
AV = 5
RF = 750Ω
RL = 100Ω DIFF
3RD HD
FIGURE 10. 2ND AND 3RD HARMONIC DISTORTION vs
RLOAD @ 3MHz
HARMONIC DISTORTION (dBc)
c)
HARMONIC DISTORTION (dBc)
c)
FIGURE 9. HARMONIC DISTORTION @ 3MHz
VS = ±6V
AV = 5
RF = 750Ω
VOPP = 4V
2ND HD
3RD HD
DIFFERENTIAL VOLTAGE OUTPUTP-P
FIGURE 11. HARMONIC DISTORTION @ 5MHz
5
FIGURE 12. 2ND AND 3RD HARMONIC DISTORTION vs
RLOAD @ 5MHz
FN6387.1
September 3, 2009
ISL1571
VS = ±6V
AV = 5
RF = 750Ω
RL = 100Ω DIFF
(Continued)
2ND HD
3RD HD
HARMONIC DISTORTION (dBc)
c)
HARMONIC DISTORTION (dBc)
c)
Typical Performance Curves
VS = ±6V
AV = 5
RF = 750Ω
VOPP = 4V
2ND HD
3RD HD
DIFFERENTIAL VOLTAGE OUTPUTP-P
HARMONIC DISTORTION (dBc)c)
FIGURE 13. HARMONIC DISTORTION @ 10MHz
VS = ±6V
AV = 5
RF = 750Ω
RL = 100Ω DIFF
FIGURE 14. 2ND AND 3RD HARMONIC DISTORTION vs
RLOAD @ 10MHz
IS+
IS2ND HD
FULL BIAS
MEDIUM BIAS
3RD HD
LOW BIAS
±VS (V)
DIFFERENTIAL VOLTAGE OUTPUTP-P
FIGURE 15. HARMONIC DISTORTION @ 17MHz
VS = ±6V
AV = 5
RF = 750Ω
RL= 100Ω
CL = 22pF
CL = 12pF
CL = 0pF
FIGURE 17. FREQUENCY RESPONSE WITH VARIOUS CL
(FULL BIAS MODE)
6
FIGURE 16. SUPPLY CURRENT vs SUPPLY VOLTAGE
VS = ±6V
AV = 5
RF = 750Ω
RL= 100Ω
CL = 22pF
CL = 12pF
CL = 0pF
FIGURE 18. FREQUENCY RESPONSE vs VARIOUS CL
(MEDIUM BIAS MODE)
FN6387.1
September 3, 2009
ISL1571
Typical Performance Curves
VS = ±6V
AV = 5
RF = 750Ω
RL = 100Ω
(Continued)
VS = ±6V
CL = 22pF
PSRR+
CL = 12pF
CL = 0pF
PSRR-
FIGURE 20. PSRR vs FREQUENCY
FIGURE 19. FREQUENCY RESPONSE WITH VARIOUS CL
(LOW BIAS MODE)
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD - EXPOSED
DIEPAD SOLDERED TO PCB PER JESD51-5
4.5
VS = ±6V
AV = 1
RF = 750Ω
4.0
POWER DISSIPATION (W)
OUTPUT IMPEDANCE (Ω)
100
10
1
0.1
3.5
3.0
2.40W
2.5
2.0
2.02W
1.5
1.0
HMSOP10
θJA = +62°C/W
0.5
0.01
10k
QFN16
θJA = +52°C/W
0
100k
1M
10M
100M
FREQUENCY (Hz)
FIGURE 21. OUTPUT IMPEDANCE vs FREQUENCY
Product Description
The ISL1571 is a dual operational amplifier designed for line
driving in OFDM and PLC solutions. It is a dual current mode
feedback amplifier with low distortion while drawing
moderately low supply current. It is built using Intersil’s
proprietary complimentary bipolar process and is offered in
industry standard pinouts. Due to the current feedback
architecture, the ISL1571 closed-loop 3dB bandwidth is
dependent on the value of the feedback resistor. First the
desired bandwidth is selected by choosing the feedback
resistor, RF, and then the gain is set by picking the gain
resistor, RG. The curves at the beginning of the “Typical
Performance Curves” on page 4, show the effect of varying
both RF and RG. The 3dB bandwidth is somewhat
dependent on the power supply voltage.
7
0
25
50
75 85 100
125
150
AMBIENT TEMPERATURE (°C)
FIGURE 22. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
Power Supply Bypassing and Printed Circuit
Board Layout
As with any high frequency device, good printed circuit
board layout is necessary for optimum performance. Ground
plane construction is highly recommended. Lead lengths
should be as short as possible, below 0.25”. The power
supply pins must be well bypassed to reduce the risk of
oscillation. A 4.7µF tantalum capacitor in parallel with a
0.1µF ceramic capacitor is adequate for each supply pin.
During power-up, it is necessary to limit the slew rate of the
rising power supply to within 1V/µs. If the power supply rising
time is undetermined, a series 10Ω resistor on the power
supply line can be used to ensure the proper power supply
rise time.
For good AC performance, parasitic capacitances should be
kept to a minimum, especially at the inverting input. This
implies keeping the ground plane away from this pin. Carbon
resistors are acceptable, while use of wire-wound resistors
FN6387.1
September 3, 2009
ISL1571
should be avoided because of their parasitic inductance.
Similarly, capacitors should be low inductance for best
performance.
Capacitance at the Inverting Input
Due to the topology of the current feedback amplifier, stray
capacitance at the inverting input will affect the AC and
transient performance of the ISL1571 when operating in the
non-inverting configuration.
In the inverting gain mode, added capacitance at the
inverting input has little effect since this point is at a virtual
ground and stray capacitance is therefore not “seen” by the
amplifier.
Feedback Resistor Values
The ISL1571 has been designed and specified with
RF = 750Ω for AV = +5. This value of feedback resistor yields
extremely flat frequency response with 1dB peaking out to
250MHz. As is the case with all current feedback amplifiers,
wider bandwidth, at the expense of slight peaking, can be
obtained by reducing the value of the feedback resistor.
Inversely, larger values of feedback resistor will cause rolloff
to occur at a lower frequency. See the curves in the “Typical
Performance Curves” section, beginning on page 4, which
show 3dB bandwidth and peaking vs frequency for various
feedback resistors and various supply voltages.
Bandwidth vs Temperature
Whereas many amplifier's supply current and consequently
3dB bandwidth drop off at high temperature, the ISL1571
was designed to have little supply current variations with
temperature. An immediate benefit is the 3dB bandwidth
does not drop off drastically with temperature.
Supply Voltage Range
The ISL1571IRZ has been designed to operate with supply
voltages from ±2.25V to ±6V nominal. Optimum bandwidth,
slew rate, and video characteristics are obtained at higher
supply voltages.
Single Supply Operation
If a single supply is desired, values from +4.5V to +12V
nominal can be used as long as the input common mode
range is not exceeded. When using a single supply, be sure
to either:
1. DC bias the inputs at an appropriate common mode
voltage and AC couple the signal, or:
2. Ensure the driving signal is within the common mode
range of the ISL1571. ISL1571IUEZ must be used in
single supply applications.
PLC Modem Applications
The ISL1571 is designed as a line driver for PLC modems. It
is capable of outputting 450mA of output current with a
typical supply voltage headroom of 1.3V. It can achieve
-85dBc of distortion at low 7.1mA of supply current per
amplifier.
The average line power requirement for the PLC application
is 13dBm (20mW) into a 100Ω line. The average line voltage
is 1.41VRMS. Using a differential drive configuration and
transformer coupling with standard back termination, a
transformer ratio of 1:2 is selected. The circuit configuration
is shown in Figure 23.
+
-
12.5
TX1
750
AFE
100
250Ω
+
-
1:2
12.5
750
FIGURE 23. CIRCUIT CONFIGURATION
8
FN6387.1
September 3, 2009
ISL1571
QFN (Quad Flat No-Lead) Package Family
MDP0046
QFN (QUAD FLAT NO-LEAD) PACKAGE FAMILY
(COMPLIANT TO JEDEC MO-220)
A
MILLIMETERS
D
N
(N-1)
(N-2)
B
1
2
3
PIN #1
I.D. MARK
E
(N/2)
2X
0.075 C
2X
0.075 C
N LEADS
TOP VIEW
0.10 M C A B
(N-2)
(N-1)
N
b
L
SYMBOL QFN44 QFN38
TOLERANCE
NOTES
A
0.90
0.90
0.90
0.90
±0.10
-
A1
0.02
0.02
0.02
0.02
+0.03/-0.02
-
b
0.25
0.25
0.23
0.22
±0.02
-
c
0.20
0.20
0.20
0.20
Reference
-
D
7.00
5.00
8.00
5.00
Basic
-
Reference
8
Basic
-
Reference
8
Basic
-
D2
5.10
3.80
5.80 3.60/2.48
E
7.00
7.00
8.00
1
2
3
6.00
E2
5.10
5.80
5.80 4.60/3.40
e
0.50
0.50
0.80
0.50
L
0.55
0.40
0.53
0.50
±0.05
-
N
44
38
32
32
Reference
4
ND
11
7
8
7
Reference
6
NE
11
12
8
9
Reference
5
MILLIMETERS
PIN #1 I.D.
3
QFN32
SYMBOL QFN28 QFN24
QFN20
QFN16
A
0.90
0.90
0.90
0.90
0.90
±0.10
-
A1
0.02
0.02
0.02
0.02
0.02
+0.03/
-0.02
-
b
0.25
0.25
0.30
0.25
0.33
±0.02
-
c
0.20
0.20
0.20
0.20
0.20
Reference
-
D
4.00
4.00
5.00
4.00
4.00
Basic
-
D2
2.65
2.80
3.70
2.70
2.40
Reference
-
(E2)
(N/2)
NE 5
7
(D2)
BOTTOM VIEW
0.10 C
e
C
SEATING
PLANE
TOLERANCE NOTES
E
5.00
5.00
5.00
4.00
4.00
Basic
-
E2
3.65
3.80
3.70
2.70
2.40
Reference
-
e
0.50
0.50
0.65
0.50
0.65
Basic
-
L
0.40
0.40
0.40
0.40
0.60
±0.05
-
N
28
24
20
20
16
Reference
4
ND
6
5
5
5
4
Reference
6
NE
8
7
5
5
4
Reference
5
Rev 11 2/07
0.08 C
N LEADS
& EXPOSED PAD
SEE DETAIL "X"
NOTES:
1. Dimensioning and tolerancing per ASME Y14.5M-1994.
2. Tiebar view shown is a non-functional feature.
SIDE VIEW
3. Bottom-side pin #1 I.D. is a diepad chamfer as shown.
4. N is the total number of terminals on the device.
(c)
C
5. NE is the number of terminals on the “E” side of the package
(or Y-direction).
2
A
(L)
A1
N LEADS
DETAIL X
6. ND is the number of terminals on the “D” side of the package
(or X-direction). ND = (N/2)-NE.
7. Inward end of terminal may be square or circular in shape with radius
(b/2) as shown.
8. If two values are listed, multiple exposed pad options are available.
Refer to device-specific datasheet.
9
FN6387.1
September 3, 2009
ISL1571
HMSOP (Heat-Sink MSOP) Package Family
E
B
0.25 M C A B
E1
MDP0050
HMSOP (HEAT-SINK MSOP) PACKAGE FAMILY
MILLIMETERS
1
N
SYMBOL
D
(N/2)+1
(N/2)
PIN #1
I.D.
A
HMSOP8 HMSOP10
TOLERANCE
NOTES
A
1.00
1.00
Max.
-
A1
0.075
0.075
+0.025/-0.050
-
A2
0.86
0.86
±0.09
-
b
0.30
0.20
+0.07/-0.08
-
c
0.15
0.15
±0.05
-
D
3.00
3.00
±0.10
1, 3
D1
1.85
1.85
Reference
-
E
4.90
4.90
±0.15
-
E1
3.00
3.00
±0.10
2, 3
E2
1.73
1.73
Reference
-
e
0.65
0.50
Basic
-
L
0.55
0.55
±0.15
-
L1
0.95
0.95
Basic
-
N
8
10
Reference
-
TOP VIEW
E2
EXPOSED
THERMAL PAD
D1
BOTTOM VIEW
Rev. 1 2/07
e
NOTES:
H
1. Plastic or metal protrusions of 0.15mm maximum per side are not
included.
C
SEATING
PLANE
2. Plastic interlead protrusions of 0.25mm maximum per side are
not included.
0.08 M C A B
b
0.10 C
N LEADS
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
SIDE VIEW
L1
A
c
END VIEW
SEE DETAIL "X"
A2
GAUGE
0.25 PLANE
L
3¬¨¬®Ð
A1
DETAIL X
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Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
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10
FN6387.1
September 3, 2009
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