DATASHEET

PRODUCT
OBSOLETE
DUCT
TITUTE PRO
S
B
U
S
E
L
POSSIB
220
EL5111, EL5
Data Sheet
EL5211A
July 23, 2009
60MHz Rail-to-Rail Input-Output Op Amp
Features
The EL5211A is a low power, high voltage, rail-to-rail
input-output amplifier. The EL5211A contains two amplifiers.
Operating on nominal supplies ranging from 5V to 15V while
consuming only 2.5mA per amplifier, the EL5211A has a
bandwidth of 60MHz (-3dB) and provides common-mode
input ability beyond the supply rails, as well as rail-to-rail
output capability. This enables the EL5211A to offer
maximum dynamic range at any supply voltage.
• 60MHz (-3dB) bandwidth
The EL5211A also features fast slewing and settling times,
as well as a high continuous output drive capability of 65mA
(sink and source). These features make the EL5211A ideal
for high speed filtering and signal conditioning application.
Other applications include battery-powered, portable devices
and anywhere low power consumption is important.
• Rail-to-rail output swing
The EL5211A is available in the 8 Ld HMSOP package,
features a standard operational amplifier pinout, and is
specified for operation over a temperature range of -40°C to
+85°C.
• TFT-LCD panels
FN6143.2
• Supply voltage = 4.5V to 16.5V
• Low supply current (per amplifier) = 2.5mA
• High slew rate = 75V/µs
• Unity-gain stable
• Beyond the rails input capability
• ±110mA output short current
• Pb-free (RoHS compliant)
Applications
• VCOM amplifiers
• Drivers for A/D converters
• Data acquisition
Ordering Information
PART NUMBER
(Note)
PART
MARKING
• Video processing
PACKAGE
(Pb-free)
PKG.
DWG. #
EL5211AIYEZ
BBLAA
8 Ld HMSOP
(3.0mm)
MDP0050
EL5211AIYEZ-T7*
BBLAA
8 Ld HMSOP
(3.0mm)
MDP0050
EL5211AIYEZ-T13*
BBLAA
8 Ld HMSOP
(3.0mm)
MDP0050
• Audio processing
• Active filters
• Test equipment
• Battery-powered applications
• Portable equipment
Pinout
*Please refer to TB347 for details on reel specifications.
NOTE: These Intersil Pb-free plastic packaged products employ
special Pb-free material sets, molding compounds/die attach
materials, and 100% matte tin plate plus anneal (e3 termination
finish, which is RoHS compliant and compatible with both SnPb and
Pb-free soldering operations). Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J STD-020.
EL5211A
(8 LD HMSOP)
TOP VIEW
VOUTA 1
VINA- 2
VINA+ 3
VS- 4
1
8 VS+
7 VOUTB
+
+
6 VINB5 VINB+
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2005, 2007, 2009. All Rights Reserved.
All other trademarks mentioned are the property of their respective owners.
EL5211A
Absolute Maximum Ratings (TA = +25°C)
Thermal Information
Supply Voltage between VS+ and VS- . . . . . . . . . . . . . . . . . . . .+18V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . VS- - 0.5V, VS +0.5V
Maximum Continuous Output Current . . . . . . . . . . . . . . . . . . ±65mA
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Ambient Operating Temperature . . . . . . . . . . . . . . . .-40°C to +85°C
Maximum Die Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . +150°C
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves
Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests are
at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
Electrical Specifications
PARAMETER
VS+ = +5V, VS- = -5V, RL = 1k to 0V, TA = +25°C, Unless Otherwise Specified. Parameters with MIN and/or
MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by
characterization and are not production tested.
DESCRIPTION
CONDITIONS
MIN
TYP
MAX
UNIT
3
15
mV
INPUT CHARACTERISTICS
VOS
Input Offset Voltage
TCVOS
Average Offset Voltage Drift (Note 1)
IB
Input Bias Current
RIN
Input Impedance
1
G
CIN
Input Capacitance
2
pF
CMIR
Common-Mode Input Range
CMRR
Common-Mode Rejection Ratio
for VIN from -5.5V to 5.5V
50
70
dB
AVOL
Open-Loop Gain
-4.5V VOUT 4.5V
60
70
dB
VCM = 0V
7
VCM = 0V
2
-5.5
µV/°C
60
+5.5
nA
V
OUTPUT CHARACTERISTICS
VOL
Output Swing Low
IL = -5mA
VOH
Output Swing High
IL = 5mA
ISC
IOUT
-4.9
4.8
-4.8
V
4.9
V
Short-Circuit Current
±110
mA
Output Current
±65
mA
80
dB
POWER SUPPLY PERFORMANCE
PSRR
Power Supply Rejection Ratio
VS is moved from ±2.25V to ±7.75V
IS
Supply Current
No load
5
60
7.5
mA
DYNAMIC PERFORMANCE
SR
Slew Rate (Note 2)
-4.0V VOUT 4.0V, 20% to 80%
75
V/µs
tS
Settling to +0.1% (AV = +1)
(AV = +1), VO = 2V step
80
ns
BW
-3dB Bandwidth
60
MHz
GBWP
Gain-Bandwidth Product
32
MHz
PM
Phase Margin
50
°
CS
Channel Separation
f = 5MHz
110
dB
dG
Differential Gain (Note 3)
RF = RG = 1kand VOUT = 1.4V
0.17
%
dP
Differential Phase (Note 3)
RF = RG = 1kand VOUT = 1.4V
0.24
°
NOTES:
1. Measured over operating temperature range.
2. Slew rate is measured on rising and falling edges.
3. NTSC signal generator used.
2
FN6143.2
July 23, 2009
EL5211A
Electrical Specifications
PARAMETER
VS+ = +5V, VS- = 0V, RL = 1k to 2.5V, TA = +25°C, Unless Otherwise Specified. Parameters with MIN and/or
MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by
characterization and are not production tested.
DESCRIPTION
CONDITION
MIN
TYP
MAX
UNIT
3
15
mV
INPUT CHARACTERISTICS
VOS
Input Offset Voltage
TCVOS
Average Offset Voltage Drift (Note 4)
IB
Input Bias Current
RIN
Input Impedance
1
G
CIN
Input Capacitance
2
pF
CMIR
Common-Mode Input Range
CMRR
Common-Mode Rejection Ratio
for VIN from -0.5V to 5.5V
45
66
dB
AVOL
Open-Loop Gain
0.5V VOUT 4.5V
60
70
dB
VCM = 2.5V
7
VCM = 2.5V
2
-0.5
µV/°C
60
+5.5
nA
V
OUTPUT CHARACTERISTICS
VOL
Output Swing Low
IL = -5mA
VOH
Output Swing High
IL = 5mA
ISC
IOUT
100
4.8
200
mV
4.9
V
Short-Circuit Current
±110
mA
Output Current
±65
mA
80
dB
POWER SUPPLY PERFORMANCE
PSRR
Power Supply Rejection Ratio
VS is moved from 4.5V to 15.5V
IS
Supply Current
No load
5
60
7.5
mA
DYNAMIC PERFORMANCE
SR
Slew Rate (Note 5)
1V VOUT 4V, 20% to 80%
75
V/µs
tS
Settling to +0.1% (AV = +1)
(AV = +1), VO = 2V step
80
ns
BW
-3dB Bandwidth
60
MHz
GBWP
Gain-Bandwidth Product
32
MHz
PM
Phase Margin
50
°
CS
Channel Separation
f = 5MHz
110
dB
dG
Differential Gain (Note 6)
RF = RG = 1k and VOUT = 1.4V
0.17
%
dP
Differential Phase (Note 6)
RF = RG = 1k and VOUT = 1.4V
0.24
°
NOTES:
4. Measured over operating temperature range.
5. Slew rate is measured on rising and falling edges.
6. NTSC signal generator used.
Electrical Specifications
PARAMETER
VS+ = +15V, VS- = 0V, RL = 1k to 7.5V, TA = +25°C, Unless Otherwise Specified. Parameters with MIN and/or
MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by
characterization and are not production tested.
DESCRIPTION
CONDITION
MIN
TYP
MAX
UNIT
3
15
mV
INPUT CHARACTERISTICS
VOS
Input Offset Voltage
TCVOS
Average Offset Voltage Drift (Note 7)
IB
Input Bias Current
RIN
Input Impedance
3
VCM = 7.5V
7
VCM = 7.5V
2
1
µV/°C
60
nA
G
FN6143.2
July 23, 2009
EL5211A
Electrical Specifications
PARAMETER
VS+ = +15V, VS- = 0V, RL = 1k to 7.5V, TA = +25°C, Unless Otherwise Specified. Parameters with MIN and/or
MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by
characterization and are not production tested. (Continued)
DESCRIPTION
CONDITION
MIN
TYP
MAX
UNIT
CIN
Input Capacitance
2
pF
CMIR
Common-Mode Input Range
CMRR
Common-Mode Rejection Ratio
for VIN from -0.5V to 15.5V
53
72
dB
AVOL
Open-Loop Gain
0.5V VOUT 14.5V
60
70
dB
-0.5
+15.5
V
OUTPUT CHARACTERISTICS
VOL
Output Swing Low
IL = -5mA
VOH
Output Swing High
IL = 5mA
ISC
IOUT
100
14.8
200
mV
14.9
V
Short-Circuit Current
±110
mA
Output Current
±65
mA
80
dB
POWER SUPPLY PERFORMANCE
PSRR
Power Supply Rejection Ratio
VS is moved from 4.5V to 15.5V
IS
Supply Current
No load
5
60
7.5
mA
DYNAMIC PERFORMANCE
SR
Slew Rate (Note 8)
1V VOUT 14V, 20% to 80%
75
V/µs
tS
Settling to +0.1% (AV = +1)
(AV = +1), VO = 2V step
80
ns
BW
-3dB Bandwidth
60
MHz
GBWP
Gain-Bandwidth Product
32
MHz
PM
Phase Margin
50
°
CS
Channel Separation
f = 5MHz
110
dB
dG
Differential Gain (Note 9)
RF = RG = 1k and VOUT = 1.4V
0.16
%
dP
Differential Phase (Note 9)
RF = RG = 1k and VOUT = 1.4V
0.22
°
NOTES:
7. Measured over operating temperature range.
8. Slew rate is measured on rising and falling edges.
9. NTSC signal generator used.
Typical Performance Curves
TYPICAL
PRODUCTION
DISTRIBUTION
300
200
100
VS = ±5V
TYPICAL
PRODUCTION
DISTRIBUTION
20
15
10
5
4
21
19
17
15
13
11
9
7
5
12
8
10
6
4
2
-0
-2
-4
-6
-8
-10
-12
INPUT OFFSET VOLTAGE (mV)
FIGURE 1. INPUT OFFSET VOLTAGE DISTRIBUTION
3
0
0
1
400
25
VS = ±5V
TA = +25°C
QUANTITY (AMPLIFIERS)
QUANTITY (AMPLIFIERS)
500
INPUT OFFSET VOLTAGE DRIFT, TCVOS (µV/°C)
FIGURE 2. INPUT OFFSET VOLTAGE DRIFT
FN6143.2
July 23, 2009
EL5211A
Typical Performance Curves (Continued)
0.008
INPUT BIAS CURRENT (µA)
INPUT OFFSET VOLTAGE (mV)
2.0
1.5
1.0
0.5
0
-0.5
-50
-10
30
70
110
VS = ±5V
0.004
0
-0.004
-0.008
-0.012
-50
150
-10
TEMPERATURE (°C)
OUTPUT LOW VOLTAGE (V)
OUTPUT HIGH VOLTAGE (V)
4.92
4.90
4.88
-10
30
70
150
110
VS = ±5V
IOUT = 5mA
-4.87
-4.89
-4.91
-4.93
-4.95
-50
150
-10
TEMPERATURE (°C)
30
70
110
150
TEMPERATURE (°C)
FIGURE 5. OUTPUT HIGH VOLTAGE vs TEMPERATURE
FIGURE 6. OUTPUT LOW VOLTAGE vs TEMPERATURE
75
78
VS = ±5V
RL = 1k
70
65
VS = ±5V
77
SLEW RATE (V/µs)
OPEN-LOOP GAIN (dB)
110
FIGURE 4. INPUT BIAS CURRENT vs TEMPERATURE
-4.85
VS = ±5V
IOUT = 5mA
4.94
4.86
-50
70
TEMPERATURE (°C)
FIGURE 3. INPUT OFFSET VOLTAGE vs TEMPERATURE
4.96
30
76
75
74
73
60
-50
-10
30
70
110
150
TEMPERATURE (°C)
FIGURE 7. OPEN-LOOP GAIN vs TEMPERATURE
5
72
-50
-10
30
70
110
150
TEMPERATURE (°C)
FIGURE 8. SLEW RATE vs TEMPERATURE
FN6143.2
July 23, 2009
EL5211A
Typical Performance Curves (Continued)
2.70
TA = +25°C
2.7
SUPPLY CURRENT (mA)
2.5
2.3
2.1
1.9
1.7
1.5
4
8
12
16
VS = ±5V
2.65
2.60
2.55
2.50
2.45
2.40
-50
20
-10
SUPPLY VOLTAGE (V)
110
150
FIGURE 10. SUPPLY CURRENT PER AMPLIFIER vs
TEMPERATURE
0
0.30
DIFFERENTIAL PHASE (°)
-0.02
-0.04
-0.06
-0.08
-0.10
-0.12
-0.14 V = ±5V
S
-0.16 AV = 2
RL = 1k
-0.18
0
0.25
0.20
0.15
0.10
0.05
0
100
0
200
100
IRE
-30
FIGURE 12. DIFFERENTIAL PHASE
80
VS = ±5V
AV = 2
RL = 1k
FREQ = 1MHz
-40
GAIN (dB)
2nd HD
-70
-90
4
6
8
10
VOP-P (V)
FIGURE 13. HARMONIC DISTORTION vs VOP-P
6
40
20
130
PHASE
70
0
3rd HD
2
190
GAIN
-60
0
250
60
-50
-80
200
IRE
FIGURE 11. DIFFERENTIAL GAIN
DISTORTION (dB)
70
TEMPERATURE (°C)
FIGURE 9. SUPPLY CURRENT PER AMPLIFIER vs SUPPLY
VOLTAGE
DIFFERENTIAL GAIN (%)
30
-20
1k
PHASE (°)
SUPPLY CURRENT (mA)
2.9
10
10k
100k
1M
10M
-50
100M
FREQUENCY (Hz)
FIGURE 14. OPEN LOOP GAIN AND PHASE
FN6143.2
July 23, 2009
EL5211A
MAGNITUDE (NORMALIZED) (dB)
5
3
VS = ±5V
AV = 1
CLOAD = 0pF
MAGNITUDE (NORMALIZED) (dB)
Typical Performance Curves (Continued)
1k
1
-1
560
-3
150
-5
100k
1M
100pF
15
1000pF
47pF
10pF
5
-5
-15
VS = ±5V
AV = 1
RL = 1k
-25
100k
100M
10M
25
1M
FREQUENCY (Hz)
FIGURE 16. FREQUENCY RESPONSE FOR VARIOUS CL
MAXIMUM OUTPUT SWING (VP-P)
OUTPUT IMPEDANCE ()
400
350
300
250
200
150
100
50
100k
1M
100M
FREQUENCY (Hz)
FIGURE 15. FREQUENCY RESPONSE FOR VARIOUS RL
0
10k
10M
10M
100M
12
10
8
6
4
VS = ±5V
2 AV = 1
RL = 1k
DISTORTION <1%
0
10k
100k
1M
10M
100M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 17. CLOSED LOOP OUTPUT IMPEDANCE
FIGURE 18. MAXIMUM OUTPUT SWING vs FREQUENCY
-15
-80
PSRR+
-35
-45
-40
-20
-55
-65
1k
PSRR-
-60
PSRR (dB)
CMRR (dB)
-25
VS = ±5V
TA = +25°C
10k
100k
1M
FREQUENCY (Hz)
FIGURE 19. CMRR
7
10M
100M
0
100
1k
10k
100k
1M
10M
FREQUENCY (Hz)
FIGURE 20. PSRR
FN6143.2
July 23, 2009
EL5211A
Typical Performance Curves (Continued)
-60
DUAL MEASURED CH A TO B
QUAD MEASURED CH A TO D OR B TO C
-80 OTHER COMBINATIONS YIELD
IMPROVED REJECTION
100
XTALK (dB)
VOLTAGE NOISE (nV/Hz)
1k
10
-100
-120
VS = ±5V
RL = 1k
AV = 1
VIN = 110mVRMS
-140
1
100
1k
10k
100k
1M
10M
-160
1k
100M
10k
100k
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 21. INPUT VOLTAGE NOISE SPECTRAL DENSITY
OVERSHOOT (%)
80
FIGURE 22. CHANNEL SEPARATION
5
VS = ±5V
AV = 1
RL = 1k
VIN = ±50mV
TA = +25°C
4
3
STEP SIZE (V)
100
10M 30M
1M
60
40
VS = ±5V
AV = 1
RL = 1k
0.1%
2
1
0
-1
-2
0.1%
-3
20
-4
0
10
100
1k
LOAD CAPACITANCE (pF)
FIGURE 23. SMALL-SIGNAL OVERSHOOT vs LOAD
CAPACITANCE
-5
55
65
75
85
95
105
SETTLING TIME (ns)
FIGURE 24. SETTLING TIME vs STEP SIZE
VS = ±5V
TA = +25°C
AV = 1
RL = 1k
VS = ±5V
TA = +25°C
AV = 1
RL = 1k
100mV STEP
1V STEP
50ns/DIV
FIGURE 25. LARGE SIGNAL TRANSIENT RESPONSE
8
50ns/DIV
FIGURE 26. SMALL SIGNAL TRANSIENT RESPONSE
FN6143.2
July 23, 2009
EL5211A
Pin Descriptions
PIN NUMBER
PIN NAME
1
VOUTA
FUNCTION
EQUIVALENT CIRCUIT
Amplifier A output
VS+
VS-
GND
CIRCUIT 1
2
VINA-
Amplifier A inverting input
VS+
VS-
CIRCUIT 2
3
VINA+
Amplifier A non-inverting input
(Reference Circuit 2)
4
VS-
5
VINB+
Amplifier B non-inverting input
(Reference Circuit 2)
6
VINB-
Amplifier B inverting input
(Reference Circuit 2)
7
VOUTB
Amplifier B output
(Reference Circuit 1)
8
VS+
Negative power supply
Positive power supply
The EL5211A voltage feedback amplifier is fabricated using
a high voltage CMOS process. It exhibits rail-to-rail input and
output capability, is unity gain stable, and has low power
consumption (2.5mA per amplifier). These features make
the EL5211A ideal for a wide range of general-purpose
applications. Connected in voltage follower mode and driving
a load of 1k, the EL5211A has a -3dB bandwidth of 60MHz
while maintaining a 75V/µs slew rate.
5V
Operating Voltage, Input, and Output
The EL5211A is specified with a single nominal supply
voltage from 5V to 15V or a split supply with its total range
from 5V to 15V. Correct operation is guaranteed for a supply
range of 4.5V to 16.5V. Most EL5211A specifications are
stable over both the full supply range and operating
temperatures of -40°C to +85°C. Parameter variations with
operating voltage and/or temperature are shown in the
“Typical Performance Curves” on page 4.
The input common-mode voltage range of the EL5211A
extends 500mV beyond the supply rails. The output swings
of the EL5211A typically extend to within 100mV of positive
and negative supply rails with load currents of 5mA.
Decreasing load currents will extend the output voltage
range even closer to the supply rails. Figure 27 shows the
9
10µs
INPUT
Product Description
input and output waveforms for the device in the unity-gain
configuration. Operation is from ±5V supply with a 1k load
connected to GND. The input is a 10VP-P sinusoid. The
output voltage is approximately 9.8VP-P.
5V
VS = ±5V
TA = +25°C
AV = 1
VIN = 10VP-
OUTPUT
Applications Information
FIGURE 27. OPERATION WITH RAIL-TO-RAIL INPUT AND
OUTPUT
Short Circuit Current Limit
The EL5211A will limit the short circuit current to ±110mA if the
output is directly shorted to the positive or the negative supply.
If an output is shorted indefinitely, the power dissipation could
easily increase such that the device may be damaged.
Maximum reliability is maintained if the output continuous
current never exceeds ±65mA. This limit is set by the design of
the internal metal interconnects.
FN6143.2
July 23, 2009
EL5211A
Output Phase Reversal
when sinking,
The EL5211A is immune to phase reversal as long as the input
voltage is limited from VS- -0.5V to VS+ +0.5V. Figure 28 shows
a photo of the output of the device with the input voltage driven
beyond the supply rails. Although the device's output will not
change phase, the input's overvoltage should be avoided. If an
input voltage exceeds supply voltage by more than 0.6V,
electrostatic protection diodes placed in the input stage of the
device begin to conduct and overvoltage damage could occur.
where:
VS = ±2.5V
TA = +25°C
AV = 1
VIN = 6VP-P
• VOUTi = Maximum output voltage of the application
• ILOADi = Load current
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
0.6
FIGURE 28. OPERATION WITH BEYOND-THE-RAILS INPUT
Power Dissipation
With the high-output drive capability of the EL5211A
amplifier, it is possible to exceed the +150°C absolute
maximum junction temperature under certain load current
conditions. Therefore, it is important to calculate the
maximum junction temperature for the application to
determine if load conditions need to be modified for the
amplifier to remain in the safe operating area.
The maximum power dissipation allowed in a package is
determined according to Equation 1:
T JMAX – T AMAX
P DMAX = -------------------------------------------- JA
• ISMAX = Maximum supply current per amplifier
If we set the two PDMAX equations equal to each other, we
can solve for RLOADi to avoid device overheat. Figures 29
and 30 provide a convenient way to see if the device will
overheat. The maximum safe power dissipation can be found
graphically, based on the package type and the ambient
temperature. By using the Equation 3, it is a simple matter to
see if PDMAX exceeds the device's power derating curves. To
ensure proper operation, it is important to observe the
recommended derating curves shown in Figures 29 and 30.
10µs
1V
• VS = Total supply voltage
POWER DISSIPATION (W)
1V
• i = 1 to 2 for dual and 1 to 4 for quad
556mW
0.5
HMSOP8
JA = 225°C/W
0.4
0.3
0.2
0.1
0
0
25
50
75 85
100
125
AMBIENT TEMPERATURE (°C)
FIGURE 29. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
(EQ. 1)
where:
2.5
• TJMAX = Maximum junction temperature
• JA = Thermal resistance of the package
• PDMAX = Maximum power dissipation in the package
The maximum power dissipation actually produced by an IC
is the total quiescent supply current times the total power
supply voltage, plus the power in the IC due to the loads, or:
(EQ. 2)
POWER DISSIPATION (W)
2.16W
• TAMAX = Maximum ambient temperature
P DMAX = i  V S  I SMAX +  V S + – V OUT i   I LOAD i 
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
2.0
HMSOP8
JA = 58°C/W
1.5
1.0
0.5
0
0
25
50
75 85
100
125
AMBIENT TEMPERATURE (°C)
when sourcing, and:
P DMAX = i  V S  I SMAX +  V OUT i – V S -   I LOAD i 
10
(EQ. 3)
FIGURE 30. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
FN6143.2
July 23, 2009
EL5211A
Unused Amplifiers
It is recommended that any unused amplifiers be configured
as a unity gain follower. The inverting input should be directly
connected to the output and the non-inverting input tied to
the ground plane.
Power Supply Bypassing and Printed Circuit
Board Layout
The EL5211A can provide gain at high frequency. As with
any high-frequency device, good printed circuit board layout
is necessary for optimum performance. Ground plane
construction is highly recommended, lead lengths should be
as short as possible and the power supply pins must be well
bypassed to reduce the risk of oscillation. For normal single
supply operation, where the VS- pin is connected to ground,
a 0.1µF ceramic capacitor should be placed from VS+ to pin
to VS- pin. A 4.7µF tantalum capacitor should then be
connected in parallel, placed in the region of the amplifier.
One 4.7µF capacitor may be used for multiple devices. This
same capacitor combination should be placed at each
supply pin to ground if split supplies are to be used.
11
FN6143.2
July 23, 2009
EL5211A
HMSOP (Heat-Sink MSOP) Package Family
E
B
0.25 M C A B
E1
MDP0050
HMSOP (HEAT-SINK MSOP) PACKAGE FAMILY
MILLIMETERS
1
N
SYMBOL
D
(N/2)+1
(N/2)
PIN #1
I.D.
A
TOP VIEW
E2
EXPOSED
THERMAL PAD
D1
BOTTOM VIEW
HMSOP8 HMSOP10
TOLERANCE
NOTES
A
1.00
1.00
Max.
-
A1
0.075
0.075
+0.025/-0.050
-
A2
0.86
0.86
±0.09
-
b
0.30
0.20
+0.07/-0.08
-
c
0.15
0.15
±0.05
-
D
3.00
3.00
±0.10
1, 3
D1
1.85
1.85
Reference
-
E
4.90
4.90
±0.15
-
E1
3.00
3.00
±0.10
2, 3
E2
1.73
1.73
Reference
-
e
0.65
0.50
Basic
-
L
0.55
0.55
±0.15
-
L1
0.95
0.95
Basic
-
N
8
10
Reference
Rev. 1 2/07
e
NOTES:
H
1. Plastic or metal protrusions of 0.15mm maximum per side are not
included.
C
SEATING
PLANE
2. Plastic interlead protrusions of 0.25mm maximum per side are
not included.
0.08 M C A B
b
0.10 C
N LEADS
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
SIDE VIEW
L1
A
c
END VIEW
SEE DETAIL "X"
A2
GAUGE
0.25 PLANE
L
3¬× ¬±
A1
DETAIL X
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9001 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
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12
FN6143.2
July 23, 2009
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