Si1443EDH Datasheet

New Product
Si1443EDH
Vishay Siliconix
P-Channel 30 V (D-S) MOSFET
FEATURES
PRODUCT SUMMARY
VDS (V)
- 30
RDS(on) ()
ID (A)
0.054 at VGS = - 10 V
- 4a
0.062 at VGS = - 4.5 V
- 4a
0.085 at VGS = - 2.5 V
- 3.4
Qg (Typ.)
8.6 nC
•
•
•
•
TrenchFET® Power MOSFET
Typical ESD Performance 1500 V HBM
100 % Rg Tested
Material categorization:
For definitions of compliance please see
www.vishay.com/doc?99912
APPLICATIONS
• Load Switch for Portable Devices
- Cellular Phone
- DSC
- Portable Game Console
- MP3
- GPS
• Soft Turn-on Load Switch
SOT -363
SC-70 (6-LEADS)
D
1
6
D
D
2
5
D
G
3
4
S
S
BT
X
YY
Marking Code
G
Lot Traceability
and Date Code
Top View
Ordering Information:
Si1443EDH-T1-GE3 (Lead (Pb)-free and Halogen-free)
R
Part # Code
D
P-Channel MOSFET
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C, unless otherwise noted)
Parameter
Symbol
Limit
Drain-Source Voltage
VDS
- 30
Gate-Source Voltage
VGS
± 12
TC = 70 °C
TA = 25 °C
- 4a
ID
- 4a, b, c
- 3.4b, c
TA = 70 °C
Pulsed Drain Current (t = 300 µs)
IDM
Continuous Source-Drain Diode Current
Maximum Power Dissipation
TC = 25 °C
TA = 25 °C
- 15
IS
- 1.3b, c
TC = 25 °C
2.8
1.8
PD
W
1.6b, c
1b, c
TA = 70 °C
Operating Junction and Storage Temperature Range
A
- 2.3
TC = 70 °C
TA = 25 °C
V
- 4a
TC = 25 °C
Continuous Drain Current (TJ = 150 °C)
Unit
TJ, Tstg
- 55 to 150
°C
260
Soldering Recommendations (Peak Temperature)
THERMAL RESISTANCE RATINGS
Parameter
Maximum Junction-to-Ambient
b, d
Maximum Junction-to-Foot (Drain)
Symbol
Typical
Maximum
t5s
RthJA
60
80
Steady State
RthJF
34
45
Unit
°C/W
Notes:
a. Package limited.
b. Surface mounted on 1" x 1" FR4 board.
c. t = 5 s.
d. Maximum under steady state conditions is 125 °C/W.
Document Number: 67849
S12-0980-Rev. B, 30-Apr-12
For technical support, please contact: [email protected]
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This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
New Product
Si1443EDH
Vishay Siliconix
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
Parameter
Symbol
Test Conditions
Min.
VDS
VGS = 0 V, ID = - 250 µA
- 30
Typ.
Max.
Unit
Static
Drain-Source Breakdown Voltage
VDS/TJ
VDS Temperature Coefficient
VGS(th) Temperature Coefficient
VGS(th)/TJ
Gate-Source Threshold Voltage
VGS(th)
Gate-Source Leakage
ID = - 250 µA
VDS = VGS, ID = - 250 µA
IGSS
Zero Gate Voltage Drain Current
IDSS
On-State Drain Currenta
ID(on)
Drain-Source On-State Resistancea
Forward Transconductancea
V
- 22
- 0.6
- 1.5
VDS = 0 V, VGS = ± 12 V
± 20
VDS = 0 V, VGS = ± 4.5 V
±1
VDS = - 30 V, VGS = 0 V
-1
VDS = - 30 V, VGS = 0 V, TJ = 55 °C
VDS - 5 V, VGS = - 10 V
RDS(on)
gfs
mV/°C
2.6
V
µA
- 10
- 15
A
VGS = - 10 V, ID = - 4.3 A
0.043
0.054
VGS = - 4.5 V, ID = - 4 A
0.049
0.062
VGS = - 2.5 V, ID = - 3.5 A
0.067
0.085
VDS = - 15 V, ID = - 4.3 A
14
VDS = - 15 V, VGS = - 10 V, ID = - 4.3 A
18.5
28
8.6
13

S
Dynamicb
Total Gate Charge
Qg
Gate-Source Charge
Qgs
Gate-Drain Charge
Qgd
Gate Resistance
Rg
Turn-On Delay Time
VDS = - 15 V, VGS = - 4.5 V, ID = - 4.3 A
1.7
2.5
f = 1 MHz
0.09
td(on)
Rise Time
VDD = - 15 V, RL = 4.4 
ID  - 3.4 A, VGEN = - 4.5 V, Rg = 1 
tr
Turn-Off Delay Time
Fall Time
Rise Time
125
188
330
1673
tf
435
653
td(on)
40
60
VDD = - 15 V, RL = 4.4 
ID  - 3.4 A, VGEN = - 10 V, Rg = 1 
td(off)
Fall Time
0.90
1115
tr
Turn-Off Delay Time
0.45
220
td(off)
Turn-On Delay Time
nC
tf
64
98
1800
2700
420
630
k
ns
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
TC = 25 °C
IS
Pulse Diode Forward Current
ISM
Body Diode Voltage
VSD
Body Diode Reverse Recovery Time
trr
Body Diode Reverse Recovery Charge
Qrr
Reverse Recovery Fall Time
ta
Reverse Recovery Rise Time
tb
- 2.3
- 15
IS = - 3.4 A, VGS = 0 V
IF = - 3.4 A, dI/dt = 100 A/µs, TJ = 25 °C
A
- 0.85
- 1.2
V
14
21
ns
7
14
nC
9
5
ns
Notes:
a. Pulse test; pulse width  300 µs, duty cycle  2 %.
b. Guaranteed by design, not subject to production testing.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
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For technical support, please contact: [email protected]
Document Number: 67849
S12-0980-Rev. B, 30-Apr-12
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
New Product
Si1443EDH
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
10-2
0.025
TJ = 25 °C
10-3
IGSS - Gate Current (A)
IGSS - Gate Current (mA)
0.020
0.015
0.010
10-4
TJ = 150 °C
10-5
10-6
TJ = 25 °C
10-7
0.005
10-8
10-9
0.000
0
3
6
9
12
VGS - Gate-Source Voltage (V)
15
0
Gate Current vs. Gate-Source Voltage
3
6
9
12
VGS - Gate-to-Source Voltage (V)
15
Gate Current vs. Gate-Source Voltage
15
5
VGS = 10 V thru 3 V
4
ID - Drain Current (A)
ID - Drain Current (A)
12
VGS = 2 V
9
6
3
3
2
TC = 25 °C
1
TC = 125 °C
0
TC = - 55 °C
0
0
0.5
1
1.5
VDS - Drain-to-Source Voltage (V)
2
0
Output Characteristics
0.5
1
1.5
VGS - Gate-to-Source Voltage (V)
2
Transfer Characteristics
10
0.10
VGS - Gate-to-Source Voltage (V)
RDS(on) - On-Resistance (Ω)
ID = 4.3 A
0.08
VGS = 2.5 V
0.06
VGS = 4.5 V
VGS = 10 V
0.04
8
VDS = 7.5 V
6
VDS = 15 V
4
VDS = 24 V
2
0
0.02
0
3
6
9
ID - Drain Current (A)
12
On-Resistance vs. Drain Current
Document Number: 67849
S12-0980-Rev. B, 30-Apr-12
15
0
5
10
15
Qg - Total Gate Charge (nC)
20
Gate Charge
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This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
New Product
Si1443EDH
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
10
VGS = 10 V
ID = 4.3 A
1.40
IS - Source Current (A)
RDS(on) - On-Resistance (Normalized)
1.65
1.15
TJ = 150 °C
1
TJ = 25 °C
0.90
VGS = 4.5 V
0.65
- 50
- 25
0
25
50
75
100
125
0.1
0.0
150
0.2
TJ - Junction Temperature (°C)
On-Resistance vs. Junction Temperature
0.4
0.6
0.8
1.0
VSD - Source-to-Drain Voltage (V)
1.2
Source-Drain Diode Forward Voltage
0.95
0.15
0.8
0.12
VGS(th) (V)
RDS(on) - On-Resistance (Ω)
ID = 4.3 A
0.09
0.65
ID = 250 μA
TJ = 125 °C
0.06
0.5
TJ = 25 °C
0.03
0
2
4
6
8
VGS - Gate-to-Source Voltage (V)
10
0.35
- 50
- 25
0
25
50
75
100
125
150
TJ - Temperature (°C)
On-Resistance vs. Gate-to-Source Voltage
Threshold Voltage
100
30
Limited by RDS(on)*
24
ID - Drain Current (A)
Power (W)
10
18
12
100 μs
1
1 ms
10 ms
100 ms
1 s, 10 s
0.1
6
TC = 25 °C
Single Pulse
0
0.001
0.01
0.1
Time (s)
1
Single Pulse Power, Junction-to-Ambient
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4
10
0.01
0.1
DC
BVDSS Limited
1
10
100
VDS - Drain-to-Source Voltage (V)
* VGS > minimum VGS at which RDS(on) is specified
Safe Operating Area, Junction-to-Ambient
For technical support, please contact: [email protected]
Document Number: 67849
S12-0980-Rev. B, 30-Apr-12
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
New Product
Si1443EDH
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
7.00
ID - Drain Current (A)
5.25
Package Limited
3.50
1.75
0.00
0
25
50
75
100
TC - Case Temperature (°C)
125
150
4
1.2
3
0.9
Power (W)
Power (W)
Current Derating*
2
1
0.6
0.3
0
0.0
0
25
50
75
100
125
150
0
25
50
75
100
125
TC - Case Temperature (°C)
TA - Ambient Temperature (°C)
Power Derating, Junction-to-Foot
Power Derating, Junction-to-Ambient
150
* The power dissipation PD is based on TJ(max) = 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper
dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package
limit.
Document Number: 67849
S12-0980-Rev. B, 30-Apr-12
For technical support, please contact: [email protected]
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This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
New Product
Si1443EDH
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
1
Normalized Effective Transient
Thermal Impedance
Duty Cycle = 0.5
0.2
Notes:
0.1
0.1
PDM
0.05
t1
t2
0.02
1. Duty Cycle, D =
t1
t2
2. Per Unit Base = RthJA = 125 °C/W
3. TJM - TA = PDMZthJA (t)
Single Pulse
0.01
10-4
4. Surface Mounted
-3
-2
10
10
-1
10
1
Square Wave Pulse Duration (s)
10
100
1000
Normalized Thermal Transient Impedance, Junction-to-Ambient
1
Normalized Effective Transient
Thermal Impedance
Duty Cycle = 0.5
0.2
0.1
0.1
0.05
0.02
0.01
10-4
Single Pulse
10-3
10-2
10-1
Square Wave Pulse Duration (s)
1
10
Normalized Thermal Transient Impedance, Junction-to-Foot
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability
data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/
tape drawings, part marking, and reliability data, see www.vishay.com/ppg?67849.
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For technical support, please contact: [email protected]
Document Number: 67849
S12-0980-Rev. B, 30-Apr-12
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Package Information
Vishay Siliconix
SCĆ70:
6ĆLEADS
MILLIMETERS
6
5
Dim
A
A1
A2
b
c
D
E
E1
e
e1
L
4
E1 E
1
2
3
-B-
e
b
e1
D
-Ac
A2 A
L
A1
Document Number: 71154
06-Jul-01
INCHES
Min
Nom
Max
Min
Nom
Max
0.90
–
1.10
0.035
–
0.043
–
–
0.10
–
–
0.004
0.80
–
1.00
0.031
–
0.039
0.15
–
0.30
0.006
–
0.012
0.10
–
0.25
0.004
–
0.010
1.80
2.00
2.20
0.071
0.079
0.087
1.80
2.10
2.40
0.071
0.083
0.094
1.15
1.25
1.35
0.045
0.049
0.053
0.65BSC
0.026BSC
1.20
1.30
1.40
0.047
0.051
0.055
0.10
0.20
0.30
0.004
0.008
0.012
7_Nom
7_Nom
ECN: S-03946—Rev. B, 09-Jul-01
DWG: 5550
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AN815
Vishay Siliconix
Single-Channel LITTLE FOOTR SC-70 6-Pin MOSFET
Copper Leadframe Version
Recommended Pad Pattern and Thermal Performance
INTRODUCTION
EVALUATION BOARDS SINGLE SC70-6
The new single 6-pin SC-70 package with a copper leadframe
enables improved on-resistance values and enhanced
thermal performance as compared to the existing 3-pin and
6-pin packages with Alloy 42 leadframes. These devices are
intended for small to medium load applications where a
miniaturized package is required. Devices in this package
come in a range of on-resistance values, in n-channel and
p-channel versions. This technical note discusses pin-outs,
package outlines, pad patterns, evaluation board layout, and
thermal performance for the single-channel version.
The evaluation board (EVB) measures 0.6 inches by
0.5 inches. The copper pad traces are the same as in Figure 2.
The board allows examination from the outer pins to 6-pin DIP
connections, permitting test sockets to be used in evaluation
testing. See Figure 3.
52 (mil)
BASIC PAD PATTERNS
See Application Note 826, Recommended Minimum Pad
Patterns With Outline Drawing Access for Vishay Siliconix
MOSFETs, (http://www.vishay.com/doc?72286) for the basic
pad layout and dimensions. These pad patterns are sufficient
for the low to medium power applications for which this
package is intended. Increasing the drain pad pattern yields a
reduction in thermal resistance and is a preferred footprint.
The availability of four drain leads rather than the traditional
single drain lead allows a better thermal path from the package
to the PCB and external environment.
96 (mil)
6
5
4
1
2
3
71 (mil)
26 (mil)
13 (mil)
0, 0 (mil)
18 (mil)
26 (mil)
PIN-OUT
16 (mil)
Figure 1 shows the pin-out description and Pin 1
identification.The pin-out of this device allows the use of four
pins as drain leads, which helps to reduce on-resistance and
junction-to-ambient thermal resistance.
SOT-363
SC-70 (6-LEADS)
D
1
6
D
D
2
5
D
G
3
4
S
FIGURE 2.
SC-70 (6 leads) Single
The thermal performance of the single 6-pin SC-70 has been
measured on the EVB, comparing both the copper and
Alloy 42 leadframes. This test was first conducted on the
traditional Alloy 42 leadframe and was then repeated using the
1-inch2 PCB with dual-side copper coating.
Top View
FIGURE 1.
For package dimensions see outline drawing SC-70 (6-Leads)
(http://www.vishay.com/doc?71154)
Document Number: 71334
12-Dec-03
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1
AN815
Vishay Siliconix
Front of Board SC70-6
Back of Board SC70-6
vishay.com
FIGURE 3.
THERMAL PERFORMANCE
Junction-to-Foot Thermal Resistance
(Package Performance)
COOPER LEADFRAME
Room Ambient 25 _C
The junction to foot thermal resistance is a useful method of
comparing different packages thermal performance.
A helpful way of presenting the thermal performance of the
6-Pin SC-70 copper leadframe device is to compare it to the
traditional Alloy 42 version.
Thermal performance for the 6-pin SC-70 measured as
junction-to-foot thermal resistance, where the “foot” is the
drain lead of the device at the bottom where it meets the PCB.
The junction-to-foot thermal resistance is typically 40_C/W in
the copper leadframe and 163_C/W in the Alloy 42 leadframe
— a four-fold improvement. This improved performance is
obtained by the enhanced thermal conductivity of copper over
Alloy 42.
The typical RqJA for the single 6-pin SC-70 with copper
leadframe is 103_C/W steady-state, compared with 212_C/W
for the Alloy 42 version. The figures are based on the 1-inch2
FR4 test board. The following example shows how the thermal
resistance impacts power dissipation for the two different
leadframes at varying ambient temperatures.
ALLOY 42 LEADFRAME
PD +
Rq JA
Elevated Ambient 60 _C
PD +
T J(max) * T A
Rq JA
o
o
P D + 150 Co* 25 C
212 CńW
o
o
P D + 150 Co* 25 C
212 CńW
P D + 590 mW
P D + 425 mW
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2
T J(max) * T A
T J(max) * T A
Rq JA
PD +
T J(max) * T A
Rq JA
o
o
P D + 150 Co* 25 C
124 CńW
o
o
P D + 150 Co* 60 C
124 CńW
P D + 1.01 W
P D + 726 mW
As can be seen from the calculations above, the compact 6-pin
SC-70 copper leadframe LITTLE FOOT power MOSFET can
handle up to 1 W under the stated conditions.
Testing
To further aid comparison of copper and Alloy 42 leadframes,
Figure 5 illustrates single-channel 6-pin SC-70 thermal
performance on two different board sizes and two different pad
patterns. The measured steady-state values of RqJA for the
two leadframes are as follows:
LITTLE FOOT 6-PIN SC-70
Power Dissipation
Room Ambient 25 _C
PD +
Elevated Ambient 60 _C
1) Minimum recommended pad pattern on
the EVB board V (see Figure 3.
1-inch2
2) Industry standard
PCB with
maximum copper both sides.
Alloy 42
Copper
329.7_C/W
208.5_C/W
211.8_C/W
103.5_C/W
The results indicate that designers can reduce thermal
resistance (RqJA) by 36% simply by using the copper
leadframe device rather than the Alloy 42 version. In this
example, a 121_C/W reduction was achieved without an
increase in board area. If increasing in board size is feasible,
a further 105_C/W reduction could be obtained by utilizing a
1-inch2 square PCB area.
The copper leadframe versions have the following suffix:
Single:
Si14xxEDH
Dual:
Si19xxEDH
Complementary: Si15xxEDH
Document Number: 71334
12-Dec-03
AN815
400
250
320
200
240
Thermal Resistance (C/W)
Thermal Resistance (C/W)
Vishay Siliconix
Alloy
42
160
Copper
80
150
Alloy
42
100
50
Copper
0
0
10-5
10-4
10-3
10-2
10-1
1
10
100
1000
10-5
Leadframe Comparison on EVB
Document Number: 71334
12-Dec-03
10-3
10-2
10-1
1
10
100
1000
Time (Secs)
Time (Secs)
FIGURE 4.
10-4
FIGURE 5.
Leadframe Comparison on Alloy 42 1-inch2 PCB
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3
Application Note 826
Vishay Siliconix
RECOMMENDED MINIMUM PADS FOR SC-70: 6-Lead
0.067
0.026
(0.648)
0.045
(1.143)
0.096
(2.438)
(1.702)
0.016
0.026
0.010
(0.406)
(0.648)
(0.241)
Recommended Minimum Pads
Dimensions in Inches/(mm)
Return to Index
APPLICATION NOTE
Return to Index
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18
Document Number: 72602
Revision: 21-Jan-08
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Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as Halogen-Free follow Halogen-Free
requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference
to the IEC 61249-2-21 definition. We confirm that all the products identified as being compliant to IEC 61249-2-21
conform to JEDEC JS709A standards.
Revision: 02-Oct-12
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Document Number: 91000