Si3805DV Datasheet

New Product
Si3805DV
Vishay Siliconix
P-Channel 20-V (D-S) MOSFET with Schottky Diode
FEATURES
PRODUCT SUMMARY
VDS (V)
ID (A)a
- 3.3
Qg (Typ.)
0.084 at VGS = - 10 V
0.108 at VGS = - 4.5 V
- 2.9
4 nC
0.175 at VGS = - 2.5 V
- 2.3
RDS(on) (Ω)
- 20
• Halogen-free According to IEC 61249-2-21
Definition
• LITTLE FOOT® Plus Schottky Power MOSFET
• Compliant to RoHS Directive 2002/95/EC
APPLICATIONS
• HDD
SCHOTTKY PRODUCT SUMMARY
VKA (V)
Vf (V)
Diode Forward Voltage
20
0.5 at 1 A
- DC-DC Converter
IF (A)a
2
TSOP-6
Top View
A
1
6
K
3 mm S
2
5
N/C
S
A
D
K
G
Marking Code
G
3
4
D
II
XXX
Lot Traceability
and Date Code
Part # Code
2.85 mm
Ordering Information: Si3805DV-T1-E3 (Lead (Pb)-free)
Si3805DV-T1-GE3 (Lead (Pb)-free and Halogen-free)
P-Channel MOSFET
ABSOLUTE MAXIMUM RATINGS TA = 25 °C, unless otherwise noted
Parameter
Symbol
VDS
Drain-Source Voltage (MOSFET)
Limit
Reverse Voltage (Schottky)
VKA
20
Gate-Source Voltage (MOSFET)
VGS
± 12
TC = 25 °C
Continuous Drain Current (TJ = 150 °C) (MOSFET)
TC = 70 °C
TA = 25 °C
ID
IDM
Pulsed Drain Current (MOSFET)
TC = 25 °C
TA = 25 °C
Maximum Power Dissipation (MOSFET)
IFM
- 0.9b, c
2b
5
1.4
TA = 25 °C
1.1b, c
PD
0.7b, c
1.4
TC = 70 °C
0.9
TA = 25 °C
1.1b, c
TJ, Tstg
A
- 1.2
0.9
TA = 70 °C
Document Number: 68912
S09-2110-Rev. B, 12-Oct-09
- 2.4b, c
- 15
TC = 70 °C
TC = 25 °C
Operating Junction and Storage Temperature Range
- 2.7
- 3.0b, c
TC = 25 °C
TA = 70 °C
Maximum Power Dissipation (Schottky)
IS
IF
Average Forward Current (Schottky)
Pulsed Forward Current (Schottky)
V
- 3.3
TA = 70 °C
Continuous Source-Drain Diode Current
(MOSFET Diode Conduction)
Unit
- 20
0.7b, c
- 55 to 150
W
°C
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New Product
Si3805DV
Vishay Siliconix
THERMAL RESISTANCE RATINGS
Parameter
Symbol
RthJA
RthJF
RthJA
RthJF
t≤5s
Steady State
t≤5s
Steady State
Maximum Junction-to-Ambient (MOSFET)b, d
Maximum Junction-to-Foot (Drain) (MOSFET)
Maximum Junction-to-Ambient (Schottky)b, e
Maximum Junction-to-Foot (Drain) (Schottky)
Typical
93
75
97
78
Maximum
110
90
115
95
Unit
°C/W
Notes:
a. Based on TC = 25 °C.
b. Surface Mounted on 1" x 1" FR4 board.
c. t = 5 s
d. Maximum under Steady State conditions is 150 °C/W.
e. Maximum under Steady State conditions is 155 °C/W.
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
Parameter
Symbol
Test Conditions
Min.
VDS
VGS = 0 V, ID = - 250 µA
- 20
Typ.
Max.
Unit
Static
Drain-Source Breakdown Voltage
VDS Temperature Coefficient
ΔVDS/TJ
VGS(th) Temperature Coefficient
ΔVGS(th)/TJ
ID = - 250 µA
Gate-Source Threshold Voltage
VGS(th)
VDS = VGS, ID = - 250 µA
Gate-Source Leakage
IGSS
VDS = 0 V, VGS = ± 12 V
Zero Gate Voltage Drain Current
IDSS
On-State Drain Currenta
ID(on)
Drain-Source On-State Resistancea
Forward Transconductancea
RDS(on)
gfs
Dynamicb
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
Total Gate Charge
Qg
Gate-Source Charge
Qgs
Gate-Drain Charge
Qgd
Gate Resistance
Rg
Turn-On Delay Time
Rise Time
Turn-Off DelayTime
Fall Time
Turn-On Delay Time
Rise Time
Turn-Off DelayTime
Fall Time
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2
mV/°C
3
- 0.6
- 1.5
V
± 100
nA
VDS = - 20 V, VGS = 0 V
-1
VDS = - 20 V, VGS = 0 V, TJ = 55 °C
- 10
VDS ≤ 5 V, VGS = - 4.5 V
VGS = - 10 V, ID = - 3.0 A
- 15
0.084
0.090
0.108
VGS = - 2.5 V, ID = 2.1 A
0.140
0.175
VDS = - 10 V, ID = - 3.0 A
6
330
VDS = - 10 V, VGS = 0 V, f = 1 MHz
80
pF
57
VDS = - 10 V, VGS = - 10 V, ID = - 3.0 A
VDS = - 10 V, VGS = - 4.5 V, ID = - 3.0 A
8
12
4
6
0.8
VDD = - 10 V, RL = 4.2 Ω
ID ≅ - 2.4 A, VGEN = - 10 V, Rg = 1 Ω
1.2
6
12
3
6
20
24
tf
8
15
td(on)
18
27
tr
tf
nC
1.4
f = 1 MHz
10
td(off)
Ω
S
16
td(off)
µA
A
0.070
VGS = - 4.5 V, ID = - 2.6 A
td(on)
tr
V
- 20
VDD = - 10 V, RL = 4.2 Ω
ID ≅ - 2.4 A, VGEN = - 4.5 V, Rg = 1 Ω
40
60
18
27
10
15
Ω
ns
Document Number: 68912
S09-2110-Rev. B, 12-Oct-09
New Product
Si3805DV
Vishay Siliconix
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
Parameter
Symbol
Test Conditions
IS
TC = 25 °C
Min.
Typ.
Max.
Unit
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
Pulse Diode Forward Current
ISM
Body Diode Voltage
VSD
Body Diode Reverse Recovery Time
trr
Body Diode Reverse Recovery Charge
Qrr
Reverse Recovery Fall Time
ta
Reverse Recovery Rise Time
tb
- 1.2
- 15
IS = - 1.0 A, VGS = 0 V
IF = - 2.4 A, dI/dt = 100 A/µs, TJ = 25 °C
A
- 0.75
- 1.2
V
23
35
ns
14
21
nC
11
ns
12
Notes:
a. Pulse test; pulse width ≤ 300 µs, duty cycle ≤ 2 %.
b. Guaranteed by design, not subject to production testing.
SCHOTTKY SPECIFICATIONS TJ = 25 °C, unless otherwise noted
Parameter
Forward Voltage Drop
Maximum Reverse Leakage Current
Junction Capacitance
Symbol
VF
Irm
CT
Test Conditions
IF = 1 A
Min.
Typ.
Max.
0.42
0.50
IF = 1 A, TJ = 125 °C
0.36
0.43
Vr = 5 V
0.015
0.08
Vr = 5 V, TJ = 85 °C
0.50
5.00
Vr = 20 V
0.02
0.10
Vr = 20 V, TJ = 85 °C
0.7
7.00
Vr = 20 V, TJ = 125 °C
5
50
Vr = 10 V
60
Unit
V
mA
pF
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
Document Number: 68912
S09-2110-Rev. B, 12-Oct-09
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New Product
Si3805DV
Vishay Siliconix
MOSFET TYPICAL CHARACTERISTICS TA = 25 °C, unless otherwise noted
15
2.0
VGS = 10 V thru 4 V
1.6
ID - Drain Current (A)
I D - Drain Current (A)
12
VGS = 3 V
9
6
3
TC = - 55 °C
1.2
0.8
TC = 25 °C
0.4
TC = 125 °C
VGS = 2 V
0
0
1
2
3
4
0.0
0.0
5
0.8
1.2
1.6
VDS - Drain-to-Source Voltage (V)
VGS - Gate-to-Source Voltage (V)
Output Characteristics
Transfer Characteristics
2.0
600
0.20
500
0.16
VGS = 2.5 V
C - Capacitance (pF)
RDS(on) - On-Resistance (Ω)
0.4
0.12
VGS = 4.5 V
0.08
VGS = 10 V
0.04
Ciss
400
300
200
Coss
100
Crss
0
0.00
0
3
6
9
12
0
15
4
8
16
20
VDS - Drain-to-Source Voltage (V)
ID - Drain Current (A)
Capacitance
On-Resistance vs. Drain Current and Gate Voltage
1.5
10
ID = 3 A
VGS = - 10 V, ID = - 3 A
8
R DS(on) - On-Resistance
(Normalized)
VGS - Gate-to-Source Voltage (V)
12
VDS = 10 V
6
VDS = 16 V
4
1.3
VGS = - 4.5 V, ID = - 2.6 A
1.1
0.9
2
0
0.0
1.5
3.0
4.5
6.0
Qg - Total Gate Charge (nC)
Gate Charge
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4
7.5
9.0
0.7
- 50
- 25
0
25
50
75
100
125
150
TJ - Junction Temperature (°C)
On-Resistance vs. Junction Temperature
Document Number: 68912
S09-2110-Rev. B, 12-Oct-09
New Product
Si3805DV
Vishay Siliconix
MOSFET TYPICAL CHARACTERISTICS TA = 25 °C, unless otherwise noted
0.20
10
ID = - 3 A
R DS(on) - On-Resistance (Ω)
I S - Source Current (A)
0.16
TJ = 150 °C
TJ = 25 °C
1
0.1
0.0
0.12
TJ = 125 °C
0.08
TJ = 25 °C
0.04
0.00
0.2
0.4
0.6
0.8
1.0
0
1.2
3
VSD - Source-to-Drain Voltage (V)
12
On-Resistance vs. Gate-to-Source Voltage
1.3
8
1.1
6
Power (W)
V GS(th) (V)
9
VGS - Gate-to-Source Voltage (V)
Soure-Drain Diode Forward Voltage
ID = 250 µA
0.9
4
2
0.7
0.5
- 50
6
0
- 25
0
25
50
75
100
125
150
0.1
0.01
10
1
Time (s)
TJ - Temperature (°C)
Single Pulse Power, Junction-to-Ambient
Threshold Voltage
100
Limited by RDS(on)*
I D - Drain Current (A)
10
1 ms
1
100 ms
10 ms
0.1
TA = 25 °C
Single Pulse
0.01
0.1
1 s,10 s
DC
BVDSS
Limited
1
10
100
VDS - Drain-to-Source Voltage (V)
* VGS > minimum VGS at which RDS(on) is specified
Safe Operating Area, Junction-to-Case
Document Number: 68912
S09-2110-Rev. B, 12-Oct-09
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New Product
Si3805DV
Vishay Siliconix
MOSFET TYPICAL CHARACTERISTICS TA = 25 °C, unless otherwise noted
2.0
4
1.6
Power (W)
ID - Drain Current (A)
3
2
1
1.2
0.8
0.4
0.0
0
0
25
50
75
100
125
0
150
25
TC - Case Temperature (°C)
50
75
100
125
150
TC - Case Temperature (°C)
Power Derating, Junction-to-Foot
Current Derating*
1.0
Power (W)
0.8
0.6
0.4
0.2
0.0
0
25
50
75
100
125
150
TA - Ambient Temperature (°C)
Power Derating, Junction-to-Ambient
* The power dissipation PD is based on TJ(max) = 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper
dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package
limit.
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Document Number: 68912
S09-2110-Rev. B, 12-Oct-09
New Product
Si3805DV
Vishay Siliconix
MOSFET TYPICAL CHARACTERISTICS TA = 25 °C, unless otherwise noted
2
1
Normalized Effective Transient
Thermal Impedance
Duty Cycle = 0.5
0.1
0.2
Notes:
0.1
PDM
t1
0.05
t2
1. Duty Cycle, D =
0.02
t1
t2
2. Per Unit Base = R thJA = 130 °C/W
3. T JM - TA = PDMZthJA(t)
4. Surface Mounted
Single Pulse
0.01
10-4
10-3
10-2
10-1
1
10
100
600
Square Wave Pulse Duration (s)
Normalized Thermal Transient Impedance, Junction-to-Ambient
2
Normalized Effective Transient
Thermal Impedance
1
Duty Cycle = 0.5
0.2
0.1
0.1
0.05
0.02
Single Pulse
0.01
10-4
10-3
10-2
10-1
Square Wave Pulse Duration (s)
1
10
Normalized Thermal Transient Impedance, Junction-to-Foot
Document Number: 68912
S09-2110-Rev. B, 12-Oct-09
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New Product
Si3805DV
Vishay Siliconix
SCHOTTKY TYPICAL CHARACTERISTICS TA = 25 °C, unless otherwise noted
10
10-1
10-3
I S - Source Current (A)
I R - Reverse Current (mA)
10-2
VR = 20 V
VR = 15 V
10-4
10-5
VR = 10 V
10-6
TJ = 150 °C
1
TJ = 25 °C
0.1
0.01
10-7
10-8
- 50
0.001
- 25
0
25
50
75
100
125
150
0.0
0.2
TJ - Junction Temperature (°C)
0.6
0.8
1.0
Forward Diode Voltage
Reverse Current vs. Junction Temperature
20
250
200
15
Power (W)
C - Capacitance (pF)
0.4
VSD - Source-to-Drain Voltage (V)
150
100
10
5
50
0
0
0
4
8
12
16
VDS - Drain-to-Source Voltage (V)
Capacitance
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8
20
0.001
0.01
0.1
1
10
Time (s)
Single Pulse Power, Junction-to-Ambient
Document Number: 68912
S09-2110-Rev. B, 12-Oct-09
New Product
Si3805DV
Vishay Siliconix
SCHOTTKY TYPICAL CHARACTERISTICS TA = 25 °C, unless otherwise noted
1
Normalized Effective Transient
Thermal Impedance
Duty Cycle = 0.5
0.2
0.1
0.1
Notes:
0.05
PDM
0.02
t1
t2
1. Duty Cycle, D =
t1
t2
2. Per Unit Base = R thJA = 132 °C/W
3. T JM - TA = PDMZthJA(t)
Single Pulse
0.01
10 -4
4. Surface Mounted
10 -3
10 -2
10 -1
1
Square Wave Pulse Duration (s)
100
10
1000
Normalized Thermal Transient Impedance, Junction-to-Ambient
1
Normalized Effective Transient
Thermal Impedance
Duty Cycle = 0.5
0.2
0.1
0.1
0.05
0.02
Single Pulse
0.01
10 -4
10 -3
10 -2
10 -1
Square Wave Pulse Duration (s)
1
10
Normalized Thermal Transient Impedance, Junction-to-Foot
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?68912.
Document Number: 68912
S09-2110-Rev. B, 12-Oct-09
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9
Package Information
Vishay Siliconix
TSOP: 5/6−LEAD
JEDEC Part Number: MO-193C
e1
e1
5
4
6
E1
1
2
5
4
E
E1
1
3
2
3
-B-
e
b
E
-B-
e
0.15 M C B A
5-LEAD TSOP
b
0.15 M C B A
6-LEAD TSOP
4x 1
-A-
D
0.17 Ref
c
R
R
A2 A
L2
Gauge Plane
Seating Plane
Seating Plane
0.08
C
L
A1
-C-
(L1)
4x 1
MILLIMETERS
Dim
A
A1
A2
b
c
D
E
E1
e
e1
L
L1
L2
R
Min
Nom
Max
Min
Nom
Max
0.91
-
1.10
0.036
-
0.043
0.01
-
0.10
0.0004
-
0.004
0.90
-
1.00
0.035
0.038
0.039
0.30
0.32
0.45
0.012
0.013
0.018
0.10
0.15
0.20
0.004
0.006
0.008
2.95
3.05
3.10
0.116
0.120
0.122
2.70
2.85
2.98
0.106
0.112
0.117
1.55
1.65
1.70
0.061
0.065
0.067
0.95 BSC
0.0374 BSC
1.80
1.90
2.00
0.071
0.075
0.079
0.32
-
0.50
0.012
-
0.020
0.60 Ref
0.024 Ref
0.25 BSC
0.010 BSC
0.10
-
-
0.004
-
-
0
4
8
0
4
8
7 Nom
1
ECN: C-06593-Rev. I, 18-Dec-06
DWG: 5540
Document Number: 71200
18-Dec-06
INCHES
7 Nom
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AN823
Vishay Siliconix
Mounting LITTLE FOOTR TSOP-6 Power MOSFETs
Surface mounted power MOSFET packaging has been based on
integrated circuit and small signal packages. Those packages
have been modified to provide the improvements in heat transfer
required by power MOSFETs. Leadframe materials and design,
molding compounds, and die attach materials have been
changed. What has remained the same is the footprint of the
packages.
The basis of the pad design for surface mounted power MOSFET
is the basic footprint for the package. For the TSOP-6 package
outline drawing see http://www.vishay.com/doc?71200 and see
http://www.vishay.com/doc?72610 for the minimum pad footprint.
In converting the footprint to the pad set for a power MOSFET, you
must remember that not only do you want to make electrical
connection to the package, but you must made thermal connection
and provide a means to draw heat from the package, and move it
away from the package.
In the case of the TSOP-6 package, the electrical connections are
very simple. Pins 1, 2, 5, and 6 are the drain of the MOSFET and
are connected together. For a small signal device or integrated
circuit, typical connections would be made with traces that are
0.020 inches wide. Since the drain pins serve the additional
function of providing the thermal connection to the package, this
level of connection is inadequate. The total cross section of the
copper may be adequate to carry the current required for the
application, but it presents a large thermal impedance. Also, heat
spreads in a circular fashion from the heat source. In this case the
drain pins are the heat sources when looking at heat spread on the
PC board.
Since surface mounted packages are small, and reflow soldering
is the most common form of soldering for surface mount
components, “thermal” connections from the planar copper to the
pads have not been used. Even if additional planar copper area is
used, there should be no problems in the soldering process. The
actual solder connections are defined by the solder mask
openings. By combining the basic footprint with the copper plane
on the drain pins, the solder mask generation occurs automatically.
A final item to keep in mind is the width of the power traces. The
absolute minimum power trace width must be determined by the
amount of current it has to carry. For thermal reasons, this
minimum width should be at least 0.020 inches. The use of wide
traces connected to the drain plane provides a low impedance
path for heat to move away from the device.
REFLOW SOLDERING
Vishay Siliconix surface-mount packages meet solder reflow
reliability requirements. Devices are subjected to solder reflow as a
test preconditioning and are then reliability-tested using
temperature cycle, bias humidity, HAST, or pressure pot. The
solder reflow temperature profile used, and the temperatures and
time duration, are shown in Figures 2 and 3.
Figure 1 shows the copper spreading recommended footprint for
the TSOP-6 package. This pattern shows the starting point for
utilizing the board area available for the heat spreading copper. To
create this pattern, a plane of copper overlays the basic pattern on
pins 1,2,5, and 6. The copper plane connects the drain pins
electrically, but more importantly provides planar copper to draw
heat from the drain leads and start the process of spreading the
heat so it can be dissipated into the ambient air. Notice that the
planar copper is shaped like a “T” to move heat away from the
drain leads in all directions. This pattern uses all the available area
underneath the body for this purpose.
0.167
4.25
0.074
1.875
0.014
0.35
0.122
3.1
0.026
0.65
0.049
1.25
0.049
1.25
0.010
0.25
FIGURE 1. Recommended Copper Spreading Footprint
Document Number: 71743
27-Feb-04
Ramp-Up Rate
+6_C/Second Maximum
Temperature @ 155 " 15_C
120 Seconds Maximum
Temperature Above 180_C
70 − 180 Seconds
Maximum Temperature
240 +5/−0_C
Time at Maximum Temperature
20 − 40 Seconds
Ramp-Down Rate
+6_C/Second Maximum
FIGURE 2. Solder Reflow Temperature Profile
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AN823
Vishay Siliconix
10 s (max)
255 − 260_C
1X4_C/s (max)
3-6_C/s (max)
217_C
140 − 170_C
60 s (max)
60-120 s (min)
Pre-Heating Zone
3_C/s (max)
Reflow Zone
Maximum peak temperature at 240_C is allowed.
FIGURE 3. Solder Reflow Temperature and Time Durations
THERMAL PERFORMANCE
TABLE 1.
Equivalent Steady State Performance—TSOP-6
Thermal Resistance Rqjf
30_C/W
On-Resistance vs. Junction Temperature
1.6
VGS = 4.5 V
ID = 6.1 A
1.4
rDS(on) − On-Resiistance
(Normalized)
A basic measure of a device’s thermal performance is the
junction-to-case thermal resistance, Rqjc, or the
junction-to-foot thermal resistance, Rqjf. This parameter is
measured for the device mounted to an infinite heat sink and
is therefore a characterization of the device only, in other
words, independent of the properties of the object to which the
device is mounted. Table 1 shows the thermal performance
of the TSOP-6.
1.2
1.0
0.8
0.6
−50
SYSTEM AND ELECTRICAL IMPACT OF
TSOP-6
−25
0
25
50
75
100
125
150
TJ − Junction Temperature (_C)
FIGURE 4. Si3434DV
In any design, one must take into account the change in
MOSFET rDS(on) with temperature (Figure 4).
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Document Number: 71743
27-Feb-04
Application Note 826
Vishay Siliconix
RECOMMENDED MINIMUM PADS FOR TSOP-6
0.099
0.039
0.020
0.019
(1.001)
(0.508)
(0.493)
0.064
(1.626)
0.028
(0.699)
(3.023)
0.119
(2.510)
Recommended Minimum Pads
Dimensions in Inches/(mm)
Return to Index
APPLICATION NOTE
Return to Index
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Document Number: 72610
Revision: 21-Jan-08
Legal Disclaimer Notice
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Vishay
Disclaimer
ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE
RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively,
“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other
disclosure relating to any product.
Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or
the continuing production of any product. To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all
liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special,
consequential or incidental damages, and (iii) any and all implied warranties, including warranties of fitness for particular
purpose, non-infringement and merchantability.
Statements regarding the suitability of products for certain types of applications are based on Vishay’s knowledge of typical
requirements that are often placed on Vishay products in generic applications. Such statements are not binding statements
about the suitability of products for a particular application. It is the customer’s responsibility to validate that a particular
product with the properties described in the product specification is suitable for use in a particular application. Parameters
provided in datasheets and/or specifications may vary in different applications and performance may vary over time. All
operating parameters, including typical parameters, must be validated for each customer application by the customer’s
technical experts. Product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase,
including but not limited to the warranty expressed therein.
Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining
applications or for any other application in which the failure of the Vishay product could result in personal injury or death.
Customers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk. Please
contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by
any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners.
Material Category Policy
Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as RoHS-Compliant fulfill the
definitions and restrictions defined under Directive 2011/65/EU of The European Parliament and of the Council
of June 8, 2011 on the restriction of the use of certain hazardous substances in electrical and electronic equipment
(EEE) - recast, unless otherwise specified as non-compliant.
Please note that some Vishay documentation may still make reference to RoHS Directive 2002/95/EC. We confirm that
all the products identified as being compliant to Directive 2002/95/EC conform to Directive 2011/65/EU.
Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as Halogen-Free follow Halogen-Free
requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference
to the IEC 61249-2-21 definition. We confirm that all the products identified as being compliant to IEC 61249-2-21
conform to JEDEC JS709A standards.
Revision: 02-Oct-12
1
Document Number: 91000