REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R222-97. - cs 97-02-28 Monica L. Poelking B Changes in accordance with NOR 5962-R440-97. – rc Update boilerplate to MIL-PRF-38535 requirements. Editorial changes throughout. – jak 97-08-18 Raymond Monnin 03-11-18 Thomas M. Hess Change title. Delete table III. Add table IB. Update radiation features in section 1.5 and paragraphs 4.4.4.1 – 4.4.4.5. Update boilerplate paragraphs to the current MIL-PRF-38535 requirements - jak. 10-06-16 Thomas M. Hess C D REV SHEET REV D D D D D D SHEET 15 16 17 18 19 20 REV STATUS REV D D D D D D D D D D D D D D OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Sandra Rooney STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http://www.dscc.dla.mil CHECKED BY Sandra Rooney APPROVED BY Monica L. Poelking DRAWING APPROVAL DATE 95-12-05 REVISION LEVEL D MICROCIRCUIT, DIGITAL, CMOS, RADIATION HARDENED, HEX D-TYPE FLIP-FLOP, MONOLITHIC SILICON SIZE CAGE CODE A 67268 SHEET DSCC FORM 2233 APR 97 1 OF 5962-96605 20 5962-E295-10 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 R Federal stock class designator \ 01 96605 RHA designator (see 1.2.1) Device type (see 1.2.2) / V X Device class designator (see 1.2.3) Case outline (see 1.2.4) C Lead finish (see 1.2.5) \/ Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 40174B CMOS, Radiation hardened, hex D-type flip-flop 02 40174BN CMOS, Radiation hardened, hex D-type flip-flop with neutron irradiated die. 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device requirements documentation Device class M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q, V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter E X Descriptive designator Terminals Package style CDIP2-T16 CDFP4-F16 16 16 Dual-in-line Flat pack 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-96605 A REVISION LEVEL D SHEET 2 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VDD) .................................................................................. -0.5 V dc to +20 V dc DC input voltage range (VIN) ................................................................................ -0.5 V dc to VDD + 0.5 V dc DC input current, any one input (IIN)..................................................................... 10 mA Device dissipation per output transistor ............................................................... 100 mW Storage temperature range (TSTG) ....................................................................... -65C to +150C Lead temperature (soldering, 10 seconds) .......................................................... +265C Thermal resistance, junction-to-case (JC): Case outline E ................................................................................................... 24C/W Case outline X ................................................................................................... 29C/W Thermal resistance, junction-to-ambient (JA): Case outline E ................................................................................................... 73C/W Case outline X ................................................................................................... 114C/W Junction temperature (TJ) .................................................................................... +175C Maximum package power dissipation at TA = +125C (PD): 4/ Case outline E ................................................................................................... 0.68 W Case outline X ................................................................................................... 0.44 W 1.4 Recommended operating conditions. Supply voltage range (VDD) .................................................................................. +3.0 V dc to +18 V dc Case operating temperature range (TC) ............................................................... -55C to +125C Input voltage range (VIN) ...................................................................................... +0.0 V to VDD Output voltage range (VOUT)................................................................................. +0.0 V to VDD 1.5 Radiation features: Maximum total dose available (dose rate = 50 - 300 rads (Si)/s) ........................ 1 x 105 Rads (Si) Single event phenomenon (SEP): effective LET, no latch-up (see 4.4.4.5) ............................................................. ≤ 75 MeV/(cm2/mg) 5/ 8 Dose rate upset (20 ns pulse) ............................................................................. ≥ 5 x 10 Rads (Si)/s 5/ 8 Dose rate induced latch-up ................................................................................. ≥ 2 x 10 Rads (Si)/s 5/ 11 Dose rate survivability ......................................................................................... ≥ 5 x 10 Rads (Si)/s 5/ 14 Neutron irradiated (device type 02) ..................................................................... ≥ 1 x 10 neutrons/cm2 1/ 2/ 3/ 4/ 5/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. Unless otherwise noted, all voltages are referenced to VSS. The limits for the parameters specified herein shall apply over the full specified VDD range and case temperature range of -55C to +125C unless otherwise noted. If device power exceeds package dissipation capability, provide heat sinking or derate linearly (the derating is based on JA) at the following rate: Case outline E ....................................................................................................... 13.7 mW/C Case outline X ....................................................................................................... 8.8 mW/C Guaranteed by design or process but not tested. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-96605 A REVISION LEVEL D SHEET 3 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those listed in the issue of the Department of Defense Index of Specifications and Standards (DoDISS) and supplement thereto, cited in the solicitation. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 MIL-STD-1835 - Test Method Standard Microcircuits. Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 MIL-HDBK-780 - List of Standard Microcircuit Drawings. Standard Microcircuit Drawings. (Copies of these documents are available online at https://assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents cited in the solicitation or contract. AMERICAN SOCIETY FOR TESTING AND MATERIALS (ASTM) ASTM F1192 - Standard Guide for the Measurement of Single Event Phenomena (SEP) Induced by Heavy Ion Irradiation of semiconductor Devices. (Copies of these documents are available online at http://www.astm.org or from ASTM International, 100 Barr Harbor Drive, P.O. Box C700, West Conshohocken, PA, 19428-2959). 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.1.1 Microcircuit die. For the requirements for microcircuit die, see appendix A to this document. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-96605 A REVISION LEVEL D SHEET 4 3.2.4 Switching waveforms. The switching waveforms shall be as specified on figure 3. 3.2.5 Radiation exposure circuit. The radiation exposure circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table IA and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical tests for each subgroup are defined in table IA. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the "5962-" on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a "QML" or "Q" as required in MIL-PRF-38535. The compliance mark for device class M shall be a "C" as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturer's product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCC's agent, and the acquiring activity retain the option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 38 (see MIL-PRF-38535, appendix A). STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-96605 A REVISION LEVEL D SHEET 5 TABLE IA. Electrical performance characteristics. Test Supply current Symbol IDD Conditions -55C TC +125C unless otherwise specified VDD = 5.0 V, VIN = 0.0 V or VDD Device type Group A subgroups All 1, 3 1/ 1.0 2 1/ 30.0 VDD = 10 V, VIN = 0.0 V or VDD VDD = 15 V, VIN = 0.0 V or VDD 2.0 60.0 1, 3 1/ 2.0 2 1/ 120.0 VDD = 18 V, VIN = VDD or 0.0 V VDD = 5.0 V VO = 0.4 V All VDD = 10 V VO = 0.5 V VDD = 15 V VO = 1.5 V High level output current (source) IOH VDD = 5.0 V VO = 4.6 V VDD = 10 V VO = 9.5 V VDD = 15 V VO = 13.5 V Output voltage, high Output voltage, low VOH VOL VDD = 5 V, no load 1/ All 1 2.0 2 200.0 1 7.5 3 2.0 1 0.53 2 1/ 0.36 3 1/ 0.64 1 1.4 2 1/ 0.9 3 1/ 1.6 1 3.5 2 1/ 2.4 3 1/ 4.2 All VDD = 5.0 V VO = 2.5 V -0.53 2 1/ -0.36 3 1/ -0.64 1 -1.8 2 1/ -1.15 3 1/ -2.0 1 -1.4 2 1/ -0.9 3 1/ -1.6 1 -3.5 2 1/ -2.4 3 1/ -4.2 4.95 VDD = 10 V, no load 1/ 1, 2, 3 9.95 VDD = 15 V, no load 3/ 1, 2, 3 14.95 All A mA 1 1, 2, 3 VDD = 5 V, no load 1/ Max 2 1/ M, D, P, L, R 2/ IOL Min Unit 1, 3 1/ VDD = 20 V, VIN = 0.0 V or VDD Low level output current (sink) Limits mA V 1, 2, 3 0.05 VDD = 10 V, no load 1/ 1, 2, 3 0.05 VDD = 15 V, no load 1, 2, 3 0.05 See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-96605 A REVISION LEVEL D SHEET 6 TABLE IA. Electrical performance characteristics – Continued. Test Symbol Input voltage, low VIL Input voltage, high VIH Input leakage current, low IIL Input leakage current, high IIH Negative threshold voltage VNTH Negative threshold voltage, delta VNTH Positive threshold voltage VPTH Positive threshold voltage, delta VPTH Input capacitance CIN 1/ Conditions -55C TC +125C unless otherwise specified Device type Group A subgroups All 1, 2, 3 1.5 VDD = 10 V, VOH > 9.0 V, VOL < 1.0 V 1/ 1, 2, 3 3.0 VDD = 15 V, VOH > 13.5 V, VOL < 1.5 V 1, 2, 3 4.0 VDD = 5 V, VOH > 4.5 V, VOL < 0.5 V VDD = 5 V, VOH > 4.5 V, VOL < 0.5 V VDD = 10 V, VOH > 9.0 V, VOL < 1.0 V 1/ 1, 2, 3 7.0 VDD = 15 V, VOH > 13.5 V, VOL < 1.5 V 1, 2, 3 11.0 1 -100 VIN = VDD or GND, VDD = 20 V 2 -1000 VIN = VDD or GND, VDD = 18 V 3 -100 VIN = VDD or GND, VDD = 20 V 1 100 VIN = VDD or GND, VDD = 20 V 2 1000 VIN = VDD or GND, VDD = 18 V 3 100 All VDD = 10 V, ISS = -10 A -0.7 -2.8 All 1 -0.2 -2.8 VDD = 10 V, ISS = -10 A M, D, P, L, R 2/ All 1 VSS = 0.0 V, IDD = 10 A All 1 All 1 VSS = 0.0 V, IDD = 10 A M, D, P, L, R 2/ All 1 1.0 V CLEAR, see 4.4.1c All 4 40.0 pF All others, see 4.4.1c V 1.0 V 0.7 2.8 V 0.2 2.8 4 VDD = 2.8 V, VIN = VDD or GND 7.5 VOL < VDD/2 V 9 300 ns 10, 11 405 All 7 VDD = 20 V, VIN = VDD or GND 7 VDD = 18 V, VIN = VDD or GND 8A VOH > VDD/2 7 VDD = 3.0 V, VIN = VDD or GND 8B M, D, P, L, R 2/ 4/ nA 1 M, D, P, L, R 2/ tPHL1, tPLH1 V All M, D, P, L, R 2/ Propagation delay time, CLOCK to output Max 3.5 M, D, P, L, R 2/ Functional tests Min Unit 1, 2, 3 VIN = VDD or GND, VDD = 20 V All Limits VDD = 5 V, VIN = VDD or GND 7 All M, D, P, L, R 2/ 9 405 VDD = 10 V 1/ 9 140 VDD = 15 V 1/ 9 100 See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-96605 A REVISION LEVEL D SHEET 7 TABLE IA. Electrical performance characteristics – Continued. Test Propagation delay time, CLEAR to output Symbol tPHL2, tPLH2 4/ Conditions -55C TC +125C unless otherwise specified VDD = 5 V, VIN = VDD or GND Device type Group A subgroups All fCL 4/ 200 270 M, D, P, L, R 2/ VDD = 10 V 1/ ts 1/ 4/ Minimum data hold time th 1/ 4/ Minimum CLOCK pulse width Maximum CLOCK rise and fall time tw1 1/ 4/ tr, tf 1/ 4/ Minimum CLEAR removal time Minimum CLEAR pulse width Transition time tREM 1/ 4/ tw2 1/ 4/ tTHL, tTLH 4/ 9 270 9 100 9 VDD = 5 V, VIN = VDD or GND All 3.5 10, 11 2.59 9 6.0 9 8.0 All 9 MHz 40.0 VDD = 10 V 9 20.0 VDD = 15 V 9 10.0 9 80.0 9 40.0 VDD = 5 V All VDD = 10 V VDD = 15 V VDD = 5 V All 9 30.0 9 130.0 VDD = 10 V 9 60.0 VDD = 15 V 9 40.0 VDD = 5 V All VDD = 10 V VDD = 15 V VDD = 5 V All 9 15.0 9 15.0 9 14.0 9 9 0 9 0 9 100 VDD = 10 V 9 50 VDD = 15 V 9 40 VDD = 5 V, VIN = VDD or GND All ns ns 0 VDD = 15 V All ns ns VDD = 10 V VDD = 5 V ns 80 9 VDD = 10 V 1/ VDD = 5 V Max 9 VDD = 15 V 1/ Minimum data setup time Min Unit 10, 11 VDD = 15 V 1/ Maximum CLOCK input frequency Limits 9 200 10, 11 270 VDD = 10 V 1/ 9 100 VDD = 15 V 1/ 9 80 ns ns ns 1/ These tests are controlled via design or process and are not directly tested. These parameters are characterized on initial design release and upon design changes which affect these characteristics. 2/ Devices supplied to this drawing will meet all levels M, D, P, L, R of irradiation. However, this device is only tested at the 'R' level. Pre and post irradiation values are identical unless otherwise specified in table IA. When performing post irradiation electrical measurements for any RHA level, TA = +25C. 3/ For accuracy, voltage is measured differentially to VDD. Limit is 0.050 V max. 4/ CL = 50 pF, RL = 200 k, input rise and fall times (tr, tf) < 20 ns. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-96605 A REVISION LEVEL D SHEET 8 TABLE IB. SEP test limits. 1/ 2/ Device type VDD = 5.0 V 3/ Effective LET no upsets [MeV/(mg/cm2)] LET 75 4/ All 1/ For SEP test conditions, see 4.4.4.5 herein. 2/ Technology characterization and model verification supplemented by in-line data may be used in lieu of end-of-line testing. Test plan must be approved by TRB and qualifying activity. 3/ Tested for upsets at worst case temperature, TA = +25C 10C. 4/ Guaranteed by design or process but not tested. Device types Case outlines Terminal number 01 and 02 E and X Terminal symbol 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 CLEAR Q1 D1 D2 Q2 D3 Q3 VSS CLOCK Q4 D4 Q5 D5 D6 Q6 VDD FIGURE 1. Terminal connections. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-96605 A REVISION LEVEL D SHEET 9 Device types 01 and 02 Inputs CLOCK X DATA 0 1 X X Output CLEAR 1 1 1 0 Q 0 1 NC 0 1 = High voltage level 0 = Low voltage level X = Don’t care = Low to high transition of the clock = High to low transition of the clock NC = No change FIGURE 2. Truth table. NOTE: (HL) or (LH) is optional. FIGURE 3. Switching waveforms. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-96605 A REVISION LEVEL D SHEET 10 4. VERIFICATION 4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with MIL-PRF-38535 or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted on all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. 4.2.1 Additional criteria for device class M. a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA = +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table IIA herein. 4.2.2 Additional criteria for device classes Q and V. a. The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under document revision level control of the device manufacturer's Technology Review Board (TRB) in accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. b. Interim and final electrical test parameters shall be as specified in table IIA herein. c. Additional screening for device class V beyond the requirements of device class Q shall be as specified in MIL-PRF-38535, appendix B or as modified in the device manufacturer’s Quality Management (QM) plan. 4.3 Qualification inspection for device classes Q and V. Qualification inspection for device classes Q and V shall be in accordance with MIL-PRF-38535. Inspections to be performed shall be those specified in MIL-PRF-38535 and herein for groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.4). 4.4 Conformance inspection. Technology conformance inspection for classes Q and V shall be in accordance with MIL-PRF-38535, including groups A, B, C, D, and E inspections and as specified herein. Quality conformance inspection for device class M shall be in accordance with MIL-PRF-38535, appendix A and as specified herein. Inspections to be performed for device class M shall be those specified in method 5005 of MIL-STD-883 and herein for groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.4). 4.4.1 Group A inspection. a. Tests shall be as specified in table IIA herein. b. For device class M, subgroups 7 and 8 tests shall be sufficient to verify the truth tables in figure 2 herein. For device classes Q and V, subgroups 7 and 8 shall include verifying the functionality of the device. c. Subgroup 4 (CIN measurement) shall be measured only for initial qualification and after process or design changes which may affect capacitance. CIN shall be measured between the designated terminal and GND at a frequency of 1 MHz. Tests shall be sufficient to validate the limits defined in table I herein. 4.4.2 Group C inspection. The group C inspection end-point electrical parameters shall be as specified in table IIA herein. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-96605 A REVISION LEVEL D SHEET 11 TABLE IIA. Electrical test requirements. Test requirements Interim electrical parameters (see 4.2) Final electrical parameters (see 4.2) Group A test requirements (see 4.4) Group C end-point electrical parameters (see 4.4) Group D end-point electrical parameters (see 4.4) Group E end-point electrical parameters (see 4.4) Subgroups (in accordance with MIL-STD-883, method 5005, table I) Device class M Subgroups (in accordance with MIL-PRF-38535, table III) Device class Q Device class V 1, 7, 9 1, 7, 9 1, 7, 9 1, 2, 3, 7, 8, 9, 10, 11 1/ 1, 2, 3, 7, 8, 9, 10, 11 1/ 1, 2, 3, 7, 8, 9, 10, 11 2/ 3/ 1, 2, 3, 4, 7, 8, 9, 10, 11 1, 2, 3, 4, 7, 8, 9, 10, 11 1, 2, 3, 4, 7, 8, 9, 10, 11 1, 2, 3, 7, 8, 9, 10, 11 1, 2, 3, 7, 8, 9, 10, 11 1, 2, 3, 7, 8, 9, 10, 11 3/ 1, 7, 9 1, 7, 9 1, 7, 9 1, 7, 9 1, 7, 9 1, 7, 9 1/ PDA applies to subgroups 1 and 7. 2/ PDA applies to subgroups 1, 7, 9, and deltas. 3/ Delta limits, as specified in table IIB, shall be required where specified, and the delta limits shall be completed with reference to the zero hour electrical parameters (see table I). TABLE IIB. Burn-in and operating life test, Delta parameters (+25C). Parameters Symbol Delta limits Supply current IDD 0.2 A Output current (sink), VDD = 5.0 V IOL 20% Output current (source) VDD = 5.0 V, VOUT = 4.6 V IOH 20% 4.4.2.1 Additional criteria for device class M. Steady-state life test conditions, method 1005 of MIL-STD-883: a. Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of MIL-STD-883. b. TA = +125C, minimum. c. Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883. 4.4.2.2 Additional criteria for device classes Q and V. The steady-state life test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The test circuit shall be maintained under document revision level control by the device manufacturer's TRB in accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of MIL-STD-883. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-96605 A REVISION LEVEL D SHEET 12 4.4.3 Group D inspection. The group D inspection end-point electrical parameters shall be as specified in table IIA herein. 4.4.4 Group E inspection. Group E inspection is required only for parts intended to be marked as radiation hardness assured (see 3.5 herein). a. End-point electrical parameters shall be as specified in table IIA herein. b. For device classes Q and V, the devices or test vehicle shall be subjected to radiation hardness assured tests as specified in MIL-PRF-38535 for the RHA level being tested. For device class M, the devices shall be subjected to radiation hardness assured tests as specified in MIL-PRF-38535, appendix A for the RHA level being tested. All device classes must meet the postirradiation end-point electrical parameter limits as defined in table I at TA = +25C 5C, after exposure, to the subgroups specified in table IIA herein. 4.4.4.1 Total dose irradiation testing. Total dose irradiation testing shall be performed in accordance with MIL-STD-883, method 1019, condition A and as specified herein. 4.4.4.1.1 Accelerated annealing testing. Accelerated annealing testing shall be performed on all devices requiring a RHA level greater than 5k rads (Si). The post-anneal end-point electrical parameter limits shall be as specified in table IA herein and shall be the pre-irradiation end-point electrical parameter limits at 25C 5C. Testing shall be performed at initial qualification and after any design or process changes which may affect the RHA response of the device. 4.4.4.2 Neutron irradiation. Neutron irradiation for device 02 shall be conducted in wafer form using a neutron fluence of 14 2 approximately 1x10 neutrons/cm . 4.4.4.3 Dose rate induced latchup testing. When required by the customer, dose rate induced latchup testing shall be performed in accordance with method 1020 of MIL-STD-883 and as specified herein. Tests shall be performed on devices, SEC, or approved test structures at technology qualification and after any design or process changes which may affect the RHA capability of the process. 4.4.4.4 Dose rate upset testing. Dose rate upset testing shall be performed in accordance with method 1021 of MIL-STD-883 and herein (see 1.4 herein). a. Transient dose rate upset testing shall be performed at initial qualification and after any design or process changes which may effect the RHA performance of the devices. Test 10 devices with 0 defects unless otherwise specified. b. Transient dose rate upset testing for class Q and V devices shall be performed as specified by a TRB approved radiation hardness assurance plan and MIL-PRF-38535. Device parameters that influence upset immunity shall be monitored at the wafer level in accordance with the wafer level hardness assurance plan and MIL-PRF-38535. 4.4.4.5 Single event phenomena (SEP). SEP testing shall be required on class V devices (see 1.4 herein). SEP testing shall be performed on a technology process on the Standard Evaluation Circuit (SEC) or alternate SEP test vehicle as approved by the qualifying activity at initial qualification and after any design or process changes which may affect the upset or latchup characteristics. The recommended test conditions for SEP are as follows: a. The ion beam angle of incidence shall be between normal to the die surface and 60 to the normal, inclusive (i.e. 0 angle 60). No shadowing of the ion beam due to fixturing or package related effects is allowed. b. 7 2 The fluence shall be 100 errors or 10 ions/cm . c. The flux shall be between 102 and 105 ions/cm2/s. The cross-section shall be verified to be flux independent by measuring the cross-section at two flux rates that differ by at least an order of magnitude. d. The particle range shall be 20 microns in silicon. e. The test temperature shall be +25C and the maximum rated operating temperature 10C. f. Bias conditions shall be defined by the manufacturer for the latchup measurements. g. For SEP test limitys see table IB. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-96605 A REVISION LEVEL D SHEET 13 4.5 Methods of inspection. Methods of inspection shall be specified as follows: 4.5.1 Voltage and current. Unless otherwise specified, all voltages given are referenced to the microcircuit GND terminal. Currents given are conventional current and positive when flowing into the referenced terminal. 5. PACKAGING 5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. 6. NOTES 6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes. 6.1.1 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractorprepared specification or drawing. 6.1.2 Substitutability. Device class Q devices will replace device class M devices. 6.2 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal. 6.3 Record of users. Military and industrial users should inform Defense Supply Center Columbus (DSCC) when a system application requires configuration control and which SMD's are applicable to that system. DSCC will maintain a record of users and this list will be used for coordination and distribution of changes to the drawings. Users of drawings covering microelectronic devices (FSC 5962) should contact DSCC-VA, telephone (614) 692-0544. 6.4 Comments. Comments on this drawing should be directed to DSCC-VA , Columbus, Ohio 43218-3990, or telephone (614) 692-0547. 6.5 Abbreviations, symbols, and definitions. The abbreviations, symbols, and definitions used herein are defined in MIL-PRF-38535 and MIL-HDBK-1331. 6.6 Sources of supply. 6.6.1 Sources of supply for device classes Q and V. Sources of supply for device classes Q and V are listed in QML-38535. The vendors listed in QML-38535 have submitted a certificate of compliance (see 3.6 herein) to DSCC-VA and have agreed to this drawing. 6.6.2 Approved sources of supply for device class M. Approved sources of supply for class M are listed in MIL-HDBK-103. The vendors listed in MIL-HDBK-103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been submitted to and accepted by DSCC-VA. 6.7 Additional information. When applicable, a copy of the following additional data shall be maintained and available from the device manufacturer: a. RHA upset levels. b. Test conditions (SEP). c. Number of upsets (SEP). d. Number of transients (SEP). e. Occurrence of latchup (SEP). STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-96605 A REVISION LEVEL D SHEET 14 APPENDIX A APPENDIX A FORMS A PART OF SMD 5962-96605 A.1 SCOPE A.1.1 Scope. This appendix establishes minimum requirements for microcircuit die to be supplied under the Qualified Manufacturers List (QML) Program. QML microcircuit die meeting the requirements of MIL-PRF-38535 and the manufacturers approved QM plan for use in monolithic microcircuits, multichip modules (MCMs), hybrids, electronic modules, or devices using chip and wire designs in accordance with MIL-PRF-38534 are specified herein. Two product assurance classes consisting of military high reliability (device class Q) and space application (device Class V) are reflected in the Part or Identification Number (PIN). When available a choice of Radiation Hardiness Assurance (RHA) levels are reflected in the PIN. A.1.2 PIN. The PIN shall be as shown in the following example: 5962 R Federal Stock class designator RHA designator (see A.1.2.1) 96605 01 V Device type (see A.1.2.2) 9 Device class designator (see A.1.2.3) Die code A Die Details (see A.1.2.4) Drawing Number A.1.2.1 RHA designator. Device classes Q and V RHA identified die shall meet the MIL-PRF-38535 specified RHA levels. A dash (-) indicates a non-RHA die. A.1.2.2 Device type(s). The device type(s) shall identify the circuit function as follows: Device type Generic number Circuit function 01 40174B CMOS, Radiation hardened, hex D-type flip-flop 02 40174BN CMOS, Radiation hardened, hex D-type flip-flop with neutron irradiated die. A.1.2.3 Device class designator. Device class Q or V Device requirements documentation Certification and qualification to the die requirements of MIL-PRF-38535. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-96605 A REVISION LEVEL D SHEET 15 APPENDIX A APPENDIX A FORMS A PART OF SMD 5962-96605 A.1.2.4 Die Details. The die details designation shall be a unique letter which designates the die’s physical dimensions, bonding pad location(s) and related electrical function(s), interface materials, and other assembly related information, for each product and variant supplied to this appendix. A.1.2.4.1 Die physical dimensions. Figure number Die types 01, 02 A-1 A.1.2.4.2 Die bonding pad locations and electrical functions. Figure number Die types 01, 02 A-1 A.1.2.4.3 Interface materials. Die types Figure number 01, 02 A-1 A.1.2.4.4 Assembly related information. Die types Figure number 01, 02 A-1 A.1.3 Absolute maximum ratings. See paragraph 1.3 for details. A.1.4 Recommended operating conditions. See paragraph 1.4 for details. A.2 APPLICABLE DOCUMENTS A.2.1 Government specifications, standards, bulletin, and handbooks. Unless otherwise specified, the following specifications, standard, and handbook of the issue listed in that issue of the Department of Defense Index of Specifications and Standards specified in the solicitation, form a part of this drawing to the extent specified herein. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARD MIL-STD-883 - Test Method Standard Microcircuits. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https://assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-96605 A REVISION LEVEL D SHEET 16 APPENDIX A APPENDIX A FORMS A PART OF SMD 5962-96605 A.2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing shall take precedence. A.3 REQUIREMENTS A.3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturer’s Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit or function as described herein. A.3.2 Design, construction and physical dimensions. The design, construction and physical dimensions shall be as specified in MIL-PRF-38535 and the manufacturer’s QM plan, for device classes Q and V and herein. A.3.2.1 Die physical dimensions. The die physical dimensions shall be as specified in A.1.2.4.1 and on figure A-1. A.3.2.2 Die bonding pad locations and electrical functions. The die bonding pad locations and electrical functions shall be as specified in A.1.2.4.2 and on figure A-1. A.3.2.3 Interface materials. The interface materials for the die shall be as specified in A.1.2.4.3 and on figure A-1. A.3.2.4 Assembly related information. The assembly related information shall be as specified in A.1.2.4.4 and figure A-1. A.3.2.5 Truth table. The truth table shall be as defined in paragraph 3.2.3 herein. A.3.2.6 Radiation exposure circuit. The radiation exposure circuit shall be as defined in paragraph 3.2.5. A.3.3 Electrical performance characteristics and post-irradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and post-irradiation parameter limits are as specified in table IA of the body of this document. A.3.4 Electrical test requirements. The wafer probe test requirements shall include functional and parametric testing sufficient to make the packaged die capable of meeting the electrical performance requirements in table IA. A.3.5 Marking. As a minimum, each unique lot of die, loaded in single or multiple stack of carriers, for shipment to a customer, shall be identified with the wafer lot number, the certification mark, the manufacturer’s identification and the PIN listed in A.1.2 herein. The certification mark shall be a “QM” or “Q” as required by MIL-PRF-38535. A.3.6 Certification of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see A.6.4 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this appendix shall affirm that the manufacturer’s product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and the requirements herein. A.3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 shall be provided with each lot of microcircuit die delivered to this drawing. A.4 VERIFICATION A.4.1 Sampling and inspection. For device classes Q and V, die sampling and inspection procedures shall be in accordance with MIL-PRF-38535 or as modified in the device manufacturer’s Quality Management (QM) plan. The modifications in the QM plan shall not affect the form, fit or function as described herein. A.4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and as defined in the manufacturer’s QM plan. As a minimum it shall consist of: a) Wafer lot acceptance for class V product using the criteria defined in MIL-STD-883, method 5007. b) 100% wafer probe (see paragraph A.3.4 herein). c) 100% internal visual inspection to the applicable class Q or V criteria defined in MIL-STD-883, method 2010 or the alternate procedures allowed in MIL-STD-883, method 5004. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-96605 A REVISION LEVEL D SHEET 17 APPENDIX A APPENDIX A FORMS A PART OF SMD 5962-96605 A.4.3 Conformance inspection. A.4.3.1 Group E inspection. Group E inspection is required only for parts intended to be identified as radiation assured (see A.3.5 herein). RHA levels for device classes Q and V shall be as specified in MIL-PRF-38535. End point electrical testing of packaged die shall be as specified in table IIA herein. Group E tests and conditions are as specified in paragraph 4.4.4 herein. A.5 DIE CARRIER A.5.1 Die carrier requirements. The requirements for the die carrier shall be accordance with the manufacturer’s QM plan or as specified in the purchase order by the acquiring activity. The die carrier shall provide adequate physical, mechanical and electrostatic protection. A.6 NOTES A.6.1 Intended use. Microcircuit die conforming to this drawing are intended for use in microcircuits built in accordance with MIL-PRF-38535 or MIL-PRF-38534 for government microcircuit applications (original equipment), design applications and logistics purposes. A.6.2 Comments. Comments on this appendix should be directed to DSCC-VA, Columbus, Ohio, 43218-3990 or telephone (614)-692-0547. A.6.3 Abbreviations, symbols and definitions. The abbreviations, symbols, and definitions used herein are defined with MIL-PRF-38535 and MIL-STD-1331. A.6.4 Sources of supply for device classes Q and V. Sources of supply for device classes Q and V are listed in QML-38535. The vendors listed within QML-38535 have submitted a certificate of compliance (see A.3.6 herein) to DSCC-VA and have agreed to this drawing. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-96605 A REVISION LEVEL D SHEET 18 APPENDIX A APPENDIX A FORMS A PART OF SMD 5962-96605 o DIE PHYSICAL DIMENSIONS Die size: Die thickness: 1829 x 2083 microns. 20 1 mils. NOTE: Pad numbers reflect terminal numbers when placed in case outlines E, X (see figure 1). FIGURE A-1 Die bonding pad locations and electrical functions. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-96605 A REVISION LEVEL D SHEET 19 APPENDIX A APPENDIX A FORMS A PART OF SMD 5962-96605 o INTERFACE MATERIALS Top metallization: Type Thickness Al 11.0kÅ - 14.0kÅ Backside metallization: None. Glassivation Type: Thickness: PSG 10.4kÅ - 15.6kÅ Substrate: Single crystal silicon. o ASSEMBLY RELATED INFORMATION Substrate potential: Floating or tied to VDD. Special assembly instructions: Bond pad #16 (VDD) first. FIGURE A-1 Die bonding pad locations and electrical functions - Continued. . STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-96605 A REVISION LEVEL D SHEET 20 STANDARD MICROCIRCUIT DRAWING BULLETIN DATE: 10-06-16 Approved sources of supply for SMD 5962-96605 are listed below for immediate acquisition information only and shall be added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be revised to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a certificate of compliance has been submitted to and accepted by DSCC-VA. This information bulletin is superseded by the next dated revision of MIL-HDBK-103 and QML-38535. DSCC maintains an online database of all current sources of supply at http://www.dscc.dla.mil/Programs/SMCR/. Standard microcircuit drawing PIN 1/ Vendor CAGE number Vendor similar PIN 2/ 5962R9660501VEC 34371 CD40174BDMSR 5962R9660501VXC 34371 CD40174BKMSR 5962R9660501V9A 34371 CD40174BHSR 5962R9660502VEC 3/ CD40174BDNSR 5962R9660502VXC 3/ CD40174BKNSR 5962R9660502V9A 3/ CD40174BHNSR 1/ The lead finish shown for each PIN representing a hermetic package is the most readily available from the manufacturer listed for that part. If the desired lead finish is not listed, contact the vendor to determine its availability. 2/ Caution. Do not use this number for item acquisition. Items acquired to this number may not satisfy the performance requirements of this drawing. 3/ No longer available from an approved source of supply. Vendor CAGE number 34371 Vendor name and address Intersil corporation 1001 Murphy Ranch Road Milpitas, CA 95035-6803 The information contained herein is disseminated for convenience only and the Government assumes no liability whatsoever for any inaccuracies in the information bulletin.