95626.pdf

REVISIONS
LTR
DESCRIPTION
DATE
(YR-MO-DA)
APPROVED
A
Changes in accordance with NOR 5962-R044-96.
96-01-24
M.A. Frye
B
Changes in accordance with NOR 5962-R460-97.
97-09-22
Raymond Monnin
C
Update boilerplate for class “T” changes. - glg
98-12-02
Raymond Monnin
D
Correction of paragraph 1.5 Table I changes. - glg
99-06-24
Raymond Monnin
04-02-12
Raymond Monnin
10-03-04
Charles Saffle
Correction of test condition voltage value for E in Table I for Operating
supply current; was VDD changed to GND. Removed neutron irradiation
line from section 1.5. Update boilerplate. - ksr
E
Update boilerplate paragraphs. glg
F
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REV STATUS
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OF SHEETS
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PMIC N/A
PREPARED BY
Gary L. Gross
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
STANDARD
MICROCIRCUIT
DRAWING
THIS DRAWING IS
AVAILABLE
CHECKED BY
Jeff Bowling
http://www.dscc.dla.mil
APPROVED BY
Michael A. Frye
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
AMSC N/A
DRAWING APPROVAL DATE
MICROCIRCUIT, MEMORY,
DIGITAL, RADIATION HARDENED,
CMOS, 8K X 8-BIT PROM,
MONOLITHIC SILICON
95-10-05
REVISION LEVEL
F
SIZE
CAGE CODE
A
67268
5962-95626
SHEET
1 OF
DSCC FORM 2233
APR 97
17
5962-E205-10
1. SCOPE
1.1 Scope. This drawing documents three product assurance class levels consisting of high reliability (device classes Q and
M), space application (device class V), and for appropriate satellite and similar applications (device class T). A choice of case
outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of
Radiation Hardness Assurance (RHA) levels are reflected in the PIN. For device class T, the user is encouraged to review the
manufacturers Quality Management (QM) plan as part of their evaluation of these parts and their acceptability in the intended
application.
1.2 PIN. The PIN shall be as shown in the following example:
5962
│
│
│
Federal
stock class
designator
F
│
│
│
RHA
designator
(see 1.2.1)
95626
\
01
│
│
│
Device
type
(see 1.2.2)
V
│
│
│
Device
class
designator
(see 1.2.3)
/
Y
│
│
│
Case
outline
(see 1.2.4)
C
│
│
│
Lead
finish
(see 1.2.5)
\/
Drawing number
1.2.1 RHA designator. Device classes Q, T and V RHA marked devices shall meet the MIL-PRF-38535 specified RHA levels
and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535 appendix
A specified RHA levels and shall be marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.
1.2.2 Device types. The device types shall identify the circuit function as follows:
Device type 1/
01
Generic number 2/
Circuit function
HS-6664RH
Access time
8K X 8-bit Radiation hardened PROM
65 ns
1.2.3 Device class designator. The device class designator shall be a single letter identifying the product assurance level as
follows:
Device class
Device requirements documentation
M
Vendor self-certification to the requirements for MIL-STD-883 compliant,
non-JAN class level B microcircuits in accordance with MIL-PRF-38535,
appendix A
Q, V
Certification and qualification to MIL-PRF-38535
T
Certification and qualification to MIL-PRF-38535 with performance as specified
in the device manufacturers approved quality management plan
1.2.4 Case outline(s). The case outline(s) shall be as designated in MIL-STD-1835 and as follows:
Outline letter
X
Y
Descriptive designator
Terminals
CDIP2-T28
CDFP3-F28
28
28
Package style
Dual-in-line package
Flat pack
1.2.5 Lead finish. The lead finish shall be as specified in MIL-PRF-38535 for classes Q, T and V or MIL-PRF-38535,
appendix A for device class M.
__________________
1/ Device is available in an unprogrammed state only.
2/ Generic numbers are also listed on the Standard Microcircuit Drawing Source Approval Bulletin at the end of this document
and will also be listed in QML-38535 and MIL-HDBK-103.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
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APR 97
SIZE
5962-95626
A
REVISION LEVEL
F
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2
1.3 Absolute maximum ratings. 3/
Supply voltage range ......................................................................
Voltage on any pin with respect to ground .....................................
Maximum power dissipation (PD) ....................................................
Lead temperature (soldering, 10 seconds maximum) ....................
Thermal resistance, junction-to-case (ΘJC).....................................
Junction temperature (TJ) ...............................................................
Storage temperature range ............................................................
Temperature under bias .................................................................
-0.3 V dc to +7.0 V dc
-0.3 V dc to VDD +0.3 V dc
1.75 W
+300°C
See MIL-STD-1835
+175°C
-65°C to +150°C
-55°C to +125°C
1.4 Recommended operating conditions.
Supply voltage (VDD) .......................................................................
Ground voltage (GND) ....................................................................
Input high voltage (VIH) ....................................................................
Input Low voltage (VIL) ....................................................................
Case operating temperature range (TC) ..........................................
+4.5 V dc to +5.5 V dc
0.0 V dc
+2.4 V dc minimum to VCC
0.0 V dc to +0.8 V dc maximum
-55°C to +125°C
1.5 Radiation features
Maximum total dose available (dose rate = 50 - 300 rads(Si)/s)
Class M, Q, and V .........................................................................
Class T ..........................................................................................
Dose rate upset ...............................................................................
Dose rate survivability .....................................................................
Single event phenomenon (SEP) effective
linear energy threshold (LET) with no upsets ................................
300 Krads(Si)
100 KRads(Si)
8
> 5 x 10 Rads(Si)/sec 4/
11
> 5 x 10 Rads(Si)/sec 4/
2
> 100 MEV-cm /mg 4/
2. APPLICABLE DOCUMENTS
2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a
part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in
the solicitation or contract.
DEPARTMENT OF DEFENSE SPECIFICATION
MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.
DEPARTMENT OF DEFENSE STANDARDS
MIL-STD-883 MIL-STD-1835 -
Test Method Standard Microcircuits.
Interface Standard Electronic Component Case Outlines.
DEPARTMENT OF DEFENSE HANDBOOKS
MIL-HDBK-103 MIL-HDBK-780 -
List of Standard Microcircuit Drawings.
Standard Microcircuit Drawings.
(Copies of these documents are available online at https://assist.daps.dla.mil/quicksearch/ or from the Standardization
Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)
_____________________
3/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the
maximum levels may degrade performance and affect reliability.
4/ Guaranteed by process or design, but not tested.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
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APR 97
SIZE
5962-95626
A
REVISION LEVEL
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3
2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein.
Unless otherwise specified, the issues of the documents which are DoD adopted are those listed in the issue of the DoDISS
cited in the solicitation. Unless otherwise specified, the issues of documents not listed in the DoDISS are the issues of the
documents cited in the solicitation.
AMERICAN SOCIETY FOR TESTING AND MATERIALS (ASTM)
ASTM Standard F1192
-
Standard Guide for the Measurement of Single Event Phenomena from
Heavy Ion Irradiation of Semiconductor Devices.
(Applications for copies of ASTM publications should be addressed to: ASTM International, PO Box C700, 100 Barr Harbor
Drive, West Conshohocken, PA 19428-2959; http://www.astm.org.)
ELECTRONICS INDUSTRIES ASSOCIATION (EIA)
JEDEC Standard EIA/JESD78
-
IC Latch-Up Test.
(Applications for copies should be addressed to the Electronics Industries Association, 2500 Wilson Boulevard, Arlington, VA
22201; http://www.jedec.org.)
(Non-Government standards and other publications are normally available from the organizations that prepare or distribute
the documents. These documents also may be available in or through libraries or other informational services.)
2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text
of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a
specific exemption has been obtained.
3. REQUIREMENTS
3.1 Item requirements. The individual item requirements for device classes Q, T and V shall be in accordance with
MIL-PRF-38535, and as specified herein or as modified in the device manufacturer's Quality Management (QM) plan. The
modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for
device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified
herein.
3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified
in MIL-PRF-38535 and herein for device classes Q, T and V or MIL-PRF-38535, appendix A and herein for device class M.
3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein.
3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1.
3.2.3 Truth table. The truth table shall be as specified on figure 2.
3.2.3.1 Unprogrammed devices. The truth table for unprogrammed devices shall be as specified on figure 2. When required
in screening (see 4.2 herein) or qualification conformance inspection, groups A, B, or C (see 4.4), the devices shall be
programmed by the manufacturer prior to test. A minimum of 50 percent of the total number of cells shall be programmed.
3.2.3.2 Programmed devices. The requirements for supplying programmed devices are not a part of this drawing.
3.2.4 Radiation exposure circuit. The radiation exposure circuit shall be as specified in figure 5.
3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the
electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full
case operating temperature range.
3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical
tests for each subgroup are defined in table I.
3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be
marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer
has the option of not marking the "5962-" on the device. For RHA product using this option, the RHA designator shall still be
marked. Marking for device classes Q, T and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall
be in accordance with MIL-PRF-38535, appendix A.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
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APR 97
SIZE
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A
REVISION LEVEL
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4
3.5.1 Certification/compliance mark. The certification mark for device classes Q, T and V shall be a "QML" or "Q" as required
in MIL-PRF-38535. The compliance mark for device class M shall be a "C" as required in MIL-PRF-38535, appendix A.
3.6 Certificate of compliance. For device classes Q, T and V, a certificate of compliance shall be required from a QML-38535
listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of
compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see
6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this
drawing shall affirm that the manufacturer's product meets, for device classes Q, T and V, the requirements of MIL-PRF-38535
and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein.
3.7 Certificate of conformance. A certificate of conformance as required for device classes Q, T and V in MIL-PRF-38535 or
for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing.
3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2
herein) involving devices acquired to this drawing is required for any change that affects this drawing.
3.9 Verification and review for device class M. For device class M, DSCC, DSCC's agent, and the acquiring activity retain
the option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made
available onshore at the option of the reviewer.
3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in
microcircuit group number 42 (see MIL-PRF-38535, appendix A).
3.10.1 Unprogrammed device delivered to the user. All testing shall be verified through final electrical testing as defined in
3.2.3.1 and table I. It is recommended that users perform subgroups 7 and 9 after programming to verify the specific program
configuration.
4. VERIFICATION
4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with
MIL-PRF-38535 or as modified in the device manufacturer's Quality Management (QM) plan, including screening (4.2),
qualification (4.3), and conformance inspection (4.4). The modification in the QM plan shall not affect the form, fit, or function
as described herein. For device class T, sampling and inspection procedures shall be in accordance with MIL-PRF-38535 and
the device manufacturer's QM plan, including screening, qualification, and conformance inspection. The performance envelope
and reliability information shall be as specified in the manufacturers QM plan. For device class M, sampling and inspection
procedures shall be in accordance with MIL-PRF-38535, appendix A.
4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted
on all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in
accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection.
For device class T, screening shall be in accordance with the device manufacturer's Quality Management (QM) plan, and shall
be conducted on all devices prior to qualification and technology conformance inspection.
4.2.1 Additional criteria for device class M.
a. Delete the sequence specified as initial (preburn-in) electrical parameters through interim (postburn-in) electrical
parameters of method 5004 and substitute lines 1 through 6 of table IIA herein.
b. For device class M, the test circuit shall be maintained by the manufacturer under document revision level control and
shall be made available to the preparing or acquiring activity upon request. For device class M, the test circuit shall
specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in
method 1015 of MIL-STD-883.
(1)
Dynamic burn-in for device class M (method 1015 of MIL-STD-883, test condition D; for circuit, see 4.2.1b herein).
c. Interim and final electrical parameters shall be as specified in table IIA herein.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-95626
A
REVISION LEVEL
F
SHEET
5
TABLE I. Electrical performance characteristics.
│
│
│
│
│Symbol │
Conditions 1/
│ Group A │Device
│
│
-55°C ≤ TC ≤ +125°C
│subgroups │ type
│
│
unless otherwise specified
│
│
│
│
│
│
│
│
│
│
│ 1,2,3
│ All
High level output
│VOH1 │ VDD = 4.5 V, IOH = -2.0 mA
voltage
│
│
│
│
│
│
│M,D, │ 1
│
│
│
│P,L, │
│
│
│
│R,F │ 2/
│
│
│
│
│
│
│
│
│
│
│ 1,2,3
│ All
Output high
│VOH2 │ VDD = 4.5 V, IOH = -100 μA
voltage
│
│
│
│
│
│
│M,D, │ 1
│
│
│
│P,L, │
│
│
│
│R,F │ 2/
│
│
│
│
│
│
│
│
│
│
Low level output
│VOL
│ VDD = 4.5 V, IOL = 4.8 mA
│ 1,2,3
│ All
│
voltage
│
│
│
│
│
│M,D, │ 1
│
│
│
│P,L, │
│
│
│
│R,F │ 2/
│
│
│
│
│
│
│
│
│
│
Input leakage current
│II
│ VDD = 5.5 V, P not tested
│ 1,2,3
│ All
│
│ VIN = GND or VDD
│
│
│
│
│M,D, │ 1
│
│
│
│P,L, │
│
│
│
│R,F │ 2/
│
│
│
│
│
│
│
│
│
│
High impedance
│IOZ
│ VDD = 5.5 V, E = 5.5 V
│ 1,2,3
│ All
output leakage
│
│ VI/O = GND or VDD
│
│
current
│
│
│M,D, │ 1
│
│
│
│P,L, │
│
│
│
│R,F │ 2/
│
│
│
│
│
│
│
│
│
│
Operating supply
│IDDOP │ VDD = 5.5 V, E = GND
│ 1,2,3
│ All
current
│
│ IOUT = 0 mA, f = 1 MHz
│
│
│
│ VIN = GND or VDD 4/
│M,D, │ 1
│
│
│
│P,L, │
│
│
│
│R,F │ 2/
│
│
│
│
│
│
│
│
│
│
│ 1,2,3
│ All
Standby supply
│IDDSB │ VDD = 5.5 V, IOUT = 0 mA
current
│
│ VIN = GND or VDD
│
│
│
│
│M,D, │ 1
│
│
│
│P,L, │
│
│
│
│R,F │ 2/
│
│
│
│
│
│
Input capacitance 5/ │CIN
│VDD = open, TA = +25ºC,
│ 4
│ All
│
│f = 1.0 MHz, see 4.4.1c
│
│
│
│
│
│
Output capacitance 5/ │COUT │VDD = open, TA = +25ºC,
│ 4
│ All
│
│f = 1.0 MHz, see 4.4.1c
│
│
Test
│
│
Limits
│
│
│
│
│ Min │
│
│
│ 3.5
│
│
│
│
│
│
│
│ 3/
│
│
│
│VDD - │
│ 0.3 │
│
│
│
│
│
│
│ 3/
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│ -1.0 │
│
│
│
│
│
│
│ 3/
│
│
│
│
│
│ -10
│
│
│
│
│
│
│
│ 3/
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
Max
0.4
3/
1.0
3/
10
3/
15
3/
500
3/
15
12
│
│ Unit
│
│
│
│
│V
│
│
│
│V
│
│
│V
│
│
│
│V
│
│
│V
│
│
│
│V
│
│
│ μA
│
│
│
│ μA
│
│
│ μA
│
│
│
│ μA
│
│
│ mA
│
│
│
│ mA
│
│
│ μA
│
│
│
│ μA
│
│ pF
│
│
│ pF
│
See footnotes at end of table.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
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APR 97
SIZE
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REVISION LEVEL
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6
TABLE I. Electrical performance characteristics - Continued.
Test
Functional tests
Address access time
7/
Address setup time
Address hold time
Chip enable access
time
Output enable access
time
Chip enable to
output active 7/
│
│
│
│
│Symbol │
Conditions 1/
│ Group A │Device
│
│
-55°C ≤ TC ≤ +125°C
│subgroups │ type
│
│
unless otherwise specified
│
│
│
│
│
│
│
│
│
│
│
│ See 4.4.1d, VDD = 4.5 V
│ 7,8A,8B │ All
│
│ f = 1 MHz, VIH = 2.4 V
│
│
│
│ VIL = 0.45 V, IOH = -1.0 mA │M,D, │ 7
│
│
│ IOL = 1.0 mA, VOH > 1.5 V
│P,L, │
│
│
│ VOL < 1.5 V
│R,F │ 2/
│
│
│
│
│
│
│
│
│
│
│tAVQV │ See figure 4 6/
│ 9,10,11 │ All
│
│ VDD = 4.5V and 5.5V
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│tAVEL
│
│ 9,10,11 │ All
│
│
│
│
│
│
│M,D, │ 9
│
│
│
│P,L, │
│
│
│
│R,F │ 2/
│
│
│
│
│
│
│
│
│
│
│tELAX
│
│ 9,10,11 │ All
│
│
│
│
│
│
│M,D, │ 9
│
│
│
│P,L, │
│
│
│
│R,F │ 2/
│
│
│
│
│
│
│
│
│
│
│tELQV │
│ 9,10,11 │ All
│
│
│
│
│
│
│M,D, │ 9
│
│
│
│P,L, │
│
│
│
│R,F │ 2/
│
│
│
│
│
│
│
│
│
│
│tGLQV │
│ 9,10,11 │ All
│
│
│
│
│
│
│M,D, │ 9
│
│
│
│P,L, │
│
│
│
│R,F │ 2/
│
│
│
│
│
│
│
│
│
│
│tELQX │
│ 9,10,11 │ All
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
Limits
│
│
Min │
│
│
│
│
│
3/
│
│
│
│
│
│
│
│
│
│
5
│
│
│
│
3/
│
│
│
12
│
│
│
│
3/
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
5
│
│
│
│
│
│
Max
65
60
3/
20
3/
│
│ Unit
│
│
│
│
│
│
│
│
│
│
│
│ ns
│
│
│
│
│
│
│ ns
│
│
│
│ ns
│
│
│ ns
│
│
│
│ ns
│
│
│ ns
│
│
│
│ ns
│
│
│ ns
│
│
│
│ ns
│
│
│ ns
│
│
│
│
│
See footnotes at end of table.
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TABLE I. Electrical performance characteristics - Continued.
Test
Chip disable to
output in high Z 7/
Output enable to
output active 7/
Output enable to
output disable 7/
Chip enable low
width
Chip enable high
width
Read cycle time
│
│
│
│
│Symbol │
Conditions 1/
│ Group A │Device
│
│
-55°C ≤ TC ≤ +125°C
│subgroups │ type
│
│
unless otherwise specified
│
│
│
│
│
│
│
│
│
│
│tEHQZ │ See figure 4 6/
│ 9,10,11 │ All
│
│ VDD = 4.5V and 5.5V
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│ 9,10,11 │ All
│tGLQX │
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│ 9,10,11 │ All
│tGHQZ │
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│ 9,10,11 │ All
│tELEH │
│
│
│
│
│
│
│M,D, │ 9
│
│
│
│P,L, │
│
│
│
│R,F │ 2/
│
│
│
│
│
│
│
│
│
│
│ 9,10,11 │ All
│tEHEL │
│
│
│
│
│
│
│M,D, │ 9
│
│
│
│P,L, │
│
│
│
│R,F │ 2/
│
│
│
│
│
│
│
│
│
│
│
│ 9,10,11 │ All
│tELEL
│
│
│
│
│
│
│M,D, │ 9
│
│
│
│P,L, │
│
│
│
│R,F │ 2/
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
│
Limits
│
│
Min │ Max
│
│ 15
│
│
│
│
│
│
5
│
│
│
│
│
│
│
│ 15
│
│
│
│
│
│
60
│
│
│
│
3/
│
│
│
20
│
│
│
│
3/
│
│
│
80
│
│
│
│
3/
│
│
│
│ Unit
│
│
│
│
│ ns
│
│
│
│
│
│
│ ns
│
│
│
│
│
│
│ ns
│
│
│
│
│
│
│ ns
│
│
│
│ ns
│
│
│ ns
│
│
│
│ ns
│
│
│ ns
│
│
│
│ ns
│
1/ All tests performed with P hardwired to VDD.
2/ When performing postirradiation electrical measurements for any RHA level TA = +25°C. Limits shown are guaranteed at TA =
+25°C ±5°C. The M, D, P, L, R, and F in the test condition column are the postirradiation limits for the device types specified in
the device types column. For classes M, Q, and V, devices are tested only at level "F"; for class T, devices are tested only at
level "R" (see paragraph 1.5).
3/ Preirradiation values for RHA marked devices shall also be the postirradiation values, unless otherwise specified.
4/ Typical derating = 15mA/MHz increase in operating supply current.
5/ Tested initially and after any design or process changes that affect that parameter, and therefore shall be guaranteed to the
limits specified in table I.
6/ AC measurements assume rise and fall times of 5 ns or less, timing reference levels of 1.5 V, input pulse levels of 0 to 3.0 V,
and the output load = 1 TTL equivalent load and CL > 50 pF (see figure 3).
7/ If not specifically tested, shall be guaranteed to the limits specified in table I.
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Device types
All
Case outlines
X,Y
Terminal
Terminal
number
symbol
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
NC
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
GND
DQ3
DQ4
DQ5
DQ6
DQ7
E
A10
G
A11
A9
A8
NC
P
VDD
NOTES: NC = no connection; P must be hardwired at all times to VDD, except during programming.
FIGURE 1. Terminal connections.
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Read modes
Mode
E
Outputs
Read
L
L
Enabled
Output Disable
L
H
High Z
Standby
H
X
High Z
G
NOTES:
1. L = logic low voltage level; H = logic high voltage level; X can be H or L.
2. High Z is high impedance state.
FIGURE 2. Truth table.
NOTE: CL = load capacitance and includes scope and jig capacitance.
FIGURE 3. Output load circuit or equivalent.
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FIGURE 4. Read cycle waveform.
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NOTES:
NC = no connection
All resistors = 47Ω + 10%
VDD = 5.5 v + 0.5 v
FIGURE 5. Irradiation circuit.
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TABLE IIA. Electrical test requirements. 1/ 2/ 3/ 4/ 5/ 6/ 7/
Line
no.
Test
requirements
Subgroups (in
accordance with
MIL-STD-883,
method 5005, table I)
Device
class
M
Subgroups
(in accordance with MIL-PRF-38535,
table III)
Device
class
Q
Device
class
V
1,7,9
Device
class
T
1
Interim electrical
parameters (see 4.2)
1,7,9
1,7,9
2
Static burn-in I
method 1015
Not
required
Not
required
3
Same as line 1
4
Dynamic burn-in
(method 1015)
5
Same as line 1
6
Final electrical
Parameters (see 4.2)
1*,2,3,7*,
8A,8B,9*,10,
11
7
Group A test
requirements (see 4.4)
1,2,3,4**,7,
8A,8B,9,10,
11
1,2,3,4**,7, 1,2,3,4**,7,
8A,8B,9,10, 8A,8B,9,10,
11
11
8
Group C end-point
electrical
parameters (see 4.4)
1,2,3,7,
8A,8B
1,2,3,7,
8A,8B,9
9
Group D end-point
electrical
parameters (see 4.4)
1,7,9
10
Group E end-point
electrical
parameters (see 4.4)
1,7,9
Required
1*,7*,9* Δ
Required
Required
Required
1*,7*,9* Δ
1*,2,3,7*,
8A,8B,9*,10,
11
1,7,9
1,7,9
As
specified
in
QM
plan
1*,2,3,7*,
8A,8B,9*,10,
11
1,2,3,7,
8A,8B,9,10,
11 Δ
1,7,9
1,7,9
1/
2/
3/
4/
5/
6/
Blank spaces indicate tests are not applicable.
Any or all subgroups may be combined when using high-speed testers.
Subgroups 7 and 8 functional tests shall verify the truth table.
* indicates PDA applies to subgroup 1, 7, and 9.
** see 4.4.1c.
∆ indicates delta limit (see table IIB) shall be required where specified, and the delta values shall be computed
with reference to the zero hour electrical parameters (see table IIA).
7/ See 4.6.
4.2.2 Additional criteria for device classes Q, T and V.
a. The burn-in test duration, test condition, and test temperature or approved alternatives shall be as specified in
the device manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be
maintained under document revision level control of the device manufacturer's Technology Review Board (TRB)
in accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon
request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in
accordance with the intent specified in method 1015 of MIL-STD-883.
b. For device classes Q, T, and V, interim and final electrical test parameters shall be as specified in table IIA herein.
c. Additional screening for device class V beyond the requirements of device class Q shall be as specified in
MIL-PRF-38535, appendix B.
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TABLE IIB. Delta limits at +25°C.
Test 1/
II
IOZ
IDDSB
All device types
±100 nA of specified
value in Table I
±1 μA of specified
value in Table I
±50 μA of specified
value in Table I
VOL
±60 mV of specified
value in Table I
VOH2
±400 mV of specified
value in Table I
1/ The above parameter shall be recorded before
and after the required burn-in and life tests to determine the delta (Δ).
4.3 Qualification inspection for device classes Q, T and V. Qualification inspection for device classes Q and V shall be in
accordance with MIL-PRF-38535. Qualification inspection for device class T shall be in accordance with the device
manufacturer's Quality Management (QM) plan. Inspections to be performed shall be those specified in MIL-PRF-38535 and
herein for groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.4).
4.4 Conformance inspection. Technology conformance inspection for classes Q and V shall be in accordance with MIL-PRF38535, including groups A, B, C, D, and E inspections and as specified herein. Quality conformance inspection for device class
M shall be in accordance with MIL-PRF-38535, appendix A and as specified herein. Inspections to be performed for device class
M shall be those specified in method 5005 of MIL-STD-883 and herein for groups A, B, C, D, and E inspections (see 4.4.1
through 4.4.4). Technology conformance inspection for device class T shall be in accordance with the device manufacturer's
Quality Management (QM) plan.
4.4.1 Group A inspection.
a. Tests shall be as specified in table IIA herein.
b. Subgroups 5 and 6 in table I, method 5005 of MIL-STD-883 shall be omitted.
c. Subgroup 4 (CIN and COUT measurements) shall be measured only for initial qualification and after any process or
design changes which may affect input or output capacitance. Capacitance shall be measured between the designated
terminal and GND at a frequency of 1 MHz.
d. For device class M, subgroups 7, 8A and 8B tests shall be sufficient to verify the truth table. For device classes Q and V,
subgroups 7, 8A and 8B shall include verifying the functionality of the device.
e. Devices shall be tested for programmability and ac performance compliance to the requirements of group A, subgroups 9,
10, and 11. Either of two techniques is acceptable:
(1) Testing the entire lot using additional built-in test circuitry, which allows the manufacturer to verify programmability
and ac performance without programming the user array. If this is done, the resulting test patterns shall be verified on
all devices during subgroups 9, 10, and 11, group A testing in accordance with the sampling plan specified in
MIL-STD-883, method 5005.
(2) If such compliance cannot be tested on an unprogrammed device, a sample shall be selected to satisfy
programmability requirements prior to performing subgroups 9, 10, and 11. Twelve devices shall be submitted to
programming (see 3.2.3.2). If more than two devices fail to program, the lot shall be rejected. At the manufacturer's
option, the sample may be increased to 24 total devices with no more than 4 total device failures allowable. Ten
devices from the programmability sample shall be submitted to the requirements of group A, subgroups 9, 10, and 11.
If more than two devices fail, the lot shall be rejected. At the manufacturer's option, the sample may be increased to
20 total devices with no more than 4 total device failures allowable.
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4.4.2 Group C inspection. The group C inspection end-point electrical parameters shall be as specified in table IIA herein.
4.4.2.1 Additional criteria for device class M. Steady-state life test conditions, method 1005 of MIL-STD-883:
a. Test condition D. The test circuit shall be maintained by the manufacturer under document revision level control and
shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs,
outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005.
b. TA = +125°C, minimum.
c. Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883.
4.4.2.2 Additional criteria for device classes Q, T and V. The steady-state life test duration, test condition, and test
temperature, or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with
MIL-PRF-38535. The test circuit shall be maintained under document revision level control by the device manufacturer's TRB in
accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit
shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method
1005 of MIL-STD-883.
4.4.3 Group D inspection. For group D inspection, end-point electrical parameters shall be as specified in table IIA herein.
4.4.4 Group E inspection. Group E inspection is required only for parts intended to be marked as radiation hardness
assured (see 3.5 herein).
a. End-point electrical parameters shall be as specified in table IIA herein.
b. For device classes Q and V, the devices or test vehicle shall be subjected to radiation hardness assured tests as
specified in MIL-PRF-38535 for the RHA level being tested. For device class M, the devices shall be subjected to
radiation hardness assured tests as specified in MIL-PRF-38535, appendix A for the RHA level being tested. All device
classes must meet the post irradiation end-point electrical parameter limits as defined in table I at TA = +25°C +5°C,
after exposure, to the subgroups specified in table IIA herein.
4.4.4.1 Group E inspection for device class T. For device class T, the RHA requirements shall be in accordance with the
class T radiation requirements of MIL-PRF-38535. End-point electrical parameters shall be as specified in table II herein.
4.4.4.2 Total dose irradiation testing. Total dose irradiation testing shall be performed in accordance with MIL-STD-883
method 1019 condition A, and as specified herein. For device class T, the total dose requirements shall be in accordance with
the class T radiation requirements of MIL-PRF-38535.
4.4.4.2.1 Accelerated aging test. Accelerated aging tests shall be performed on all devices requiring a RHA level greater than
5k rads(Si). The post-anneal end-point electrical parameter limits shall be as specified in table I herein and shall be the preirradiation end-point electrical parameter limit at 25°C +5°C. Testing shall be performed at initial qualification and after any
design or process changes which may affect the RHA response of the device.
4.4.4.3 Dose rate induced latch-up testing. When dose rate induced latch-up testing is performed, the testing will be done in
accordance with method 1020 of MIL-STD-883 and as specified herein (see 1.5). Tests shall be performed on devices, SEC, or
approved test structures at technology qualification and after any design or process changes which may affect the RHA
capability of the process.
4.4.4.4 Dose rate upset testing. When dose rate upset testing is performed, the testing will be done in accordance with
method 1021 of MIL-STD-883 and herein (see 1.5).
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a. Transient dose rate upset testing shall be performed at initial qualification and after any design or process changes
which may effect the RHA performance of the devices. Test 10 devices with 0 defects unless otherwise specified.
b. Transient dose rate upset testing for class Q, T and V devices shall be performed as specified by a TRB approved
radiation hardness assurance plan and MIL-PRF-38535.
4.4.4.5 Single event phenomena (SEP). When specified in the purchase order or contract, SEP testing shall be required on
class V and T devices (see 1.5 herein). SEP testing shall be performed on a technology process on the Standard Evaluation
Circuit (SEC) or alternate SEP test vehicle as approved by the qualifying activity at initial qualification and after any design or
process changes which may affect the upset or latch-up characteristics. ASTM standard F1192 may be used as a guideline
when performing SEP testing. The recommended test conditions for SEP are as follows:
a. The ion beam angle of incidence shall be between normal to the die surface and 60° to the normal, inclusive (i.e. 0° ≤
angle ≤ 60°). No shadowing of the ion beam due to fixturing or package related effects is allowed.
b. The fluence shall be ≥ 100 errors or ≥10 ions/cm2.
6
2
5
2
c. The flux shall be between 10 and 10 ions/cm /s. The cross-section shall be verified to be flux independent by
measuring the cross-section at two flux rates which differ by at least an order of magnitude.
d. The particle range shall be ≥ 20 microns in silicon.
e. The test temperature shall be +25°C and the maximum rated operating temperature ±10°C.
f. Bias conditions shall be defined by the manufacturer for latchup measurements.
g. Test four devices with zero failures.
4.4.4.6 Additional information. When specified in the purchase order or contract, a copy of the following additional data shall
be supplied:
a. RHA upset levels.
b. Test conditions (SEP).
c. Number of upsets (SEP).
d. Number of transients (SEP).
e. Occurrence of latchup (SEP).
4.5 Programming procedure. The programming procedures shall be as specified by the device manufacturer and shall be
made available upon request.
4.6 Delta measurements for device class V. Delta measurements, as specified in Table IIA, shall be made and recorded
before and after the required burn-in screens and steady-state life tests to determine delta compliance. The electrical
parameters to be measured, with associated delta limits are listed in Table IIB. The device manufacturer may, at his option,
either perform delta measurements or within 24 hours after burn-in perform final electrical parameter tests, subgroups 1, 7,
and 9.
5. PACKAGING
5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535 for device
classes Q and V or MIL-PRF-38535, appendix A for device class M.
6. NOTES
6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications
(original equipment), design applications, and logistics purposes.
6.1.1 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractor
prepared specification or drawing.
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6.1.2 Substitutability. Device class Q devices will replace device class M devices.
6.2 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for
the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal.
6.3 Record of users. Military and industrial users should inform Defense Supply Center Columbus when a system
application requires configuration control and which SMD's are applicable to that system. DSCC will maintain a record of users
and this list will be used for coordination and distribution of changes to the drawings. Users of drawings covering
microelectronic devices (FSC 5962) should contact DSCC-VA, telephone (614) 692-0544.
6.4 Comments. Comments on this drawing should be directed to DSCC-VA , Columbus, Ohio 43218-3990, or telephone
(614) 692-0547.
6.5 Abbreviations, symbols, and definitions. The abbreviations, symbols, and definitions used herein are defined in
MIL-PRF-38535 and MIL-HDBK-1331.
6.5.1 Timing limits. The table of timing values shows either a minimum or a maximum limit for each parameter. Input
requirements are specified from the external system point of view. Thus, address setup time is shown as a minimum since the
system must supply at least that much time (even though most devices do not require it). On the other hand, responses from
the memory are specified from the device point of view. Thus, the access time is shown as a maximum since the device never
provides data later than that time.
6.5.2 Waveforms.
Waveform
symbol
Input
Output
MUST BE
VALID
WILL BE
VALID
CHANGE FROM
H TO L
WILL CHANGE
FROM
H TO L
CHANGE FROM
L TO H
WILL CHANGE
FROM
L TO H
DON'T CARE
ANY CHANGE
PERMITTED
CHANGING
STATE
UNKNOWN
HIGH
IMPEDANCE
6.6 Sources of supply.
6.6.1 Sources of supply for device classes Q and V. Sources of supply for device classes Q and V are listed in QML-38535.
The vendors listed in QML-38535 have submitted a certificate of compliance (see 3.6 herein) to DSCC-VA and have agreed to
this drawing.
6.6.2 Approved sources of supply for device class M. Approved sources of supply for class M are listed in MIL-HDBK-103.
The vendors listed in MIL-HDBK-103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been
submitted to and accepted by DSCC-VA.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-95626
A
REVISION LEVEL
F
SHEET
17
STANDARD MICROCIRCUIT DRAWING SOURCE APPROVAL BULLETIN
DATE: 10-03-04
Approved sources of supply for SMD 5962-95626 are listed below for immediate acquisition only and shall be added to QML38535 and MIL-HDBK-103 during the next revision. QML-38535 and MIL-HDBK-103 will be revised to include the addition or
deletion of sources. The vendors listed below have agreed to this drawing and a certificate of compliance has been submitted to
and accepted by DSCC-VA. This bulletin is superseded by the next dated revisions of QML-38535 and MIL-HDBK-103. DSCC
maintains an online database of all current sources of supply at http://www.dscc.dla.mil/Programs/Smcr/.
Standard
Vendor
CAGE
Vendor
microcircuit drawing
PIN
number
PIN 2/
5962F9562601QXC
34371
HS1-6664RH-8
5962F9562601QYC
34371
HS9-6664RH-8
5962F9562601VXC
34371
HS1-6664RH-Q
5962F9562601VYC
34371
HS9-6664RH-Q
5962R9562601TXC
34371
HS1-6664RH-T
5962R9562601TYC
34371
HS9-6664RH-T
1/
similar
1/ The lead finish shown for each PIN representing a hermetic
package is the most readily available from the manufacturer
listed for that part. If the desired lead finish is not listed,
contact the Vendor to determine its availability.
2/ Caution. Do not use this number for item
acquisition. Items acquired to this number may not
satisfy the performance requirements of this drawing.
Vendor CAGE
number
34371
Vendor name
and address
Intersil Corporation
1001 Murphy Ranch Road
Milpitas, CA 95035-6803
The information contained herein is disseminated for convenience only and the
Government assumes no liability whatsoever for any inaccuracies in the
information bulletin.