DATASHEET

EW DESIGNS
ENDED FOR N
NOT RECOMM
T PARTS
REPLACEMEN
RECOMMENDED
DG406, DG407
Data Sheet
HI-516
April 1, 2005
16-Channel/Differential 8-Channel, CMOS
High Speed Analog Multiplexer
The Hl-516 is a monolithic, dielectrically isolated, highspeed, high-performance CMOS analog multiplexer. It
offers unique built-in channel selection decoding plus an
inhibit input for disabling all channels. The dual function of
address input A3 enables the Hl-516 to be user
programmed either as a single ended 16-Channel
multiplexer by connecting ‘out A’ to ‘out B’ and using A3 as
a digital address input, or as an 8-Channel differential
multiplexer by connecting A3 to the V- supply. The
substrate leakages and parasitic capacitances are reduced
substantially by using the Intersil Dielectric Isolation
process to achieve optimum performance in both high and
low level signal applications. The low output leakage
current (lD(OFF) < 100pA at 25oC) and fast settling
(tSETTLE = 800ns to 0.01%) characteristics of the device
make it an ideal choice for high speed data acquisition
systems, precision instrumentation, and industrial process
control.
Features
• Access Time (Typical) . . . . . . . . . . . . . . . . . . . . . . . 130ns
• Settling Time . . . . . . . . . . . . . . . . . . . . . . . . 250ns (0.1%)
• Low Leakage (Typical)
- IS(OFF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10pA
- ID(OFF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30pA
• Low Capacitance (Max)
- CS(OFF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10pF
- CD(OFF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25pF
• Off Isolation at 500kHz . . . . . . . . . . . . . . . . . . 55dB (Min)
• Low Charge Injection Error . . . . . . . . . . . . . . . . . . . 20mV
• Single Ended to Differential Selectable (SDS)
• Logic Level Selectable (LLS)
• Pb-Free Available (RoHS Compliant)
Applications
For MIL-STD-883 compliant parts, request the Hl-516/883
data sheet.
• Data Acquisition Systems
Ordering Information
• Industrial Control
PART NUMBER
TEMP.
RANGE (oC)
PACKAGE
PKG.
DWG. #
HI3-0516-5
0 to 75
28 Ld PDIP
E28.6
HI3-0516-5Z
(See Note)
0 to 75
28 Ld PDIP*
(Pb-free)
E28.6
*Pb-free PDIPs can be used for through hole wave solder
processing only. They are not intended for use in Reflow solder
processing applications.
NOTE: Intersil Pb-free products employ special Pb-free material
sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which are RoHS compliant and compatible
with both SnPb and Pb-free soldering operations. Intersil Pb-free
products are MSL classified at Pb-free peak reflow temperatures that
meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
• Precision Instrumentation
Pinout
HI-516 (PDIP)
TOP VIEW
V+ 1
OUT B 2
28 OUT A
27 V-
NC 3
26 IN 8/8A
IN 16/8B 4
25 IN 7/7A
IN 15/7B 5
24 IN 6/6A
IN 14/6B 6
23 IN 5/5A
IN 13/5B 7
22 IN 4/4A
IN 12/4B 8
21 IN 3/3A
9
20 IN 2/2A
IN 10/2B 10
19 IN 1/1A
IN 11/3B
IN 9/1B 11
1
FN3146.4
18 ENABLE
GND 12
17 A0
VDD /LLS 13
16 A1
A3 /SDS 14
15 A2
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-352-6832 | Intersil (and design) is a registered trademark of Intersil Americas LLC.
Copyright Intersil Americas LLC. 2000, 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
HI-516
Truth Tables
HI-516 USED AS A 16-CHANNEL MULTIPLEXER OR
DUAL 8-CHANNEL MULTIPLEXER (NOTE 1)
USE A3 AS DIGITAL ADDRESS INPUT
ENABLE
A2
A3
A1
A0
HI-516 USED AS A DIFFERENTIAL 8-CHANNEL MULTIPLEXER
ON CHANNEL TO
OUT A
OUT B
A3 CONNECTED TO V- SUPPLY
ON CHANNEL TO
ENABLE
A2
A1
A0
OUT A
OUT B
L
X
X
X
X
None
None
L
X
X
X
None
None
H
L
L
L
L
1A
None
H
L
L
L
1A
1B
H
L
L
L
H
2A
None
H
L
L
H
2A
2B
H
L
L
H
L
3A
None
H
L
H
L
3A
3B
H
L
L
H
H
4A
None
H
L
H
H
4A
4B
H
L
H
L
L
5A
None
H
H
L
L
5A
5B
H
L
H
L
H
6A
None
H
H
L
H
6A
6B
H
L
H
H
L
7A
None
H
H
H
L
7A
7B
H
L
H
H
H
8A
None
H
H
H
H
8A
8B
H
H
L
L
L
None
1B
H
H
L
L
H
None
2B
H
H
L
H
L
None
3B
H
H
L
H
H
None
4B
H
H
H
L
L
None
5B
H
H
H
L
H
None
6B
H
H
H
H
L
None
7B
H
H
H
H
H
None
8B
NOTE:
1. For 16-channel single-ended function, tie ‘out A’ to ‘out B’; for
dual 8-channel function use the A3 address pin to select
between MUX A and MUX B, where MUX A is selected with A3
low.
2
HI-516
Functional Block Diagram
VDD /LLS
IN 1A
N
P
EN
OUT A
A0
DECODER
A1
IN 8A
A2
N
A3
P
Q
A3
DECODER
IN 1B
Q
N
P
OUT B
DECODER
IN 8B
N
INPUT BUFFER AND DECODERS
MULTIPLEXER
SWITCHES
A3 DECODE
3
P
A3
Q
Q
H
H
L
L
L
H
V-
L
L
HI-516
Absolute Maximum Ratings
Thermal Information
V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33V
Analog Signal. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (VIN , VOUT)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (V-) -2V to (V+) +2V
Digital Input Voltage:
TTL Levels Selected (VDD /LLS Pin = GND or Open)
VA0-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -6V to +6V
VA3/SDS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (V-) -2V to (V+) +2V
CMOS Levels Selected (VDD /LLS Pin = VDD)
VA0-3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -2V to (V+) +2V
Thermal Resistance (Typical, Note 2)
JA (oC/W)
PDIP Package* . . . . . . . . . . . . . . . . . . . . . . . . . . . .
60
Maximum Junction Temperature
Plastic Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .150oC
Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300oC
*Pb-free PDIPs can be used for through hole wave solder processing
only. They are not intended for use in Reflow solder processing
applications.
Operating Conditions
Temperature Ranges
HI-516-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 75oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
2. JA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
Supplies = +15V, -15V; VAH (Logic Level High) = 2.4V, VAL (Logic Level Low) = 0.8V;
VDD /LLS = GND. (Note 3) Unless Otherwise Specified
TEST
CONDITIONS
-5
TEMP
(oC)
MIN
TYP
MAX
UNITS
25
-
130
175
ns
Full
-
-
225
ns
Break-Before-Make Delay, tOPEN
25
10
20
-
ns
Enable Delay (ON), tON(EN)
25
-
120
175
ns
Enable Delay (OFF), tOFF(EN)
25
-
140
175
ns
To 0.1%
25
-
250
-
ns
To 0.01%
25
-
800
-
ns
Charge Injection Error
Note 6
25
-
-
20
mV
Off Isolation
Note 7
25
55
-
-
dB
Channel Input Capacitance, CS(OFF)
25
-
-
10
pF
Channel Output Capacitance,
CD(OFF)
25
-
-
25
pF
Digital Input Capacitance, CA
25
-
-
10
pF
Input to Output Capacitance,
CDS(OFF)
25
-
0.02
-
pF
PARAMETER
DYNAMIC CHARACTERISTICS
Access Time, tA
Settling Time
DIGITAL INPUT CHARACTERISTICS
Input Low Threshold, VAL (TTL)
Note 3
Full
-
-
0.8
V
Input High Threshold, VAH (TTL)
Note 3
Full
2.4
-
-
V
Input Low Threshold, VAL (CMOS)
Note 3
Full
-
-
0.3VDD
V
Input High Threshold, VAH (CMOS)
Note 3
Full
0.7VDD
-
-
V
Full
-
-
1
A
Input Leakage Current, IAH (High)
4
HI-516
Electrical Specifications
Supplies = +15V, -15V; VAH (Logic Level High) = 2.4V, VAL (Logic Level Low) = 0.8V;
VDD /LLS = GND. (Note 3) Unless Otherwise Specified (Continued)
TEST
CONDITIONS
PARAMETER
Input Leakage Current, IAL (Low)
-5
TEMP
(oC)
MIN
TYP
MAX
UNITS
Full
-
-
25
A
ANALOG CHANNEL CHARACTERISTICS
Analog Signal Range, VIN
Note 4
Full
-15
-
+15
V
On Resistance, rON
Note 5
25
-
620
750

Full
-
-
1,000

25
-
0.01
-
nA
Full
-
-
50
nA
25
-
0.03
-
nA
Full
-
-
100
nA
25
-
0.04
-
nA
Full
-
-
900
mW
Full
-
-
30
mA
Full
-
-
30
mA
Off Input Leakage Current, lS(OFF)
Off Output Leakage Current,
ID(OFF)
On Channel Leakage Current, ID(ON)
POWER SUPPLY CHARACTERISTICS
Power Dissipation, PD
I+, Current
VEN = 2.4V
I-, Current
NOTES:
3. VDD /LLS pin = open or grounded for TTL compatibility. VDD /LLS pin = VDD for CMOS compatibility.
4. At temperatures above 90oC, care must be taken to assure VIN remains at least 1V below the VSUPPLY for proper operation.
5. VIN = 10V, IOUT = -100A.
6. VIN = 0V, CL = 100pF, enable input pulse = 3V, f = 500kHz.
7. VEN = 0.8V, VIN = 3VRMS , f = 500kHz, CL = 40pF, RL = 1K, Pin 3 grounded.
5
HI-516
Test Circuits and Waveforms
VDD /LLS = GND, Unless Otherwise Specified.
IOUT 100A
0.8V
EN
V2
OUT
A ID(OFF)
IN
OUT
rON =
VIN
10V
V2

10V
10V
100A
FIGURE 1. ON RESISTANCE TEST CIRCUIT
FIGURE 2. ID(OFF) TEST CIRCUIT (NOTE 8)
OUT
OUT
IS(OFF) A
A ID(ON)
EN
EN
0.8V

10V
10V
10V
10V

2.4V
FIGURE 3. IS(OFF) TEST CIRCUIT (NOTE 8)
FIGURE 4. ID(ON) TEST CIRCUIT (NOTE 8)
+15V
ADDRESS
DRIVE (VA)
V+
50%
A3/SDS
0V
VA
+10V
50
OUTPUT
10%
2.4V
-10V
IN 1
A2
IN 2-15
A1
IN 16
A0
OUT A
EN
OUT B
VDD/LLS
tA
10V

3.5V
V-
GND
-15V
FIGURE 5A. MEASUREMENT POINTS
FIGURE 5B. TEST CIRCUIT
NOTE:
8. Two measurements per channel: 10V and
10V. (Two measurements per device for ID(OFF) 10V and 10V).
FIGURE 6. ACCESS TIME
6
10V
10
k
50
pF
HI-516
Test Circuits and Waveforms
VDD /LLS = GND, Unless Otherwise Specified.
(Continued)
+15V
3.5V
V+
A3
IN 2-15
ADDRESS
DRIVE (VA)
0V
VA
A1
50
50%
50%
IN 16
A0
OUTPUT
S1 ON
+5V
IN 1
A2
EN
VDD /LLS
2.4V
S16 ON
OUTA
OUTB
VOUT
800

V-
12.5pF
GND
tOPEN
-15V
FIGURE 7A. MEASUREMENT POINTS
FIGURE 7B. TEST CIRCUIT
FIGURE 7. BREAK-BEFORE-MAKE DELAY
+15V
3.5V
ENABLE DRIVE (VA)
50%
50%
V+
A3
+10V
IN 1
A2
0V
10%
IN 2-16
A1
OUTPUT
90%
A0
0V
tON(EN)
VA
tOFF(EN)
EN
VDD /LLS
50

OUTA
VOUT
800

V-
GND
12.5pF
-15V
FIGURE 8A. MEASUREMENT POINTS
FIGURE 8B. TEST CIRCUIT
FIGURE 8. ENABLE DELAYS
+15V
2.4V
V+
A0 , A1 , A 2 ,
A3 /SDS
3.0V
0V
VA
OUT
VO
VOUT
IN
A OR B
VOUT
CL = 100pF
EN
VA
GND
VDD/LLS
V-
-15V
FIGURE 9A. MEASUREMENT POINTS
FIGURE 9B. TEST CIRCUIT
VO is the measured voltage error due to charge injection. The error in coulombs is Q = CL x VO .
FIGURE 9. CHARGE INJECTION
7
HI-516
Die Characteristics
DIE DIMENSIONS:
PASSIVATION:
2250m x 3720m x 485m
Type: Nitride Over Silox
Nitride Thickness: 3.5kÅ 1kÅ
Silox Thickness: 12kÅ 2kÅ
METALLIZATION:
Type: CuAl
Thickness: 16kÅ 2kÅ
WORST CASE CURRENT DENSITY:
1.64 x 105 A/cm2
Metallization Mask Layout
HI-516
ENABLE A0 A1 A2 A3 /SDS
(17) (16) (15) (14)
(18)
VDD /LLS GND
(13)
(12)
IN 1/1A (19)
(10) IN 9/1B
IN 2/2A (20)
(9) IN 10/2B
IN 3/3A (21)
(8) IN 11/3B
IN 4/4A (22)
(7) IN 12/4B
IN 5/5A (23)
(6) IN 13/5B
IN 6/6A (24)
(5) IN 14/6B
IN 7/7A (25)
(4) IN 15/7B
IN 8/8A (26)
(3) IN 16/8B
(27)
(28)
-V OUT A
(1)
+V
(2)
OUT B
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9001 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
8
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