Data Sheet

IP3048CX5
Integrated dual channel passive LC-filter network with ESD
protection to IEC 61000-4-2 level 4
Rev. 3 — 10 February 2011
Product data sheet
1. Product profile
1.1 General description
The IP3048CX5 is a low-ohmic, dual channel LC low-pass filter array which is designed to
provide filtering of undesired RF signals. In addition, IP3048CX5 incorporates diodes to
provide protection to downstream components from ElectroStatic Discharge (ESD)
voltages as high as ±15 kV contact discharge according the IEC 61000-4-2 model, far
exceeding standard level 4.
The device is fabricated using monolithic silicon technology and integrates two inductors
and four pairs of back-to-back diodes in a 0.5 mm pitch Wafer-Level Chip-Scale Package
(WLCSP). These features make the IP3048CX5 ideal for use in applications requiring the
utmost in miniaturization such as mobile phone handsets, cordless telephones and other
portable electronic devices.
1.2 Features and benefits
„
„
„
„
Pb-free, RoHS compliant and free of halogen and antimony (Dark Green compliant)
Integrated dual channel π-type LC-filter network
0.25 Ω series resistance per channel; 190 pF channel capacitance
Integrated ESD protection withstanding ±15 kV contact discharge, far exceeding
IEC 61000-4-2 level 4
„ WLCSP with 0.5 mm pitch
1.3 Applications
Audio line ElectroMagnetic Interference (EMI) filtering and ESD protection in e.g.
„ Cellular and Personal Communication System (PCS) mobile handsets
„ DECT
„ Portable media player
IP3048CX5
NXP Semiconductors
Integrated dual channel passive LC-filter network with ESD protection
2. Pinning information
2.1 Pinning
bump A1
index area
2
1
A
B
B1
C
008aaa262
transparent top view,
solder balls facing down
Fig 1.
Pin configuration for WLCSP5
2.2 Pin description
Table 1.
Pinning
Pin
Description
A1
channel 1
A2
channel 2
B1
ground
C1
channel 1
C2
channel 2
3. Ordering information
Table 2.
Ordering information
Type number
IP3048CX5
IP3048CX5
Product data sheet
Package
Name
Description
Version
WLCSP5
wafer level chip-size package; 5 bumps (2-1-2)
IP3048CX5
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Rev. 3 — 10 February 2011
© NXP B.V. 2011. All rights reserved.
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IP3048CX5
NXP Semiconductors
Integrated dual channel passive LC-filter network with ESD protection
4. Functional diagram
Ls(ch)
A1
C1
C
C
B1
C
A2
Fig 2.
C
Ls(ch)
C2
008aaa242
Schematic diagram of IP3048CX5
5. Limiting values
Table 3.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Min
Max
Unit
VRWM
Ich
reverse standoff voltage
-
5
V
channel current (DC)
-
625
mA
VESD
electrostatic discharge voltage
−15
+15
kV
−15
+15
kV
contact discharge
−8
+8
kV
air discharge
all pins to ground
contact discharge
air discharge
[1][2]
IEC 61000-4-2 level 4; all pins
to ground
−15
+15
kV
Pch
channel power dissipation
continuous; Tamb = 85 °C
-
135
mW
Ptot
total power dissipation
continuous; Tamb = 85 °C
-
270
mW
PPP
peak pulse power
Tamb = 85 °C; maximum peak
power dissipation < 120 s;
δ < 50 %
-
270
mW
Tstg
storage temperature
−65
+150
°C
Treflow(peak)
peak reflow temperature
-
260
°C
Tamb
ambient temperature
−40
+85
°C
10 s maximum
[1]
Device is qualified with 1 000 pulses of ±15 kV contact discharges each, according to the IEC 61000-4-2 model and far exceeds the
specified level 4 (8 kV contact discharge).
[2]
A special robust test is performed stressing the devices with ≥ 1 000 contact discharges according to the IEC 61000-4-2 model and far
exceeds the specified level 4 (8 kV contact discharge).
IP3048CX5
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 10 February 2011
© NXP B.V. 2011. All rights reserved.
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IP3048CX5
NXP Semiconductors
Integrated dual channel passive LC-filter network with ESD protection
6. Characteristics
Table 4.
Channel characteristics
Tamb = 25 °C; unless otherwise specified.
Symbol Parameter
Conditions
Min
Typ
Max
Unit
-
0.25
0.35
Ω
-
3
-
nH
150
190
225
pF
Rs(ch)
channel series resistance
Ls(ch)
channel series inductance
Cch
channel capacitance
Vbias(DC) = 2.5 V;
f = 100 kHz
VBR
breakdown voltage
positive clamp;
Itest = 1 mA
6
-
10
V
negative clamp;
Itest = −1 mA
−10
-
−6
V
per channel; VI = 3 V
-
-
1
μA
per channel; VI = −3 V
−1
-
-
μA
Min
Typ
Max
Unit
RL = 50 Ω
-
35
-
dB
RL = 4 Ω
-
40
-
dB
ILR
[1]
reverse leakage current
[1]
Guaranteed by design.
Table 5.
Frequency characteristics
Tamb = 25 °C; unless otherwise specified.
IP3048CX5
Product data sheet
Symbol Parameter
Conditions
αil
Rgen = 50 Ω;
800 MHz < fi < 2 GHz
insertion loss
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Rev. 3 — 10 February 2011
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IP3048CX5
NXP Semiconductors
Integrated dual channel passive LC-filter network with ESD protection
7. Application information
The setup for measuring insertion loss in a 50 Ω system is shown in Figure 3.
IN
DUT
OUT
50 Ω
50 Ω
TEST BOARD
Vgen
001aai755
Fig 3.
Frequency response measurement configuration
The insertion loss in a 50 Ω system for the two channels of the IP3048CX5 is shown in
Figure 4. The insertion loss is measured directly on the wafer with coplanar probes.
Unused pins are connected to ground with 50 Ω.
008aaa240
0
s21
(dB)
s21
(dB)
−10
−10
−20
−20
−30
−30
−40
−40
−50
008aaa241
0
1
10
102
103
104
−50
1
10
102
f (MHz)
104
f (MHz)
a. Channel 1 (pins A1 and C1).
Fig 4.
103
b. Channel 2 (pins A2 and C2).
Measured insertion loss magnitudes
IP3048CX5
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 10 February 2011
© NXP B.V. 2011. All rights reserved.
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IP3048CX5
NXP Semiconductors
Integrated dual channel passive LC-filter network with ESD protection
8. Package outline
WLCSP5: wafer level chip-size package; 5 bumps (2-1-2)
bump A1
index area
D
A2
E
A
A1
detail X
e
1/2 e
b
C
e1
B1
B
e2
A
2
1
X
European
projection
wlcsp5_2-1-2_r_po
Fig 5.
Table 6.
Package outline IP3048CX5 (WLCSP5)
Dimensions for Figure 5
Symbol
Min
Typ
Max
Unit
A
0.61
0.65
0.69
mm
A1
0.22
0.24
0.26
mm
A2
0.39
0.41
0.43
mm
b
0.27
0.32
0.37
mm
D
1.09
1.14
1.19
mm
E
1.46
1.51
1.56
mm
e
-
0.5
-
mm
e1
-
0.435
-
mm
e2
-
0.87
-
mm
IP3048CX5
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 10 February 2011
© NXP B.V. 2011. All rights reserved.
6 of 11
IP3048CX5
NXP Semiconductors
Integrated dual channel passive LC-filter network with ESD protection
9. Design and assembly recommendations
9.1 PCB design guidelines
It is recommended, for optimum performance, to use a Non-Solder Mask Defined
(NSMD), also known as a copper-defined design, incorporating laser-drilled micro-vias
connecting the ground pads to a buried ground-plane layer. This results in the lowest
possible ground inductance and provides the best high frequency and ESD performance.
Refer to Table 7 for the recommended PCB design parameters.
Table 7.
Recommended PCB design parameters
Parameter
Value or specification
PCB pad diameter
275 μm
Micro-via diameter
100 μm (0.004 inch)
Solder mask aperture diameter
375 μm
Copper thickness
20 μm to 40 μm
Copper finish
AuNi
PCB material
FR4
9.2 PCB assembly guidelines for Pb-free soldering
Table 8.
Assembly recommendations
Parameter
Value or specification
Solder screen aperture diameter
330 μm
Solder screen thickness
100 μm (0.004 inch)
Solder paste: Pb-free
SnAg (3 % to 4 %); Cu (0.5 % to 0.9 %)
Solder to flux ratio
50 : 50
Solder reflow profile
see Figure 6
T
(°C)
Treflow(peak)
250
230
cooling rate
217
preheat
t1
t2
t3
t4
t (s)
t5
001aai943
The device is capable of withstanding at least three reflows of this profile.
Fig 6.
IP3048CX5
Product data sheet
Pb-free solder reflow profile
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 10 February 2011
© NXP B.V. 2011. All rights reserved.
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IP3048CX5
NXP Semiconductors
Integrated dual channel passive LC-filter network with ESD protection
Table 9.
Characteristics
Symbol
Parameter
Treflow(peak)
peak reflow temperature
t1
time 1
t2
time 2
t3
Conditions
Min
Typ
Max
Unit
230
-
260
°C
soak time
60
-
180
s
time during T ≥ 250 °C
-
-
30
s
time 3
time during T ≥ 230 °C
10
-
50
s
t4
time 4
time during T > 217 °C
30
-
150
s
t5
time 5
dT/dt
rate of change of
temperature
-
-
540
s
cooling rate
-
-
−6
°C/s
preheat
2.5
-
4.0
°C/s
10. Abbreviations
Table 10.
Abbreviations
Acronym
Description
DUT
Device Under Test
EMI
ElectroMagnetic Interference
ESD
ElectroStatic Discharge
FR4
Flame Retard 4
NSMD
Non-Solder Mask Defined
PCB
Printed-Circuit Board
PCS
Personal Communication System
RF
Radio Frequency
RoHS
Restriction of Hazardous Substances
WLCSP
Wafer-Level Chip-Scale Package
11. Revision history
Table 11.
Revision history
Document ID
Release date Data sheet status
Change notice
Supersedes
IP3048CX5 v.3
20110210
-
IP3048CX5 v.2
Modifications:
•
Product data sheet
Figure 1 and Figure 5: changed
IP3048CX5 v.2
20101104
Product data sheet
-
IP3048CX5 v.1
IP3048CX5 v.1
20101018
Product data sheet
-
-
IP3048CX5
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 10 February 2011
© NXP B.V. 2011. All rights reserved.
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IP3048CX5
NXP Semiconductors
Integrated dual channel passive LC-filter network with ESD protection
12. Legal information
12.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
12.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
12.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from national authorities.
IP3048CX5
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 10 February 2011
© NXP B.V. 2011. All rights reserved.
9 of 11
IP3048CX5
NXP Semiconductors
Integrated dual channel passive LC-filter network with ESD protection
Non-automotive qualified products — Unless this data sheet expressly
states that this specific NXP Semiconductors product is automotive qualified,
the product is not suitable for automotive use. It is neither qualified nor tested
in accordance with automotive testing or application requirements. NXP
Semiconductors accepts no liability for inclusion and/or use of
non-automotive qualified products in automotive equipment or applications.
NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
liability, damages or failed product claims resulting from customer design and
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards, customer
(a) shall use the product without NXP Semiconductors’ warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
12.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
13. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
IP3048CX5
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 10 February 2011
© NXP B.V. 2011. All rights reserved.
10 of 11
IP3048CX5
NXP Semiconductors
Integrated dual channel passive LC-filter network with ESD protection
14. Contents
1
1.1
1.2
1.3
2
2.1
2.2
3
4
5
6
7
8
9
9.1
9.2
10
11
12
12.1
12.2
12.3
12.4
13
14
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
General description . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Pinning information . . . . . . . . . . . . . . . . . . . . . . 2
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 2
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 3
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Application information. . . . . . . . . . . . . . . . . . . 5
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 6
Design and assembly recommendations . . . . 7
PCB design guidelines . . . . . . . . . . . . . . . . . . . 7
PCB assembly guidelines for Pb-free soldering 7
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . 8
Legal information. . . . . . . . . . . . . . . . . . . . . . . . 9
Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 9
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Contact information. . . . . . . . . . . . . . . . . . . . . 10
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2011.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 10 February 2011
Document identifier: IP3048CX5