Data Sheet

INTEGRATED CIRCUITS
DATA SHEET
PCA148x series
32 kHz watch circuits with adaptive
motor pulse
Product specification
Supersedes data of 1998 Mar 26
File under Integrated Circuits, IC16
1998 Apr 21
Philips Semiconductors
Product specification
32 kHz watch circuits with adaptive motor
pulse
PCA148x series
• No loss of motor steps possible because of on-chip
detection of the induced motor voltage
FEATURES
• 32 kHz oscillator, amplitude regulated with excellent
frequency stability
• Indication for battery end-of-life
• High immunity of the oscillator to leakage currents
• Stop function for accurate timing
• Time calibration electrically programmable and
reprogrammable (via EEPROM)
• Power-on reset for fast testing
• Various test modes for testing the mechanical parts of
the watch and the IC.
• A quartz crystal is the only external component required
• Very low current consumption; typically 170 nA
• Output for bipolar stepping motors of different types
GENERAL DESCRIPTION
• Up to 50% reduction in motor current compared with
conventional circuits, by self adaption of the motor pulse
width in accordance with the required torque of the
motor
The PCA148x series devices are CMOS integrated circuits
specially suited for battery-operated,
quartz-crystal-controlled wrist-watches, with a bipolar
stepping motor.
ORDERING INFORMATION
PACKAGE(1)
TYPE
NUMBER
NAME
DESCRIPTION
VERSION
PCA1485U/7
−
chip with bumps on tape
−
PCA1486U/7
−
chip with bumps on tape
−
PCA1486U/10
−
chip on foil
−
PCA1487U/10
−
chip on foil
−
Note
1. Figure 1 and Chapter “Package outline” show details of standard package, available for large orders only.
Chapter “Chip dimensions and bonding pad locations” shows exact pad locations for other delivery formats.
PINNING
SYMBOL
PIN
DESCRIPTION
VSS
1
ground (0 V)
TEST
2
test output
OSC IN
3
oscillator input
OSC OUT
4
oscillator output
VDD
5
supply voltage
M1
6
motor 1 output
M2
7
motor 2 output
RESET
8
reset input
1998 Apr 21
VSS
1
TEST
2
8
RESET
7
M2
PCA148xT
OSC IN
3
6
M1
OSC OUT
4
5
V DD
MSA968
Fig.1 Pin configuration, PCA148xT, (PMFP8).
2
Philips Semiconductors
Product specification
32 kHz watch circuits with adaptive motor
pulse
PCA148x series
After a RESET the circuit always starts and continues with
stage 1, when all motor pulses have been executed.
A failure to execute all motor pulses results in the circuit
going into stage 2, this sequence will be repeated through
to stage 6.
FUNCTIONAL DESCRIPTION AND TESTING
The motor output delivers pulses of six different stages
depending on the torque required to turn the motor (Fig.3).
Every motor pulse is followed by a detection phase which
monitors the waveform of the induced motor voltage.
When a step is missed a correction sequence will be
started (Fig.2).
When the motor pulses at stage 5 are not large enough to
turn the motor, stage 6 is implemented for a maximum of
8 minutes with no attempt to keep current consumption
low. After stage 6 has been executed the procedure is
repeated from RESET.
Motor pulses
The circuit produces motor pulses of six different stages
(stage 1 to 5, stage 6).
The circuit operates for 8 minutes at a fixed stage, if every
motor pulse is executed. The next 480 motor pulses are
then produced at the next lower stage unless a missing
step is detected. If a step is missed a correction sequence
is produced and for a maximum of 8 minutes the motor
pulses are increased by one stage.
Stages 1 to 5 are used in normal operation, stage 6 occurs
under the following conditions:
• Correction pulse after a missing step
• End-of-life mode
• If stage 5 is not enough to turn the motor.
The ON state of the motor pulse varies between 43.75%
and 75% of the duty factor tDF = 977 µs depending on the
stage (Fig.3). It increases in steps of 6.25% per stage.
DETECTION
MOTOR
PULSE
POSSIBLE CORRECTION
SEQUENCE
VM1 - M2
tP
tD
MSA969
tC
tT
Fig.2 Possible motor output waveform in normal operation with motor connected.
1998 Apr 21
3
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t SOFF
t ONL
t ON = t SON t DF
=
t DF t SOFF
STAGE 1
43.75 %
STAGE 2
50.00 %
STAGE 3
56.25 %
STAGE 4
62.50 %
4
STAGE 5
68.75 %
t DF
Philips Semiconductors
t DF = 977 µs
t SON
32 kHz watch circuits with adaptive motor
pulse
1998 Apr 21
t SONF = 244 µs
STAGE 6
75.00 %
t P3 = 3.9 ms
t P2 = 5.86 ms
t P1 = 7.81 ms
Product specification
Fig.3 Motor pulses (VDD = 1.55 V).
PCA148x series
tOFF for stage 1 to 6 = 611 µs − stage × 61 µs
tON for stage 1 to 6 = 366 µs + stage × 61 µs
MSA970
Philips Semiconductors
Product specification
32 kHz watch circuits with adaptive motor
pulse
PCA148x series
Voltage level detector
Detection of motor movement
The supply voltage is compared with the internal voltage
reference VEOL every minute. The first voltage level
detection is carried out 30 ms after RESET.
After a motor pulse, the motor is short-circuited to VDD for
1 ms. Afterwards the energy in the motor inductor will be
dissipated to measure only the current generated by the
induced motor voltage. During the time tDI (dissipation of
energy time) all switches shown in Fig.4 are open to
reduce the current as fast as possible. The current will now
flow through the diodes D3 and D2, or D4 and D1. Then
the first of 52 possible measurement cycles (tMC) starts to
measure the induced current.
When the detected VDD voltage level is greater than VEOL,
the circuit operates in normal mode (Fig.3).
If the battery end-of-life is detected (VDD < VEOL), the
detection and stage control is switched OFF and the
waveform of stage 6 will be executed. To indicate this
condition the waveform is produced in bursts of 4 pulses
every 4 s.
VDD
P1
D1
L1
D2
M1
N1
MOTOR
P2
M2
D3
L2
D4
N2
MSA941
Fig.4 Motor driving and detecting circuit.
1998 Apr 21
5
V SS
Philips Semiconductors
Product specification
32 kHz watch circuits with adaptive motor
pulse
PCA148x series
The waveform of the induced current must enable all these
measurements within the time tD after the end of a positive
motor pulse in order to be accepted as a waveform of an
executed motor pulse.
Detection criteria
The PCA148x uses current detection in two defined parts
of the detection phase to determine if the motor has moved
(refer to Figs 5 and 6). The detection criteria are:
If the detection criterion is satisfied earlier, a measurement
cycle will not be started and the switches P1 and P2 stay
closed, the motor is switched to VDD.
part 1
• Minimum value of P = 1; where P = number of
measured positive current polarities after tDI.
part 2
Every measurement cycle (tMC) has 4 phases. These are
detailed in Table 1.
• Minimum value of N = 2; where N = number of
measured positive current polarities since the first
negative current polarity after part 1 was detected
(see Fig.5).
Note that detection and pulse width control will be switched
OFF when the battery voltage is below the end-of-life
voltage (VEOL), or if stage 5 is not sufficient to turn the
motor.
If the opposite polarity is measured in one part, the internal
counter is reset, so the results of all measurements in this
part are ignored.
Table 1
Measurement cycle
SYMBOL
PHASE
DESCRIPTION
tM1
1
During tM1 the switches P1 and P2 are closed in order to switch the motor to VDD, so the
induced current flows unaffected through the motor inductance.
tM2
2
Measures the induced current; during a maximum time tM2 all switches are open until a
change is sensed by one of the level detectors (L1, L2). The motor is short-circuited to VDD.
Depending on the direction of the interrupted current:
• The current flows through diodes D3 and D2, causing the voltage at M1 to decrease in
relation to M2;
• The current flows through diodes D4 and D1, causing the voltage at M2 to decrease in
relation to M1.
A successfully detected current polarity is normally characterized by a short pulse of
0.5 to 10 µs with a voltage up to ±2.1 V, failed polarity detection by the maximum pulse width
of 61 µs and a voltage of ±0.5 V (see Fig.6).
tM3
3
The switches P1 and P2 remain closed for the time tM3.
tM4
4
If the circuit detects fewer pulses than P and N respectively, a pulse of the time tM4 occurs to
reduce the induced current. Therefore P2 and P1 are opened and N1 and N2 are closed.
Otherwise P1 and P2 remain closed.
1998 Apr 21
6
Philips Semiconductors
Product specification
32 kHz watch circuits with adaptive motor
pulse
MOTOR PULSE
PCA148x series
DETECTION PHASE
I M1 - M2
part 1
detection criterion
is satisfied
part 2
t
t DS
t DI
tP
MSA944
tD
Fig.5 Typical current waveform of a successfully executed motor pulse.
DETECTION PHASE
MOTOR
PULSE
V M1 - M2
tM1 = 244 µs
t M3
t DS
t DI
tMC = 488 µs
t M4 t M1
t M2 = 61 µs
t
M2
= 61 µs
tD
tP
current polarity
not measured
detection
criterion is
satisfied
VM1
t M2 = 61 µs
tMC = 488 µs
t M1 = 244 µs
t DS
t DI
t M2 = 61 µs
Fig.6 Detection phase of the current waveform in Fig.5.
1998 Apr 21
7
t M1 = 244 µs
MSA945
Philips Semiconductors
Product specification
32 kHz watch circuits with adaptive motor
pulse
PCA148x series
Correction sequence (see Fig.7)
If a missing step is detected, a correction sequence is produced. This consists of a small pulse (tC1) which gives the motor
a defined position and after 29.30 ms a pulse of stage 6 (tC2) to turn the motor.
MOTOR
PULSE
DETECTION
tP
tD
CORRECTION SEQUENCE
VM1 - M2
t C1 = 977 µs
t C2 = t P
t C = 30.27 ms
tP
Fig.7 Correction sequence after a missing motor step with motor connected.
1998 Apr 21
8
MSA943
Philips Semiconductors
Product specification
32 kHz watch circuits with adaptive motor
pulse
3. VDD is decreased to 2.5 V during a motor pulse to
initialize a storing sequence.
Time calibration
Taking a normal quartz crystal with frequency 32768kHz,
frequency deviation (∆f/f) of ±15 × 10−6 and CL = 8.2 pF;
the oscillator frequency is offset (by using non-symmetrical
internal oscillator input and output capacitances of 10 pF
and 15 pF) such that the frequency deviation is
positive-only. This positive deviation can then be
compensated for to maintain time-keeping accuracy.
4. The first VDD pulse to 5.1 V erases the contents of
EEPROM.
5. When the EEPROM is erased a logic 1 is at the TEST
pin.
6. VDD is increased to 5.1 V to read the data by pulsing
VDD n times to 4.5 V. After the n edge, VDD is
decreased to 2.5 V.
Once the positive frequency deviation is measured, a
corresponding number ‘n’ (see Table 2) is programmed
into the device’s EEPROM. This causes n pulses of
frequency 8192 Hz to be inhibited every minute of
operation, which achieves the required calibration.
7. VDD is increased to 5.1 V to store n bits in the
EEPROM.
8. VDD is decreased to 2.5 V to terminate the storing
sequence and to return to operating mode.
The programming circuit is shown in Fig.8. The required
number n is programmed into EEPROM by varying VDD
according to the steps shown in Fig.9, which are
explained below:
9. VDD is increased to 5.1 V to check writing from the
motor pulse period tT3.
10. VDD is decreased to the operation voltage between
two motor pulses to return to operating mode.
(Decreasing VDD during the motor pulse would restart
the programming mode).
1. The positive quartz frequency deviation (∆f/f) is
measured, and the corresponding values of n are
found according to Table 2.
The time calibration can be reprogrammed up to
100 times.
2. VDD is increased to 5.1 V allowing the contents of the
EEPROM to be checked from the motor pulse period
tT3 at nominal frequency.
Table 2
PCA148x series
Quartz crystal frequency deviation, n and tT3
FREQUENCY
DEVIATION
∆f/f
(× 10−6)
NUMBER OF
PULSES
(n)
tT3
(ms)
0(1)
0
31.250(2)
+2.03
1
31.372
+4.06
2
31.494
.
.
.
SIGNAL GENERATOR
.
.
.
.
.
.
+127.89
63
38.936
V SS
TEST
OSC IN
1
8
2
7
PCA148x
SERIES
M2
M
3
6
4
5
32 kHz
OSC OUT
RESET
M1
VDD
MSA971
Notes
1. Increments of 2.03 × 10−6/step.
Fig.8 Circuit for programming the time calibration.
2. Increments of 122 µs/step.
1998 Apr 21
9
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DATA INPUT
CHECKING
STORING
I DD
∆ V DDP
1
2
3
t T3
n
5.1
4.5
9
10
t edge = 1 µs
10
VDD (V)
0.1 ms
min.
2.5
1
2
3
4
5
6
7
8
9
10
Philips Semiconductors
ERASURE
32 kHz watch circuits with adaptive motor
pulse
1998 Apr 21
CONTENT CHECKING
1.5
t E = 5 ms
t S = 5 ms
0 (VSS)
(1)
(1)
MSA948
Product specification
Fig.9 VDD for programming.
(1)
PCA148x series
(1) Rise and fall time should be greater than 400 µs/V for immediately correct checking.
(1)
Philips Semiconductors
Product specification
32 kHz watch circuits with adaptive motor
pulse
PCA148x series
Test 1, VDD > VEOL. Normal function takes place except
that the motor pulse period is tT1 = 125 ms instead of tT,
and the motor pulse stage is reduced every second
instead of every 8 minutes. At TEST a speeded-up
8 minute signal is available.
Power-on reset
For correct operation of the Power-on reset the rise time of
VDD from 0 V to 2.1 V should be less than 0.1 ms.
All resettable flip-flops are reset. Additionally the polarity of
the first motor pulse is positive: VM1 − VM2 ≥ 0 V.
Test 2, VDD < VEOL. Motor pulses of stage 6 are produced,
with a time period of tT2 = 31.25 ms.
Customer testing
Test and reset modes are terminated by disconnecting the
RESET pin.
An output frequency of 32 Hz is provided at RESET (pin 8)
to be used for exact frequency measurement. Every
minute a jitter occurs as a result of the inhibition, which
occurs 90 to 150 ms after disconnecting the RESET from
VDD.
Test 3, VDD > 5.1 V. Motor pulses without chopping are
produced, with a time period of tT3 = 31.25 ms and
n × 122 µs to check the contents of the EEPROM.
At TEST a speeded-up cycle for motor pulse period signal
tT is available at 1024 times its normal frequency.
Decreasing VDD voltage level to lower than 2.5 V between
two motor pulses returns the circuit to normal operating
conditions.
Connecting the RESET to VDD stops the motor pulses
leaving them in a 3-state mode and sets the motor pulse
width for the next available motor pulse to stage 1. A 32 Hz
signal without jitter is produced at the TEST pin. Debounce
time RESET = 14.7 to 123.2 ms.
Connecting RESET to VSS activates Tests 1 and 2 and
disables the inhibition.
AVAILABLE TYPES
Refer to Chapters “Ordering information” and “Functional description and testing”.
SPECIFICATIONS
SHORT
TYPE
NUMBER
DELIVERY
FORMAT(1)
PERIOD
tT
(s)
PULSE
WIDTH
tP
(ms)
DRIVE
(%)
DETECTION
CRITERION
1485
U/7
1
5.8
75
1486
U/7
1
5.8
1487
U/5
1
7.8
EEPROM
BATTERY
EOL
DETECTION
P=1
N=2
yes
yes
75
P=1
N=2
yes
no
75
P=2
N=3
yes
yes
Note
1. U = Chip in trays; U/5 = wafer; U/7 = chip with bumps on tape.
1998 Apr 21
11
REMARKS
Philips Semiconductors
Product specification
32 kHz watch circuits with adaptive motor
pulse
PCA148x series
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
PARAMETER
VDD
supply voltage
VI
all input voltages
CONDITIONS
VSS = 0 V; note 1
MIN.
MAX.
UNIT
−1.8
+6
V
VSS
VDD
V
output short-circuit duration
indefinite
Tamb
operating ambient temperature
−10
+60
°C
Tstg
storage temperature
−30
+100
°C
Note
1. Connecting the battery with reversed polarity does not destroy the circuit, but in this condition a large current flows,
which will rapidly discharge the battery.
HANDLING
Inputs and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is
advisable to take handling precautions appropriate to handling MOS devices. Advice can be found in
“Data Handbook IC16, General, Handling MOS Devices”.
1998 Apr 21
12
Philips Semiconductors
Product specification
32 kHz watch circuits with adaptive motor
pulse
PCA148x series
CHARACTERISTICS
VDD = 1.55 V; VSS = 0 V; fosc = 32.768 kHz; Tamb = 25 °C; crystal: RS = 20 kΩ; C1 = 2 to 3 fF; CL = 8 to 10 pF;
C0 = 1 to 3 pF; unless otherwise specified.
Immunity against parasitic impedance = 20 MΩ from one pin to an adjacent pin.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Supply
VDD1
supply voltage
Tamb = −10 to +60 °C
1.2
1.55
2.5
V
∆VDD
supply voltage variation
transient
−
−
0.25
V
VDD2
supply voltage pulse
programming
5.0
5.1
5.2
V
∆VDDP
supply voltage pulse
variation
programming
0.55
0.6
0.65
V
IDD1
supply current
between motor pulses
−
170
260
nA
IDD2
supply current
Tamb = −10 to +60 °C
−
−
600
nA
IDD3
supply current
stop mode; pin 8 connected
to VDD
−
180
280
nA
Motor output
Vsat
saturation voltage Σ (P + N)
RM = 2 kΩ;
Tamb = −10 to +60 °C
−
150
200
mV
Zo(sc)
output short-circuit
impedance
between motor pulses
Itransistor < 1 mA
−
200
300
Ω
1.2
−
−
V
Oscillator
VOSC ST
starting voltage
gm
transconductance
tosc
start-up time
∆f/f
frequency stability
Ci
Co
Vi(p-p) ≤ 50 mV
6
15
−
µS
−
1
−
s
−
0.05 × 10−6
0.3 × 10−6
input capacitance
8
10
12
pF
output capacitance
12
15
18
pF
∆VDD = 100 mV
Voltage level detector
VEOL
threshold voltage
1.30
1.38
1.46
V
∆VEOL
hysteresis of threshold
−
10
−
mV
TCEOL
temperature coefficient
−
−1
−
mV/K
fo
output frequency
−
32
−
Hz
∆Vo
output voltage swing
R = 1 MΩ; C = 10 pF
1.4
−
−
V
tedge
edge time
R = 1 MΩ; C = 10 pF
−
1
−
µs
Iim
peak input current
note 1
−
320
−
nA
Ii(av)
average input current
−
10
−
nA
Reset input
Note
1. Duty factor is 1 : 32 and RESET = VDD or VSS.
1998 Apr 21
13
Philips Semiconductors
Product specification
32 kHz watch circuits with adaptive motor
pulse
PCA148x series
TIMING PARAMETERS
SYMBOL
PARAMETER
SECTION
OPTION
UNIT
tT
cycle for motor pulse (note 1)
1
5, 10, 12 or 20
s
tP
motor pulse width
7.81
3.9 or 5.9
ms
tDF
duty factor
977
−
µs
tONL
last duty factor on
183 to 488
−
µs
tv
voltage detection cycle
level mode
60
−
s
tSON
duty factor on
silver-oxide mode (Fig.3)
427 to 733
−
µs
tSOFF
duty factor off
550 to 244
−
µs
tSONF
first duty factor on
244
−
µs
tE
EOL sequence
4
−
s
tE1
motor pulse width
tP
−
ms
tE2
time between pulses
31.25
−
ms
tD
detection sequence
4.3 to 28.3
−
ms
tDS
short-circuited motor
977
−
µs
tDI
dissipation of energy
977
−
µs
tMC
measurement cycle
488
−
µs
tM1
phase 1
244
−
µs
tM2
phase 2 (measure window)
61
−
µs
tM3
phase 3
122
−
µs
tM4
phase 4
61
−
µs
P
positive current polarities
2
P<N
N
negative current polarities
3
2 to 6
tC
correction sequence
tP + 30.27
−
ms
tC1
small pulse width
977
−
µs
large pulse width
tP
−
ms
125
−
ms
31.25
−
ms
31.25 to 39
−
ms
14.7 to 123.2
−
ms
tC2
motor pulse (Figs 2 and 3)
VALUE
end-of-life mode
detection (Fig.6)
correction sequence (Fig.7)
cycle time for motor pulses in: testing
tT1
test 1
tT2
test 2
tT3
test 3
tDEB
see Fig.9
debounce time for
RESET = VDD
Note
1. No option available when EOL indication is required.
1998 Apr 21
14
Philips Semiconductors
Product specification
32 kHz watch circuits with adaptive motor
pulse
PCA148x series
CHIP DIMENSIONS AND BONDING PAD LOCATIONS
y
OSC OUT
OSC IN
TEST
V SS
PCA148xU
SERIES
1.44 mm
0
0
x
VDD
M1
M2
2.02 mm
RESET
MSA972
Chip area: 2.91 mm2.
Bonding pad dimensions: 110 µm × 110 µm.
Chip thickness: 200 ±25 µm, with bumps: 270 ±25 µm.
Fig.10 Bonding pad locations, PCA148xU series; 8 terminals.
Table 3 Bonding pad locations (dimensions in µm)
All x/y coordinates are referenced to bottom left pad (VDD), see Fig.10.
PAD
x
y
1290
1100
TEST
940
1100
OSC IN
481
1100
OSC OUT
−102
1100
VDD
0
0
M1
578
0
M2
930
0
VSS
RESET
chip corner (max. value)
1998 Apr 21
1290
0
−497.5
−170
15
Philips Semiconductors
Product specification
32 kHz watch circuits with adaptive motor
pulse
PCA148x series
APPLICATION INFORMATION
1.55 V
V SS
TEST
1
8
2
7
PCA148x
SERIES
(1)
OSC IN
OSC OUT
RESET
C M(2)
M2
M
3
6
4
5
M1
C M(2)
VDD
MSA967
(1) Quartz crystal case should be connected to VDD. Stray capacitance and leakage resistance from RESET, M1 or M2 to OSC IN should be less than
0.5 pF or larger than 20 MΩ.
(2) Motor, probe and stray capacitance from M2 or M1 to VDD or VSS should be less than CM = 80 pF for correct operation of the detection circuit.
Driving the motor at its minimum energy, probe and stray capacitance must be avoided.
Fig.11 Typical application circuit diagram.
1998 Apr 21
16
Philips Semiconductors
Product specification
32 kHz watch circuits with adaptive motor
pulse
PCA148x series
PACKAGE OUTLINE
PMFP8: plastic micro flat package; 8 leads (straight)
SOT144-1
E
D
X
c
m
t
n
HE
8
5
Q2
A2
Q1
pin 1 index
L
detail X
1
4
e
w M
b
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A2
b
c
D (1)
E (1)
e
HE
L
m
max.
n
max.
Q1
Q2
t
w
mm
0.90
0.70
0.40
0.25
0.19
0.12
3.1
2.9
3.1
2.9
0.80
4.6
4.4
0.75
0.26
0.3
0.40
0.30
0.40
0.30
0.95
0.1
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
OUTLINE
VERSION
REFERENCES
IEC
JEDEC
EIAJ
ISSUE DATE
94-01-25
95-01-24
SOT144-1
1998 Apr 21
EUROPEAN
PROJECTION
17
Philips Semiconductors
Product specification
32 kHz watch circuits with adaptive motor
pulse
PCA148x series
DEFINITIONS
Data sheet status
Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification
This data sheet contains preliminary data; supplementary data may be published later.
Product specification
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1998 Apr 21
18
Philips Semiconductors
Product specification
32 kHz watch circuits with adaptive motor
pulse
NOTES
1998 Apr 21
19
PCA148x series
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© Philips Electronics N.V. 1998
SCA57
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
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under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
415108/1200/04/pp20
Date of release: 1998 Apr 21
Document order number:
9397 750 03771
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