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Energy Star® V2.0 compliant flyback converter using
the ZXGD3101 synchronous MOSFET controller
Adrian Wong & Yong Ang, Diodes Incorporated
Introduction
Several regulatory bodies around the world address efficiency issues in External Power Supply
(EPS) and drive to reduce energy consumption in the compliant adaptors. One example of these is
the Energy Star® V2.0 which comes into force in November 2008. The standard targets both the
issues of active mode efficiency as well as no load power consumption as shown in Tables 1 and
2. This application note addresses the challenge of complying with the voluntary standard in a
flyback converter typically employed as EPS below 100W output power. In particular, the paper
discusses the efficiency improvement with the aid of the ZXGD3101 synchronous MOSFET
controller and studies its practical limit against normal rectification method. Finally, experimental
verification is presented to demonstrate efficiency improvement in a universal input 60W (19V
3.2A) flyback adapter.
Table 1 - active mode efficiency requirement for Energy Star® V2.0
Nameplate Output Power (Pno)
Minimum Average Efficiency in Active Mode
0 to ⱕ 1 watt
ⱖ 0.495 * Pno + 0.143
> 1 to ⱕ 49 watts
ⱖ [0.06 * Ln (Pno)] + 0.638
> 49 watts
ⱖ 0.870
Table 2 - no-load energy consumption criteria (from November 2008)
Nameplate Output Power (Pno)
Maximum Power in No-Load
AC-AC EPS
AC-DC EPS
0 to ⬍ 50 watts
ⱕ 0.5 watts
ⱕ 0.3 watts
ⱖ 50 to ⱕ 250 watts
ⱕ 0.5 watts
ⱕ 0.5 watts
Synchronous MOSFET controller improves flyback adapter's active mode efficiency
In general, flyback converters working as either the direct universal AC/DC conversion or the DC/DC
conversion following the front end PFC stage are economical and practical in a wide range of typical offline
applications with output power below 150W. This is because the power component count is minimal and
the PWM control scheme is the simplest among all other topologies. Moreover, their critical parts including
the power transformer, the primary switch, the input bulk capacitor, the output rectifier, the output
capacitor and the heat sinks are optimal in terms of both size and cost.
For an output power up to about 100W for high voltage and low to medium current output operations,
Discontinuous Conduction Mode (DCM) and Critical Conduction Mode (CrCM) is the preferred method, due
to the absence of primary switch turn-on loss. Furthermore, the DCM transformer size can be reduced
owing to the lower average energy storage while its smaller magnetizing inductance yields a better
transient line/load response. Alternatively, the continuous conduction mode (CCM) operation offers a
higher efficiency due to the lower primary and secondary peak/RMS currents at the expense of a bigger
transformer. Critically, much of a flyback adapter's inefficiency is caused by the Schottky or ultra-fast
recovery diode used on the secondary side.
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Replacing the output diode in Figure 1 with a more efficient MOSFET is recognized as a clear means of
drastically improving efficiency to meet the voluntary energy standard and removing the need for bulky
heat sinks and reducing the size and weight of power adapters.
Schottky /U ltra-fast diode
Vo
T ransform er
+ In
C clam p
C snub
Rclam p
R snub
D clam p
GN D
Q SWI
PW M
C ontroller
- In
Figure 1 - Flyback converter with diode rectification
The ZXGD3101 synchronous MOSFET controller was introduced to drive MOSFET in such a way that it
can emulate performance of an ideal diode. It integrates a high voltage differential amplifier stage and a
high current driver into the compact SM8 chip package.
Figure 2 shows the new gate driving circuit on a single DC output flyback adapter in low-side rectification
for the ease of deriving Vcc supply from the converter's output. The ZXGD3101 monitors the reverse
Drain-Source voltage of the QSYN and when conduction occurs in the body-diode, it applies a positive
voltage to its gate control pin, turning the MOSFET on. The gate drive voltage is then proportional to the
Drain-Source reverse voltage, ensuring rapid turn-off as MOSFET current decays. Since no timing
information needs to be transferred from the primary side and no timing components are needed on the
secondary side, the ZXGD3101 is very simple to implement.
The primary side power stage uses fixed frequency current mode controller U2 to drive primary switch
QSWI in CrCM and reduces turn-on switching loss through ZVS of QSWI at high line condition. For efficient
flyback design, the primary switch works in CCM at low line condition to take advantage of the lower
primary and secondary peak/RMS currents. A RCD clamp network is added across the transformer
primary to dampen high frequency resonance ringing and to ensure integrity of differential voltage
across the output of synchronous MOSFET.
The Rsnub, Csnub network across the synchronous switch provides filtering to clean high frequency
oscillations during MOSFET turn-off transition. If the amplitude of oscillations is high then the drain
voltage could ring below the controller's turn-on threshold voltage, inducing the controller to falsetriggers. The snubber network has the added benefits of reducing conducted EMI generation and Qsyn
voltage stress. In Figure 2, a 50Ω resistor is suggested alongside a 1nF capacitor for sufficient damping .
Lp = 560 μ H
1 : 0 .18 for N p:N s
1:0.16 for N p:N aux
K B P 206 G
220 μ F
22 k
5k
19V /3 .2 A
Vo
10 nF
50 Ω
10 k
F M M T 491 A
P R 1507 G
3k
1 .5 Ω
N TC
R EF
B IA S
D R A IN
2 x
18 m H
U D Z11 B
1.8k
4 .7k
U2
L4
Adj
HV
D rv
GN D
FB
GN D
CS
47Ω
1μ F
Q SYN
P W M c urrent- m ode c ontroller
V cc
15 m Ω , 150 V
Q SWI
380mΩ , 11 A ,
600 V
Df
R sn u b
50Ω
U3
N1
470 μ F
Z X G D 3101
U1
4A
fus e
2 x
2.7μ H
G A TE L G A TE H G N D
U D Z15 B
X2 c ap
1μ F
2 x
470 μ F
V cc
C sn u b
1nF
85 V– 265 V
0.5Ω total
1W
Z T L 431
Y1 -ty pe
2.2nF
Figure 2 - Typical configuration of ZXGD3101 in a 60W flyback schematic
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Design considerations
In order to drive the synchronous MOSFET properly and improve the efficiency of the flyback adapters,
some important aspects must be considered such as power MOSFET selection, turn off threshold and
delay as well as the power consumption.
1. Power MOSFET selection
A selection guide for the synchronous MOSFET in Figure 2, in particular a 19V 3.2A output adapter
operating in CrCM at high line is hereby presented. Specifications of the converter are given in Table 3.
Although the MOSFET current calculation in different operating mode can be slightly different, the
example below can be easily extended to cater for all operating modes. The values in the equation are
conservative.
Table 3 - example flyback converter specification
DC link
(min),
VDCmin
DC link
(max),
VDCmax
Duty ratio
(max), Dmax
Transformer
turn-ratio, N
Primary
inductance, Lm
Frequency
fs
110V
375V
0.5
1:0.18
560?H
60kHz
The first step is to determine the MOSFET maximum reverse voltage,
VDCmax × (Vout + Vf )
375V × (19V + 0.8V )
= 19V +
= 86.5V
VDS = Vout +
VRO
110V
where VRO is the transformer's secondary voltage reflected to the primary side
Dmax
0.5
= 110V ×
= 110V
VRO = VDCmin ×
1 − Dmax
1 − 0.5
Allowing typical voltage margin for the MOSFET the maximum reverse voltage is as follows,
VDSS = 1.3 × VDS = 112.5V which implies that at least 120V or a common 150V MOSFET should
be chosen.
From the power dissipation point of view the most stringent operating condition for the
synchronous MOSFET is encountered at low line. Since the body diode conducts prior to the QSYN
turning on and it is being driven off at the zero current point, the switching loss is minimal and
the overall power dissipated is dominated by on state conduction loss.
The maximum rectifier current can be calculated from,
ISYN(pk) =
2 × Iout
3.2
= 2×
= 12.8A
1− Dmax
1− 0.5
Noting that the turn on propagation delay td1 of the ZXGD3101 forms the MOSFET dead time
which prevents simultaneous conduction, the subsequent MOSFET body diode conduction loss
has been included for efficiency estimation. Accounting for the inefficiency of body diode forward
voltage drop, total conduction loss in QSYN at 100⬚C junction temperature can be estimated from,
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2
⎛
N × VRO × t d1 ⎞ ⎛ 1 − Dmax − t d1 × fs ⎞
⎟⎟ × ⎜
⎜⎜ ISYN(pk ) −
⎟ × rDS( on ) @ T =100 oC
j
Lm
3
⎠
⎠ ⎝
⎝
⇓
Ploss =
MOSFET loss
+ ISYN(pk ) × VSD(body −diode ) × t d1 × fs
⇓
Body diode loss
2
=
⎛
5.6 × 110V × 525ns ⎞ ⎛ 1 − 0.5 − 0.0315 ⎞
⎜⎜12.8A −
⎟⎟ × ⎜
⎟ × rDS(on)@T =100 oC + 12.8A × 1.25V × 0.0315
j
560 μH
3
⎠
⎝
⎠ ⎝
=
23.33 × rDS(on)@T =120 oC + 0.504W
j
The typical forward voltage drop of a 150V ultra fast diode at elevated temperature is around
800mV. The power dissipated in normal diode rectification equates to,
Pdiode = Iout × Vf = 3.2A × 800mV = 2.56W
In order to achieve at least 50% power loss reduction in the secondary side switch through
synchronous rectification, the required on state resistance has to be,
rDS(on)@T =100 oC ≤
j
50% × Pdiode − 0.504W 50% × 2.56W − 0.504W
=
≤ 33.26mΩ
23.33
23.33
As on resistance at 25⬚C is approximately 1.8 to 2 times lower than that at 100⬚C, use a MOSFET
with rDS(on)@Tj=25⬚C = 15mΩ to achieve the desired power loss reduction against normal
rectification method. For adapter with high continuous output current, selecting a MOSFET or
paralleled MOSFETs with lower combined resistance yields better efficiency enhancement at the
expense of increased cost or component count.
Power supply designers interested in squeezing the last percentage of efficiency out of their
system could place an optional Schottky or ultra-fast recovery diode Df across synchronous
MOSET (see Figure 1) to alleviate the effect of body diode conduction. As shown in Figure 3(b),
Df conducts during the MOSFET dead time where the secondary circulating is at the highest, so
the PCB trace inductance between the diode and MOSFET should be kept small to create an
efficient circulating energy flow path. Df should be selected to have the same breakdown voltage
as the MOSFET but the average diode current is only 400mA, hence the ES3C can be used in the
19V 3.2A output converter.
a
b
Figure 3 Operating waveforms of synchronous rectification (a) ZXGD3101 with turn on
propagation delay (b) ultra-fast diode Df to reduce body diode conduction loss
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2. Synchronous MOSFET controller turn-off phase and threshold
The ZXGD3101 can work in both continuous and discontinuous operation. The turn-off phase of
the synchronous MOSFET controller is different depending on the mode of operation. In DCM and
CrCM, the MOSFET current decays linearly and the ZXGD3101 backs off its gate drive output
proportionately when the MOSFET voltage drop is less than -50mV, gradually reducing the
capacitive charge that need to be extracted from the gate at turn-off. Upon the conduction voltage
drop crossing the controller turn-off threshold, the gate voltage is removed rapidly to inhibit reverse
current flow through the MOSFET.
There are two recommended turn-off threshold settings, which are ‘-10mV' and '-20mV'. The '10mV' threshold is recommended for DCM to ensure sustained enhancement of a low resistance
MOSFET, whilst the '-20mV' threshold is appropriate for high average current, low ripple current
level converter in CCM. These thresholds depend on IBIAS and IREF level as shown in Fig. 4 and
therefore are set by the value of RBIAS and RREF.
Datasheet and component selection for ZXGD3101 are available from the Zetex website.
Turn-off offset voltage
Turn-off offset voltage
Figure 4 - Turn off threshold voltage
The transformer secondary circulating current in a CCM flyback converter (see Figure 5) doesn't
decay to zero before the primary MOSFET is switched back on at the beginning of the switching
period. As the primary MOSFET is gated on, the primary switch current starts to rise when the
voltage reached the gate turn-on threshold and the synchronous MOSFET current is pulled down
rapidly. This forces the drain-source voltage to drop beyond the synchronous MOSFET controller's
turn-off threshold and the MOSFET is then turned off.
a
b
Figure 5 - CCM operation (a) MOSFET current and voltage waveforms (b) Fast turn-off
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The turn-off phase propagation delay and fall time on the ZXGD3101 have typical values of 15ns
and 20ns respectively and excessive dissipation due to simultaneous conduction of MOSFETs can
be avoided. This is critical because cross conduction will degrade efficiency or can lead to device
failure due to the nature of the fast transition. To further minimize the possibility of cross
conduction, the turn off threshold can be configured to be '-20mV' so that the MOSFET can be
gated off sooner at the expense of less effective MOSFET enhancement at low load condition.
3. Synchronous MOSFET controller power consumption
In practice, the synchronous rectification scheme involves active devices which consume power.
The synchronous MOSFET controller's operating current will vary over the entire load current
range as shown in Figure 6. At high load, ZXGD3101 current consumption is at the highest
because it has to provide a high source current into the MOSFET gate for fast turn on and to
support low 'on-state' voltage drop. A lower operating current is needed as the load decreases
corresponding to the reduction in the synchronous MOSFET current as well as conduction period.
The primary side controller enters skip-mode operation at no load for reduced power dissipation,
the synchronous MOSFET controller operating current drops to around 8mA.
As shown in Figure 2, power into the ZXGD3101 configured in the low side synchronous
rectification can be derived directly from the output of power supply. An emitter follower
transistor as the voltage source should be used to derive the Vcc supply from the regulated output
voltage. Through this, the no-load energy consumption criteria in Energy Star® V2.0 can be
fulfilled with the recommended implementation. Nevertheless, this minor power loss is offset by
the significant active mode conduction loss savings offered by the synchronous rectification.
Alternatively, a dedicated supply could be drawn through an auxiliary flyback transformer
winding or through a voltage tap on the main transformer winding. However, a simple Zener
diode with a series current limiting resistor is not recommended as this incurs undesirable power
dissipation within the Zener diode which will compromise the no-load efficiency.
13
Supply Current (mA)
12
11
10
9
5 mA/3mA
8
7
0
20
40
60
80
100
Ou tp ut Load (%)
Figure 6 - ZXGD3101 operating current
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System efficiency test
Figure 7 shows the efficiency of synchronous rectification using the ZXGD3101 in the 60W flyback
adapter. A small 150V diode was mounted in parallel to a 15mΩ MOSFET to keep low the voltage
drop during dead time. The operation condition is in CCM at low line and high load. The curve
shows that synchronous rectification with the ZXGD3101 can achieve substantial efficiency
improvement compared with standard (ultra-fast diode) rectification at output currents above 1A.
The diode test is performed using STPR1020CT.
At output current below 1A, the accumulation of losses associated with body diode conduction,
synchronous MOSFET gate charge loss alongside with increased capacitive turn-on loss in the
primary switch offset the conduction loss saving provided by synchronous rectification. For
completeness, performance curves at high line are presented in Fig. 8.
The efficiency data with output loading at 25%, 50%, 75% and 100% for 115Vac and 230Vac
are shown in Table 4. Note that the average efficiency for both ranges meets the Energy Star® V2.0
program minimum requirement of 87% at this particular power level. With ultra-fast diode
rectification, the average active mode efficiency of the adaptor is actually 85.85% and 84.939%
at 115Vac and 230Vac respectively. In the 230Vac input case the efficiency degradation occurs
at light loading due to increased circuit quiescent power, mainly due to higher MOSFET switching
losses at this input level. For completeness, Table 5 presents the no-load supply power. The input
power at zero load is always below 500mW.
Another major benefit of switching to a synchronous MOSFET is the reduction in device
temperature which has a big impact on the power supply reliability. This can be clearly seen from
the thermal images taken using Infra-Red camera during the power supply evaluation shown in
Figure 9 where a 28.5⬚C reduction in adapter temperature is recorded. Both results are taken at
115Vac under full load condition
.
90
Efficiency (%)
80
Syn Rectificati on
Ultra-fast diode
70
60
0
1
2
3
Output current (A)
Figure 7 - Efficiency comparison at 115Vac
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90
Efficiency (%)
80
70
Syn Recti ficati on
Ultra-fast diode
60
50
0
1
2
3
Output current (A)
Figure 8 - Efficiency comparison at 230Vac
Table 4 - Active mode efficiency of low flyback adapter with Synchronous Rectification
Vin (Vac)
Pin (W)
Vout (Vdc)
Iout (Adc)
Pout (W)
Pout (%)
Eff (%)
115
17.32
19.24
0.779
15
25
86.39
115
33.77
19.13
1.568
30
50
88.82
115
51.42
19.08
2.363
45
75
87.68
115
69.52
19.04
3.151
60
100
86.31
87.30
Average Eff (%)
Vin (Vac)
Pin (W)
Vout (Vdc)
Iout (Adc)
Pout (W)
Pout (%)
Eff (%)
230
18.47
19.24
0.779
15
25
81.21
230
33.58
19.14
1.567
30
50
89.34
230
50.45
19.10
2.356
45
75
89.20
230
67.49
19.02
3.155
60
100
88.90
87.16
Average Eff (%)
Table 5 - No-load energy consumption
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Vin (Vac)
Pin (W)
115
0.35
230
0.45
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Figure 9 - Thermal comparison: ultra-fast diode vs. synchronous MOSFET
Conclusion
When a normal, ultrafast diode rectifier is substituted with a low resistance synchronous MOSFET
it is possible to achieve the standards set out by Energy Star® V2.0. Using the ZXGD3101 to
control and drive the synchronous MOSFET provides efficient conduction path with optimized delay
in sensing the sharp drop of current during the turn-off phase ensuring no reverse conduction. The
gate driving scheme combined with properly designed magnetic and power stage minimizes circuit
losses while the power supply is in active mode and ensures the no-load conditions are satisfied.
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