AN68

A Product Line of
Diodes Incorporated
AN68
Synchronous MOSFETs selection for Flyback converters
Adrian Wong, Systems Engineer, Diodes Incorporated
Introduction
A Synchronous rectifier is an essential building block in the secondary side of the Flyback converter for
designing efficient power supplies with high power density as motivated by emerging Energy standards.
The ZXGD3101 controller when used with an appropriate MOSFET offers a higher efficiency than either
a schottky diode or an ultra-fast Silicon rectifier.
However, choosing the optimum Synchronous MOSFET can be difficult if reliant on an experimental
trial-and-error method. Instead a straightforward design flow chart can be used to deal with the many
device characteristics and controller trade-offs. This design note presents a design procedure that will
help to select the best MOSFET for the ZXGD3101 Synchronous rectification controller.
This design note should be used in conjunction with the spreadsheet of ZXGD3101 MOSFET selection
tool.
Figure 1 – Flyback converter with Synchronous rectification
Issue 1 - February 2009
© Diodes Incorporated 2009
1
www.diodes.com
A Product Line of
Diodes Incorporated
AN68
Detailed design procedure
1. Capture system parameters and select
the ZXGD3101 threshold voltage
VDCmin, VDCmax, Dmax, N, Lm, fs, Vout, Iout, VCC,
VSD, η25%, ∆Ploss, td1, mode of operation
IBIAS, IREF
2. Determine the MOSFET breakdown voltage rating
3. Calculate ISYN(pk) & ISYN(valley) at both 25% & 100% loadings
4a. Calculate RDS(on)max
4b. Calculate RDS(on)min
5. Define RDS(on) range
6. RDS(on) & VDSmax design complete
Figure 2 – Design flow chart for Synchronous MOSFET selection
A design methodology is presented below using the circuit diagram of Figure 1 as a reference. Figure 2
illustrates the design flow chart and the detailed procedure is as follows,
Step 1: Capture system parameters and select the ZXGD3101’s threshold voltage
The design process starts with collecting the critical design parameters for the Flyback power supply as
defined below.
Table 1 - Nomenclature
Symbol of system parameter
Definition
VDCmin
Minimum rectified input voltage across +In and -In
VDCmax
Maximum rectified input voltage across +In and -In
Dmax
Maximum duty cycle of the primary switch at VDCmin (0.4≤Dmax≤0.5)
fS
Switching frequency of the converter at VDCmin
Lm
Primary magnetizing inductance of the power transformer
N
Primary-to-secondary turn ratio of the power transformer
Vout
Output voltage at +Out
Iout
Output current flowing from +Out to the load
td1
Turn on propagation delay time of ZXGD3101 controller
η
Power conversion efficiency
DCM
Discontinuous Conduction Mode
CrCM
Critical Conduction Mode
CCM
Continuous Conduction Mode
Issue 1 - February 2009
© Diodes Incorporated 2009
2
www.diodes.com
A Product Line of
Diodes Incorporated
AN68
Generally, a synchronous rectifier is optimized for high full load efficiency. It is also important to maintain
a reasonably high efficiency at low load, particularly for a product which has to meet energy efficiency
standards such as Energy Star® V2.0. This design procedure addresses the need to optimize the
efficiency at 25% loading to comply with efficiency standard. η25% is the estimation of the power
conversion efficiency at 25%. If no reference data is available, set η25%=0.8 for low voltage output
applications (<6V) and η25%=0.83 for high voltage output applications (≥6V) as the initial assumptions.
The duty cycle of the primary side switch at 25% loading is,
D25%load =
2 × L m × f s × Vout × Iout
η 25% × VDCmin
The duty cycle is used later in the analysis to determine the peak Drain current at a partial load condition.
However, the maximum duty cycle is found at the minimum input voltage and full load as,
Dmax =
Dmax =
2 × Lm × fs × Vout × Iout
η × VDCmin
N × Vout
VDCmin + N × Vout
for DCM
for CrCM/CCM
where η should be set at 0.84 and 0.87 with a synchronous rectifier for Vout<6V and Vout≥6V respectively
if no reference data is available.
Figure 3 shows the recommended IREF and IBIAS combinations for different operation modes, namely
Continuous Conduction Mode (CCM) and Discontinuous Conduction Mode (DCM). The turn-off
threshold voltage of the controller should be set at ‘-20mV’ for CCM so that the MOSFET can be gated
off sooner to minimize the possibility of simultaneous conduction of MOSFETs. The ‘-20mV’ threshold
value is set by selecting an appropriate resistor pair to source 5mA and 3mA into the BIAS and REF pins
respectively, as shown in Figure 3. For example if the VCC supply voltage to the controller is chosen to be
10V, resistors RBIAS of 1.8kΩ and RREF of 3kΩ should be used to achieve the desired threshold voltage.
An alternative turn-off threshold is ‘-10mV’ which is only recommended for both DCM and CrCM where a
higher secondary peak Drain current circulates, in order to ensure the sustained enhancement of a low
resistance MOSFET. Again, this threshold is developed based on the combination for RBIAS of 1.8kΩ and
RREF of 3.9kΩ to source 5mA and 2.4mA into the BIAS and REF pins respectively, as shown in Figure 3.
It is worth noting that a greater IBIAS is required to achieve shorter turn on propagation delay and gate rise
times while a greater IREF speeds up the turn-off switching. However, if these two currents are getting too
high, both no load and light load efficiencies will be degraded. Moreover, with reference to Figure 5, if
either IBIAS is getting too high or IREF is getting too low, the zero point detected offset will become slightly
positive to allow current flow in the reverse direction which could actively discharge the output capacitor
in DCM or cause shoot through in CCM. Consequently, IBIAS of 5mA has been compromised for all the
operation modes.
Issue 1 - February 2009
© Diodes Incorporated 2009
3
www.diodes.com
A Product Line of
Diodes Incorporated
AN68
IBIAS=5mA, IREF=3mA
for CCM at VD=-20mV
IBIAS=5mA, IREF=2.4mA
for DCM/CrCM at VD=-10mV
Figure 3 – Optimal IBIAS and IREF combinations at two turn off threshold voltages (-10mV & -20mV)
Step 2: Determine the MOSFET breakdown voltage rating
The MOSFET maximum reverse voltage with a safety design margin is determined as follows, where the
margin is typically 20%~40%. 30% is taken generally,

VDSmax = 1.3 ×  Vout +

VDCmax × Vout × (1 − Dmax ) 

VDCmin × Dmax

Step 3: Calculate ISYN(pk) and ISYN(valley) at 25% and 100% loadings
This section determines the magnitude of the current flowing through the Synchronous rectifier to
establish the MOSFET’s on-resistance requirement. However, as the input voltage and load condition
vary, the converter’s operation mode can switch between CCM and DCM, and the current magnitude
changes as well.
Once the operation mode is determined, its respective maximum peak Drain current of the Synchronous
MOSFET ISYN(pk) (see Figure 4) is obtained as,
ISYN(pk) =
2 × N × Vout × Iout
η × VDCmin × Dmax
ISYN(pk) =
2 × Iout
1 − Dmax
ISYN(pk)
Iout
=
+
1 − Dmax
for DCM
for CrCM
 1- Dmax 

Vout × 

 fs 
2Lm
for CCM
N2
Issue 1 - February 2009
© Diodes Incorporated 2009
4
www.diodes.com
A Product Line of
Diodes Incorporated
AN68
Figure 4 – MOSFET Drain current and mode of operation
And the valley Drain current of the MOSFET in Figure 4 is,
for DCM/CrCM
ISYN(valley) = 0
ISYN(valley) =
Iout
1 − Dmax
 1 - Dmax
Vout × 
fs

−
2L m




for CCM
N2
When the output current drops from full load to 25% load that is 0.8A; the converter transverses from
CrCM to DCM, and the Drain current peak decreases as,
ISYN(pk)@25%load =
2 × N × Vout × Iout × 0.25
η × VDCmin × D25%load
Step 4a: Calculate the maximum MOSFET on-resistance rating
The Synchronous rectifier will be required to achieve a power loss reduction of ∆Ploss, where ∆Ploss is
typically greater than 50%. The typical forward voltage drop VF of a 150V diode at elevated temperature
of 100°C is around 800mV.
For a given power loss reduction ∆Ploss dissipated in the secondary side switch, the required MOSFET
on-state resistance at full load has to be,
(100 - ∆Ploss ) × I
100
RDS(on)@Tj=100°C ≤

ISYN(pk)

Issue 1 - February 2009
© Diodes Incorporated 2009
out
× VF − ISYN(pk) × VSD × t d1 × fs
  Lm × ISYN(pk)



− t d1  × fs 
2 
2


N × VDCmin × Dmax × t d1    N × Vout

−

 ×
Lm × (1 − Dmax )
3

 




5
for DCM
www.diodes.com
A Product Line of
Diodes Incorporated
AN68
RDS(on)@Tj=100°C ≤
(100 - ∆Ploss ) × I
100
 1 − Dmax − t d1 × fs

3

out
for CrCM/CCM
× VF − ISYN(pk) × VSD × t d1 × fs
2





 ISYN(pk) − N × VDCmin × Dmax × t d1  + I2SYN(valley) + ISYN(pk) − N × VDCmin × Dmax × t d1  × ISYN(valley ) 
 × 

Lm × (1 − Dmax )
Lm × (1 − Dmax )



 



The loss within the propagation delay time of the ZXGD3101, td1, associated with the forward voltage
drop across the intrinsic body diode of the Synchronous MOSFET, VSD, has been included in the above
analysis.
The corresponding MOSFET on-state resistance at room temperature is deduced as,
RDS(on)@Tj=25°C =
1
× RDS(on)@Tj=100°C
1.75
Step 4b: Calculate the minimum MOSFET on-resistance rating
The ZXGD3101 controller features a proportional Gate drive output which adjusts the magnitude of the
Gate voltage as the Drain-Source voltage across the MOSFET varies as shown in Figure 5. This
ensures that the Gate voltage will reach 8.5V when the MOSFET current was high to create the low
resistance path at normal loading. The Gate enhancement then eases off gradually as the Drain voltage
magnitude decreases, so that the Synchronous MOSFET can be turned off with reduced Gate charge at
zero current crossing.
However, inadequate MOSFET enhancement could result at low load condition with the proportional
Gate drive if a MOSFET with too low on-resistance is selected. This effect would be caused as the Drain
current decreases at partial loading. The Drain-Source voltage drop, which is the current multiplied by
the resistance of the MOSFET, might be insufficient to induce the controller to output a high enough
Gate voltage. Therefore, the full capability of the MOSFET is not utilized and the additional resistive loss
reduces the efficiency of the Synchronous rectifier.
In general, MOSFETs are fully enhanced beyond the Gate voltage of 8V. Using the VD against VG
relationship in Figure 5, the minimum MOSFET resistance that can be used without compromising the
power supply efficiency at 25% loading is determined from,
RDS(on)@Tj=25°C ≥
VD (VG = 8V )
ISYN(pk)@25% load
0.06V

I
 SYN(pk)@25% load
=
0.07V

 ISYN(pk)@25% load

VD=-0.06V
for DCM/CrCM at -10mV
for DCM/CrCM
for CCM
VD=-0.07V
for CCM at -20mV
Figure 5 – Minimum |VD| for full enhancement of Synchronous MOSFET with DCM/CrCM/CCM
Issue 1 - February 2009
© Diodes Incorporated 2009
6
www.diodes.com
Design example
The following example makes use of the design procedure to select the Synchronous MOSFET for an
experimental Flyback converter with the parameters listed in Table 2. All the equations below are put
into the spreadsheet in Figure 6 as a user-defined design tool.
Step 1: Capture the system parameters and select threshold voltage
Table 2 – System specification
System and ZXGD3101 controller parameters
VDCmin
VDCmax
N
Lm
fS
Vout
Iout
Operation mode
VCC
td1
110V
375V
1:0.18
560µH
60kHz
19V
3.2A
CrCM
10V
525ns
The threshold voltage of the ZXGD3101 is selected to be ‘-10mV’. With the VCC supply voltage to the
controller fixed at 10V, a 1.8kΩ and 3.9kΩ resistor combination is used for RBIAS and RREF to set the
desired threshold voltage. The Synchronous MOSFET is required to reduce the power loss by
∆Ploss=50% to facilitate a smaller heat sinking component. And the duty cycles at 25% and 100%
loadings are,
D25%load =
Dmax =
2 × 560µ H × 60kHz × 19V × 0.8
0.83 × 110V
= 0.3189
assuming η25%=0.83
5.6 × 19V
= 0.4917
110V + 5.6 × 19V
Step 2: Determine the MOSFET breakdown voltage rating

VDSmax = 1.3 × 19V +

375V × 19V × (1 − 0.4917 ) 
 = 111.7V
110V × 0.4917

Hence, a common 150V MOSFET is chosen.
Step 3: Calculate ISYN(pk) and ISYN(valley) at 25% and 100% loadings
ISYN(pk) =
2 × 3.2A
= 12.59A
1 − 0.4917
ISYN(pk)@25%load =
2 × 5.6 × 19V × 0.8A
= 5.847A
0.83 × 110V × 0.3189
Step 4a: Calculate the maximum MOSFET on-resistance rating
From above, ∆Ploss=50% and the maximum allowable MOSFET resistance value is,
RDS(on)@Tj=25°C ≤
1
2 × 3.2A
× 3.2A × 0.8V −
× 1.25V × 525ns × 60kHz
1
2
1 − 0.4917
×
= 19.47mΩ
2
1.75 

1
5.6 × 110V × 0.4917 × 525ns   1 − 0.4917 − 525ns × 60kHz 
 × 
×  2 × 3.2A −


560µ H
3

 1 − 0.4917 
 
Step 4b: Calculate the minimum MOSFET on-resistance rating
RDS(on)@Tj=25°C ≥
0.06V
= 10.26m Ω
5.847A
Step 5: Define RDS(on) range
As a result, the RDS(on) range is established by combining the two constraints in Steps 4a & 4b as follows,
10.26mΩ ≤ RDS(on)@Tj=25°C ≤ 19.47mΩ
In this example, a 150V, 79A, 16mΩ MOSFET─FDP2532 will satisfy the requirement.
Issue 1 - February 2009
© Diodes Incorporated 2009
7
www.diodes.com
A Product Line of
Diodes Incorporated
AN68
Figure 6 – Spreadsheet for Synchronous MOSFET design
Conclusion
With the new energy saving standards launched out by the EPA, European Code of Conduct and the
increasing adoption of the Energy Star V2.0 standard enforced for external power adaptor, the design of
the power supply is no longer trivial but it can be a very tough challenge for many power supply
designers using only the traditional Schottky technology. Combining both benefits of optimized
MOSFET enhancement and fast turn off speed, the ZXGD3101 controller can be used by power supply
designers as one of their tools to meet the emerging stringent efficiency requirements. This design
procedure for the Synchronous MOSFET selection takes into consideration many critical system
parameters, which aids the optimum selection of a low on-resistance MOSFET to be used with the
ZXGD3101 controller reducing the need for experimentation. The procedure will be helpful to optimize
the PSU performance for both full power and low load condition.
Issue 1 - February 2009
© Diodes Incorporated 2009
8
www.diodes.com
A Product Line of
Diodes Incorporated
AN68
IMPORTANT NOTICE
Diodes Incorporated and its subsidiaries reserve the right to make modifications, enhancements, improvements, corrections or
other changes without further notice to any product herein. Diodes Incorporated does not assume any liability arising out of the
application or use of any product described herein; neither does it convey any license under its patent rights, nor the rights of
others. The user of products in such applications shall assume all risks of such use and will agree to hold Diodes Incorporated and
all the companies whose products are represented on our website, harmless against all damages. Diodes Incorporated does not
warrant or accept any liability whatsoever in respect of any parts purchased through unauthorized sales channels.
LIFE SUPPORT
Diodes Incorporated products are specifically not authorized for use as critical components in life support devices or systems
without the express written approval of the Chief Executive Officer of Diodes Incorporated. As used herein:
A. Life support devices or systems are devices or systems which:
1. are intended to implant into the body, or
2. support or sustain life and whose failure to perform when properly used in accordance with instructions for use
provided in the labeling can be reasonably expected to result in significant injury to the user.
B. A critical component is any component in a life support device or system whose failure to perform can be reasonably expected
to cause the failure of the life support device or to affect its safety or effectiveness.
Issue 1 - February 2009
© Diodes Incorporated 2009
9
www.diodes.com
Similar pages