AN1073

Application Note 1073
Design Consideration with AP3502E/3E
Prepared by Cheng Zhi Peng
System Engineering Dept.
1. Introduction
2. General Description
The AP3502E/3E are current-mode step-down DC-DC
converters, capable of driving a 2A/3A load with high
efficiency, especially high efficiency at light load,
excellent line and load regulation. The AP3502E/3E
integrate cycle-by-cycle current limit protection,
programmable soft-start, hiccup mode for short circuit
protection and over temperature protection, which can
notably increase the system reliability.
The AP3502E/3E are synchronous step-down converters
with internal power MOSFETs. Turn on/off M1 and M2
alternately to chop the input voltage. The current sense
signal is compared with the EA output signal to regulate
the output voltage and adjust the MOSFETs’ duty cycle.
The AP3502E/3E are also high reliability ICs with
integrated OCP, OVP, OTP, UVLO circuit. For more
information please refer to the functional block diagram
(Figure 1).
IN
2
SHUTDOWN
COMPARATOR
1.5V
VA
INTERNAL
REGULATOR
0.3V
VB
CURRENT
SENSE
AMPLIFIER
SLOP
COMP
VA
+
OSCILLATOR
SCP
90K/340K
1
BS
M1
CLK
LOCK
EN
COMPARATOR
7
S
Q
R
Q
3
PWM
COMPARATOR
SW
M2
2.5V
VB
4
1.1V
5 A
SS
8
GND
EA
5
0. 925V
FB
6
COMP
Figure 1. Functional Block Diagram of AP3502E/3E
Where CSS is the required capacitor between SS pin and
GND, tSS is the desired soft-start time and VFB is the
feedback voltage.
2.1 Programmable Soft-start
The soft-start time of the AP3502E/3E is fully user
programmable by selecting different CSS value. The CSS is
charged by a 5μA current source, generating a ramp signal
fed into non-inverting input of the error amplifier. And this
ramp signal will regulate the voltage on COMP pin when
starting the system, thus realizing soft-start. The capacitor
value required for a given soft-start ramp time can be
expressed as:
5μA
C SS = t SS ×
Nov. 2012
2.2 Over Current Protection
The AP3502E/3E have internal over current protection
function to protect themselves from catastrophic failure.
The AP3502E/3E can monitor the drain-to-source current
of M1. The peak current-limit threshold is internally set at
3.5A/5.6A. When the inductor current is higher than the
current limit threshold, OCP function will be triggered,
VFB
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Application Note 1073
forcing M1 to turn off, and this will last until the next
switching cycle.
be turned off. The AP3502E/3E will restart once released
from OVP condition.
2.3 Short Circuit Protection
When the circuit is shorted, the output is connected to
GND and FB voltage is lower than 0.3V, reducing the
switching frequency to 90kHz. Meanwhile, the current
flowing through inductor reaches the current limit
threshold of upper-side switch, then the OCP function is
triggered. After that, inductor current will be decreased and
SS pin begins to discharge; when SS discharge voltage
reaches to about 0.2V, the IC enter soft-start mode and
charge to SS pin. Thus, inductor current increases slowly
and triggers the current limit threshold of upper-side switch
again. With that, SS pin discharges and inductor current
decreases once more. This process will be repeated
continually until the system release from SCP(short circuit
protection) function and restart normally, as showed in
Figure 2.
2.5 Over Temperature Protection
The OTP circuitry is provided to protect the IC if the
maximum junction temperature is exceeded. When the
junction temperature exceeds 160ºC, it will shut down the
internal control circuit, M1 and M2. The AP3502E/3E will
restart automatically under the control of soft-start circuit
when the junction temperature decreases to 130ºC/140ºC.
2.6 High Efficiency at Light Load
When the systems work in light load, Discontinuous
conduction mode (DCM) is usually more advantage than
continuous conduction mode (CCM). Since there’ll be
higher efficiency in DCM mode than CCM, it can supply
more power if the loss power are same. The AP3502E/3E
is available for DCM, so it can achieve high efficiency at
light load.
100
90
VOUT
80
Efficiency (%)
VSS
VSW
70
60
50
VIN=12V,VOUT=3.3V,L1=10μH
40
AP3502E
AP3503E
30
IL
20
0.1
0.2
0.3
0.4
Load Current (A)
Figure 2. AP3502E Short Circuit Protection and Recovery
Figure 3. Efficiency vs. Load Current
2.4 Over Voltage Protection
The AP3502E/3E have internal OVP circuits. When VOUT
is higher than the OVP threshold, the power switching will
C5 10nF
VIN=12V
R4
100k
2
IN
7
C1
10µF/25V
(10µF/25V x2)
EN
C1, C3, R3
A (B)
A for AP3502E
B for AP3503E
Nov. 2012
AP3502E/3E
8 SS
GND
4
C4
0.1µF
1
BS
L1 10µH
SW
3
R1 26.1k
FB 5
COMP
6
C3
4.7nF
(3.3nF)
C6
Optional
VOUT=3.3V
D1
Optional
R2
10k
C2
22µF/6.3V x2
R3
13k
Figure 4. Typical Application of AP3502E/3E
Rev. 1. 2
BCD Semiconductor Manufacturing Limited
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Application Note 1073
3. Application Information
I PEAK = I OUT +
Typical application circuit is shown in Figure 4. For circuit
parameters setting please refer to the following
descriptions.
The current rating of the selected inductor should be
ensured to be 1.5 times of the peak inductor current.
3.3 Input Capacitor Setting
A high-quality input capacitor with big value is needed to
filter noise at input voltage source and limit the input ripple
voltage while supplying most of the switch current during
ON time. For input capacitor selection, a ceramic capacitor
is highly recommended due to its low impedance and small
size. However, tantalum or low electrolytic capacitor is
also sufficed.
⎛ R2 ⎞
V FB = VOUT × ⎜
⎟
⎝ R1 + R 2 ⎠
Where VFB is the feedback voltage, and VFB=0.925V.
Thus, VOUT can be expressed as:
⎛ R1 + R 2 ⎞
VOUT = 0.925 × ⎜
⎟
⎝ R2 ⎠
There are two important parameters of the input capacitor:
the voltage rating and RMS current rating. The voltage
rating should be at least 1.25 times greater than the
maximum input voltage, and the RMS current of input
capacitor can be expressed as:
First, fix R2 based on the recommended value, 10kΩ. Then,
R1 can be expressed as:
I CIN _ RMS = I OUT ( MAX ) ×
⎛V
⎞
R1 = R 2 × ⎜ OUT − 1⎟
⎝ 0.925 ⎠
VOUT
V IN
⎛ VOUT
⎜⎜1 −
V IN
⎝
⎞
⎟⎟
⎠
Where ICIN_RMS is the RMS current of input capacitor.
3.2 Inductor Setting
The inductor is used to supply smooth current to output
when driven by a switching voltage. Its value relies on the
operating frequency, load current, ripple current, and duty
cycle.
As indicated by the RMS current equation above, ICIN_RMS
reaches the highest level at the duty cycle of 50%. So the
RMS current of input capacitor should be greater than half
of the output current under this worst case. For reliable
operation and best performance, ceramic capacitors are
preferred for input capacitor because of their low ESR and
high ripple current rating. And X5R or X7R type dielectric
ceramic capacitors are preferred due to their better
temperature and voltage characteristics. Additionally, when
selecting ceramic capacitor, make sure its capacitance is
big enough to provide sufficient charge to prevent
excessive voltage ripple at input. The input ripple voltage
can be approximately expressed as below:
A higher-value inductor can decrease the ripple current and
output ripple voltage, however usually with larger physical
size. So some compromise needs to be made when
selecting the inductor. The peak-to-peak inductor ripple
current is 26% of the maximum output current when
operating in continuous mode (In most applications, a good
compromise is from 20% to 30% of the maximum load
current of the converter), and the inductor L1 can be
selected according to:
f SW
2 × VIN × f SW × L1
Where IPEAK is the peak inductor current.
3.1 Output Voltage Setting
The output voltage can be set using a voltage divider from
the output to FB pin. VOUT is divided by the voltage divider
as below:
L1 = VOUT ×
(VIN − VOUT )× VOUT
ΔVIN =
V IN − VOUT
× V IN × I OUT × 26%
⎛ V
I OUT
× ⎜1 − OUT
f SW × C IN ⎜⎝
VIN
⎞ VOUT
⎟⎟ ×
⎠ VIN
Where ΔVIN is the input ripple voltage.
Where VIN is the input voltage, IOUT is the output current,
and fSW is the oscillator frequency.
3.4 Output Capacitor Setting
The output capacitor can be selected based upon the
desired output ripple and transient response. The output
voltage ripple depends directly on the ripple current and is
affected by two parameters of the output capacitor: total
capacitance and the Equivalent Series Resistance (ESR).
Another important parameter for the inductor is the current
rating. After fixing the inductor value, the peak inductor
current can be expressed as:
Nov. 2012
Rev. 1. 2
BCD Semiconductor Manufacturing Limited
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Application Note 1073
The output ripple voltage can be expressed as:
⎡
⎛
⎣
⎝ 8 × COUT × f SW
ΔVO = ΔI L × ⎢ RESR + ⎜⎜
1
VIN/VOUT (V)
12/1.2
12/1.8
12/2.5
12/3.3
12/5
⎞⎤
⎟⎟⎥
⎠⎦
Where ΔVO is the output ripple voltage, and RESR is ESR of
output capacitor.
L × ΔI TRAN
C OUT × (VIN − VOUT )
2
Where ΔITRAN is the output transient load current step, and
VDROP is the output voltage drop (ignoring loop
bandwidth).
Both the voltage rating and RMS current rating of the
capacitor needs to be carefully examined when designing a
specific output ripple or transient drop. The output
capacitor voltage rating should be greater than 1.5 times of
the maximum output voltage. In the buck converter, output
capacitor current is continuous. The RMS current is
decided by the peak-to-peak inductor ripple current. It can
be expressed as:
⎛ G × GCS × R3 V FB
f C = ⎜⎜ EA
×
VOUT
⎝ 2π × C OUT
⎞
⎟⎟ < 0.1× f SW
⎠
Where fC is the crossover frequency, GEA is the error
amplifier transconductance, GCS is the current sense
trans-conductance. And the desired crossover frequency
can be set via compensation resister R3.
ΔI L
12
For sufficient phase margin, the loop gain slope should be
-20db/decade at the cross frequency. To suffice this
requirement, the output filter pole (fP_OUT), which is
product by output capacitor and the load resister, should be
cancelled by the zero point of error amplifier (fZ_EA) due to
the compensation capacitor (C3) and the output resistor of
the error amplifier. They can be expressed as:
Where ICOUT_RMS is the RMS current of output capacitor.
3.5 Loop Compensation
The AP3502E/3E employs current-mode control to achieve
easy compensation and fast dynamic response. Optimal
loop compensation depends on the output capacitor,
inductor, load, compensation network and also the device
itself. For a stable system, the values for the compensation
network are shown in Table 1 and Table 2.
VIN/VOUT (V)
12/1.2
12/1.8
12/2.5
12/3.3
12/5
R1 (kΩ)
3
9.53
16.9
26.1
44.1
C3 (nF)
4.7
6.8
5.6
4.7
3.3
⎛
1
f P _ OUT = ⎜⎜
2
π
C
×
OUT × ROUT
⎝
⎞
⎟⎟
⎠
1
⎞
⎛
f Z _ EA = ⎜
⎟
⎝ 2π × C 3 × R3 ⎠
R3 (kΩ)
7.5
15
13
13
13
Where, fP_OUT is the output filter pole and fZ_EA is the zero
point of error amplifier.
In general, we can set fZ_EA below one-forth of the fC. So
the value of C3 is determined by the following equation:
Table 1. AP3502E Compensation Value
R-C Combination
Nov. 2012
R3 (kΩ)
7.5
10
10
13
13
If the VIN/VOUT value of desired solution is not found from
the table above, the loop transfer function should be
analyzed to optimize the loop compensation. The overall
loop transfer function is the product of the power stage and
the feedback network transfer function. The power stage
transfer function is dictated by the modulator, the output
LC filter and load. The feedback transfer function is
dictated by the error amplifier gain, external compensation
network and feedback resistor ratio. The purpose of loop
compensation is to shape the loop transfer function in order
to meet the desired loop gain. The crossover frequency
should be set firstly. Because lower crossover frequency
may result in slower line/load transient responses, while
higher crossover frequency may result in system instability.
A good compromise is to set the crossover frequency
below 10% of the switching frequency. The crossover
frequency (fC) can be expressed as below:
The output capacitor selection will also affect the output
drop voltage during load transient. The output drop voltage
during load transient is dependent on many factors.
However, an approximation of the transient drop ignoring
loop bandwidth can be expressed as:
I COUT _ RMS =
C3 (nF)
6.8
6.8
5.6
3.3
2.2
Table 2. AP3503E Compensation Value
R-C Combination
For lower output ripple voltage across the entire operating
temperature range, X5R or X7R ceramic dielectric
capacitor, or other low ESR tantalum capacitor or
aluminum electrolytic capacitor are recommended.
VDROP = ΔI TRAN × RESR +
R1 (kΩ)
3
9.53
16.9
26.1
44.1
Rev. 1. 2
BCD Semiconductor Manufacturing Limited
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Application Note 1073
C3 >
4. PCB Layout Guidance
4
2π × R3 × f C
PCB layout is an important part for DC-DC converter
design. Poor PCB layout may reduce the converter
performance and disrupt its surrounding circuitry due to
EMI. A good PCB layout should follow below guidance:
R3 and C3 should be set appropriately to make sure the
system work at the desired transient voltage drop and
setting time. If the output capacitor has a large capacitance
and/or a high ESR value, the zero point resulting from the
output capacitor as well as its ESR should be considered.
In this case, the additional capacitor (C6) should be placed
between the COMP pin and GND. And, C6 can add a pole
to the circuit, thus increasing the mid-frequency width of
the control circuit.
4.1 Power Path Length
The power path of AP3502E/3E includes an input capacitor,
output inductor and output capacitor. Place them on the
same side of PCB and connect them with thick traces or
copper planes on the same layer. The power components
must be kept together closely. The longer the paths, the
more they act as antennas, radiating unwanted EMI.
⎛
⎞
1
⎟⎟
f Z _ ESR = ⎜⎜
×
×
2
π
C
R
OUT
ESR ⎠
⎝
4.2 Coupling Noise
The external control components should be placed as close
to the IC as possible.
Where fZ_ESR is the zero point of output filter. If needed, the
value of C6 can be expressed as:
C6 =
4.3 Feedback Net
Special attention should be paid to the route of the
feedback ring. The feedback trace should be routed far
away from the inductor and noisy power traces. Try to
minimize trace length to the FB pin and connect feedback
network behind the output capacitors.
C OUT ×RESR
R3
3.6 Bootstrap Capacitor
The bootstrap capacitor provided is used to drive the power
switch’s gate above the supply voltage. The bootstrap
capacitor is supplied by an internal 5V supply and placed
between SW pin and BS pin to form a floating supply
across the power switch driver. So the bootstrap capacitor
should be a good quality and high-frequency ceramic
capacitor. For best performance, the bootstrap capacitor
should be X5R and X7R ceramic capacitor, and is
recommended to be 10nF.
4.4 Via Hole
Be careful to the via hole. Via hole will result in high
resistance and inductance to the power path. If heavy
switching current must be routed through via holes and/or
internal planes, use multiple parallel via holes to reduce
their resistance and inductance.
Typical examples of AP3502E/3E PCB layer are shown in
Figure 5, 6.
Figure 5. Top Layer
Nov. 2012
Figure 6. Bottom Layer
Rev. 1. 2
BCD Semiconductor Manufacturing Limited
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